CN109163751B - Control device and method of encoder and encoder - Google Patents
Control device and method of encoder and encoder Download PDFInfo
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Abstract
The invention discloses a control device and a method of an encoder and the encoder, wherein the device comprises: an acquisition unit configured to acquire an input signal of the encoder; the detection unit is used for detecting and obtaining the current speed of a motor to which the encoder belongs through the input signal and comparing the current speed with a preset speed threshold; the compensation unit is used for performing first phase compensation on the input signal by adopting a set intersection value phase compensation method under the condition that the current speed is lower than or equal to the speed threshold value to obtain a first compensation signal; or under the condition that the current speed is higher than the speed threshold, performing second phase compensation on the input signal by adopting a set counting phase compensation method to obtain a second compensation signal. The scheme of the invention can solve the problem of poor compensation reliability in the correction or compensation of the subdivided signals, and achieves the effect of improving the compensation reliability.
Description
Technical Field
The invention belongs to the technical field of motors, and particularly relates to a control device and method of an encoder and the encoder, in particular to a system for detecting and compensating a subdivided signal phase of an absolute encoder, the absolute encoder with the device and a method for detecting and compensating the subdivided signal phase of the absolute encoder.
Background
In order to improve the subdivision precision of the photoelectric encoder, subdivision signals are required to have better sine; in practical application, due to the influence of factors such as grating pitch, grating black-white ratio, assembly accuracy and code disc eccentricity, the subdivided signals are not ideal sine waves, so that the subdivided signals need to be corrected or compensated.
Research shows that among many factors influencing the subdivision precision of the encoder, the influence of the phase deviation between subdivision signals is the most significant; therefore, how to obtain the phase deviation of the subdivided signals becomes the key for phase compensation and subdivision precision improvement.
Conventional solutions currently include cross-point phase compensation and counting phase compensation. The intersection value phase compensation method is to obtain the phase difference by detecting the intersection value of the subdivided signals; for example, patent document CN 101213423B proposes a phase error detector implemented by this method, but this method is limited by the sampling rate of AD, which deteriorates the detection result at high motor rotation speed, and cannot ensure the phase compensation accuracy at high motor rotation speed. In the counting phase compensation method, the pulse signals after sine and cosine comparison are counted without adopting an AD converter when the phase difference is detected, and the phase difference detection of the subdivided signals is realized through the counting difference between adjacent pulses. The method has the advantages that an AD converter is not needed, the requirement of hardware for the AD converter is reduced, and meanwhile, the compensation precision of the motor at high rotating speed can be guaranteed. However, at low rotational speeds, the demands on the processor are too high.
Disclosure of Invention
The present invention is directed to solve the above-mentioned problems, and an object of the present invention is to provide a control apparatus and method for an encoder, and an encoder, so as to solve the problems that in the prior art, in the correction or compensation of a subdivided signal, an intersection value phase compensation method cannot ensure the phase compensation precision when a motor rotates at a high speed, and a count phase compensation method has a poor compensation reliability when the requirement for a processor is too high at a low speed, thereby achieving an effect of improving the compensation reliability.
The present invention provides a control device of an encoder, comprising: the acquisition unit is used for acquiring an input signal of the encoder; the detection unit is used for detecting the current speed of the motor to which the encoder belongs through the input signal and comparing the current speed with a preset speed threshold; the compensation unit is used for performing first phase compensation on the input signal by adopting a set intersection value phase compensation method under the condition that the current speed is lower than or equal to the speed threshold value to obtain a first compensation signal; or under the condition that the current speed is higher than the speed threshold, performing second phase compensation on the input signal by adopting a set counting phase compensation method to obtain a second compensation signal.
Optionally, the obtaining unit includes: a sine and cosine comparison module; and the sine and cosine comparison module is used for receiving the input signal and converting the input signal from an analog signal into a pulse digital signal.
Optionally, the detection unit includes: a speed detection module; the speed detection module is used for detecting the current rotating speed of the motor through the pulse digital signal; and comparing the current speed with a preset speed threshold value to control the compensation unit to perform first phase compensation according to the intersection value phase compensation method when the current speed is lower than or equal to the speed threshold value, or to control the compensation unit to perform second phase compensation according to the counting phase compensation method when the current speed is higher than the speed threshold value.
Optionally, the compensation unit includes: the device comprises a pulse counting module, an AD sampling module and a phase difference compensation module; the pulse counting module is used for counting adjacent pulse edges of the pulse digital signal and calculating the phase deviation of the pulse digital signal according to the counting difference between the adjacent pulse edges; the AD sampling module is used for converting the input signal from an analog signal into a first digital signal; and the phase difference compensation module is used for performing first phase compensation or second phase compensation on the first digital signal according to the phase deviation to obtain a second digital signal which is used as a required first compensation signal or second compensation signal.
Optionally, the compensation unit further includes: a location subdivision module; and the position subdivision module is used for carrying out position subdivision on the second digital signal to obtain a required subdivision signal.
Optionally, wherein the input signal comprises: an analog sine and cosine signal; the formula of the simulated sine and cosine signal is as follows: sin0 ═ a × Sin θ; cos0 ═ a × Cos (θ +); sin0 and cos0 are analog sine and cosine signals, A is the amplitude of the sine and cosine signals, and theta is an angle and is phase deviation; and/or, the pulsed digital signal, comprising: pulse digital sine and cosine signals; in the pulse digital sine-cosine signal, the pulse edge change of the first signal corresponds to n × 360 ° and n × 360 ° +180 ° of Sin0, the pulse edge change of the second signal corresponds to n × 360 ° +90 ° and n × 360 ° +270 ° of Cos0, and n is an integer.
In accordance with another aspect of the present invention, there is provided an encoder, including: the control device for an encoder described above.
In match with the above encoder, another aspect of the present invention provides a method for controlling an encoder, including: acquiring an input signal of the encoder; detecting through the input signal to obtain the current speed of a motor to which the encoder belongs, and comparing the current speed with a preset speed threshold; under the condition that the current speed is lower than or equal to the speed threshold, performing first phase compensation on the input signal by adopting a set intersection value phase compensation method to obtain a first compensation signal; or under the condition that the current speed is higher than the speed threshold, performing second phase compensation on the input signal by adopting a set counting phase compensation method to obtain a second compensation signal.
Optionally, obtaining the input signal of the encoder includes: and receiving the input signal, and converting the input signal from an analog signal into a pulse digital signal.
Optionally, the obtaining of the current speed of the motor to which the encoder belongs through the input signal detection includes: detecting the current rotating speed of the motor through the pulse digital signal;
optionally, performing a first phase compensation on the input signal by using a set intersection value phase compensation method or performing a second phase compensation on the input signal by using a set counting phase compensation method includes: counting adjacent pulse edges of the pulse digital signal, and calculating the phase deviation of the pulse digital signal according to the counting difference between the adjacent pulse edges; converting the input signal from an analog signal to a first digital signal; and carrying out first phase compensation or second phase compensation on the first digital signal according to the phase deviation to obtain a second digital signal which is used as a required first compensation signal or second compensation signal.
Optionally, the performing a first phase compensation on the input signal by using a set intersection value phase compensation method, or performing a second phase compensation on the input signal by using a set counting phase compensation method, further includes: and carrying out position subdivision on the second digital signal to obtain a required subdivision signal.
According to the scheme of the invention, two phase compensation methods are combined, an intersection value phase compensation method is adopted when the motor rotates at a low speed, and a counting phase compensation method is adopted when the motor rotates at a high speed, so that the problem that the phase compensation precision is limited by the motor speed can be solved, and the compensation reliability is improved.
Furthermore, according to the scheme of the invention, two phase compensation methods are combined, the intersection value phase compensation method is adopted when the motor rotates at a low speed, and the counting phase compensation method is adopted when the motor rotates at a high speed, so that the problem that the compensation effect is limited by the AD sampling rate can be solved, the requirements of hardware on the AD sampling rate and the processor and the production cost are reduced, the compensation precision is improved, and the application range is enlarged.
Furthermore, according to the scheme of the invention, two phase compensation methods are combined, an intersection value phase compensation method is adopted when the motor rotates at a low speed, and a counting phase compensation method is adopted when the motor rotates at a high speed, so that the high-frequency phase compensation effect of the subdivision signal is improved, the purposes of enhancing the resolution and subdivision precision of the encoder are achieved, and the compensation reliability and the compensation precision are high.
Therefore, according to the scheme of the invention, two phase compensation methods are combined through the speed detection module, the intersection value phase compensation method is adopted when the motor rotates at a low speed, and the counting phase compensation method is adopted when the motor rotates at a high speed, so that the problems that in the prior art, in the process of correcting or compensating the subdivided signals, the intersection value phase compensation method cannot ensure the phase compensation precision when the motor rotates at a high speed, and the counting phase compensation method has poor compensation reliability due to the fact that the requirement on a processor is too high under the condition of low speed are solved, and therefore, the defects of poor compensation reliability, low control precision and small application range in the prior art are overcome, and the beneficial effects of good compensation reliability, good control precision and wide application range are realized.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
FIG. 1 is a schematic structural diagram of a control device of an encoder according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a sub-divided signal phase detection and compensation system according to an embodiment of the encoder of the present invention;
FIG. 3 is a diagram of a phase compensated pre-sine-cosine Lissajous representation of an embodiment of an encoder of the present invention;
FIG. 4 is a signal before phase compensation of an embodiment of an encoder of the present invention;
FIG. 5 is a flowchart illustrating an embodiment of a method for controlling an encoder according to the present invention;
FIG. 6 is a flow chart illustrating phase compensation of the current velocity according to an embodiment of the present invention.
The reference numbers in the embodiments of the present invention are as follows, in combination with the accompanying drawings:
1-sine and cosine comparison module; 2-a speed detection module; 3-a pulse counting module; 4-AD sampling module; 5-a phase difference compensation module; 6-position subdivision module.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the specific embodiments of the present invention and the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
According to an embodiment of the present invention, there is provided a control apparatus of an encoder. Referring to fig. 1, a schematic diagram of an embodiment of the apparatus of the present invention is shown. The control means of the encoder may comprise: the device comprises an acquisition unit, a detection unit and a compensation unit.
In an alternative example, the obtaining unit may be configured to obtain the input signal of the encoder.
Specifically, the input signal may include: analog sine and cosine signals. The formula of the simulated sine and cosine signal is as follows: sin0 ═ a × Sin θ; cos0 is a Cos (θ +).
Sin0 and cos0 are analog sine and cosine signals, a is the amplitude of the sine and cosine signals, and θ is the angle and is the phase deviation.
For example: as shown in fig. 4, Sin0 and Cos0 are input signals of the system, and due to the practical production capacity, there is a certain phase deviation between Sin0 and Cos0, and as shown in the lissajous diagram of fig. 3, Sin0 and Cos0 can be expressed by equation (1):
Sin0＝A*Sinθ
cos0 is represented by formula (1).
In formula (1), sin0 and cos0 are analog sine and cosine signals, a is the amplitude of the sine and cosine signals, and θ is the angle and is the phase deviation.
Therefore, the input reliability and the accuracy are high by using the simulated sine and cosine signals as the input signals.
Optionally, the obtaining unit may include: and a sine and cosine comparison module 1.
The sin-cos comparing module 1 may be configured to receive the input signal and convert the input signal from an analog signal (e.g., analog signals sin0, cos0) into a pulse digital signal (e.g., digital pulse signals sin1, cos 1).
For example: as shown in fig. 4, the sin-cos comparison module 1 is used to convert the analog signals sin0 and cos0 into digital pulse signals sin1 and cos 1.
For example: the sine and cosine comparison module 1 converts the input analog signals Sin0 and Cos0 into pulse signals Sin1 and Cos1, as shown in fig. 4; and the pulse edge variation of Sin1 corresponds to n x 360 ° and n x 360 ° +180 ° of Sin0, and the pulse edge variation of Cos1 corresponds to n x 360 ° +90 ° and n x 360 ° +270 ° of Cos0, n being an integer.
Therefore, the input signal is received and converted into the pulse digital signal from the analog signal, so that the current speed of the motor can be conveniently detected based on the pulse digital signal, subsequent phase compensation is facilitated, the acquisition mode is simple and convenient, and the accuracy of the acquisition result is good.
In an alternative example, the detecting unit may be configured to detect a current speed of a motor to which the encoder belongs through the input signal, and compare the current speed with a preset speed threshold.
Optionally, the detection unit may include: and a speed detection module 2.
The speed detection module 2 may be configured to obtain a current rotation speed of the motor through the detection of the pulse digital signal; and comparing the current speed with a preset speed threshold value to control the compensation unit to perform first phase compensation according to the intersection value phase compensation method when the current speed is lower than or equal to the speed threshold value, or to control the compensation unit to perform second phase compensation according to the counting phase compensation method when the current speed is higher than the speed threshold value.
For example: the function of the speed detection module 2 is to detect the current motor speed through digital pulse signals sin1 and cos 1. And a speed detection module 2 is added, an intersection value phase compensation method is adopted at low speed, a counting phase compensation method is adopted at high speed, the two methods are made up for each other, and the problem that the phase compensation precision is limited by the rotating speed of the motor is solved.
For example: the speed detection module 2 calculates the current speed value of the motor through pulse signals Sin1 and Cos1, compares the current speed value with a threshold speed value (obtained through multiple tests), and when the current speed value is lower than or equal to the threshold speed value, the system adopts an intersection value phase compensation method; when the current speed value is higher than the threshold speed value, the system adopts a counting phase compensation method, the method can ensure the phase compensation precision at high speed, and simultaneously, the requirement of hardware on a processor at high speed is not high.
For example: the two phase compensation methods are skillfully combined together through the speed detection module 2, and the effect of making up for the deficiencies of the two phase compensation methods is achieved. No matter the motor speed is high or low, the system can ensure ideal phase compensation precision, and simultaneously reduces the requirements of hardware on AD sampling rate and a processor and production cost.
Therefore, the current rotating speed of the motor is obtained through detection based on the pulse digital signal obtained through input signal conversion, and the corresponding phase compensation method is adopted to compensate according to the size relation between the current speed and the preset speed threshold value, so that the compensation reliability is high, the precision is high, and the cost is low.
Wherein, the pulse digital signal may include: pulse digital sine and cosine signals.
In the pulse digital sine-cosine signals, the pulse edge change of the first signal (such as Sin1) corresponds to n x 360 degrees and n x 360 degrees +180 degrees of Sin0, and the pulse edge change of the second signal (such as Cos1) corresponds to n x 360 degrees +90 degrees and n x 360 degrees +270 degrees of Cos0, wherein n is an integer.
Therefore, the pulse digital sine and cosine signals are used as the pulse digital signals, so that the detection is convenient, and the detection accuracy and reliability can be ensured.
In an optional example, the compensation unit may be configured to perform a first phase compensation on the input signal by using a set intersection value phase compensation method when the current speed is lower than or equal to the speed threshold, so as to obtain a first compensation signal; or under the condition that the current speed is higher than the speed threshold, performing second phase compensation on the input signal by adopting a set counting phase compensation method to obtain a second compensation signal.
For example: the two phase compensation methods are combined through the speed detection module, the intersection value phase compensation method is adopted when the motor rotates at a low speed and the counting phase compensation method is adopted when the motor rotates at a high speed, the two methods are combined, and the problem that the phase compensation precision is limited by the rotating speed of the motor is solved. The phase difference detection method can reduce the requirements of hardware on the AD sampling rate and the processor and the production cost, solve the problem that the compensation effect is limited by the AD sampling rate, improve the high-frequency phase compensation effect of the subdivision signal and achieve the aims of enhancing the resolution and subdivision precision of the encoder.
For example: according to different rotating speeds, a phase compensation method is determined, and phase compensation is carried out on input sine and cosine signals (namely subdivision signals).
When the current speed is equal to the set speed threshold, phase compensation needs to be performed on the sine and cosine signals (i.e., the sub-divided signals) by using an intersection value phase compensation method. That is, when the current speed is equal to or lower than the speed threshold, the phase compensation is performed on the sine and cosine signals (sub-divided signals) by using the intersection value compensation method.
Therefore, the input signal of the encoder is acquired, the current speed of the motor to which the encoder belongs is obtained through the input signal detection, and the phase compensation is carried out on the current speed according to the intersection value phase compensation method under the condition that the current speed is lower than or equal to the set speed threshold value, or the phase compensation is carried out according to the counting phase compensation method under the condition that the current speed is higher than the set speed threshold value, so that the compensation reliability is high, the accuracy is high, and the cost is low.
Optionally, the compensation unit may include: the device comprises a pulse counting module 3, an AD sampling module 4 and a phase difference compensation module 5.
In an optional specific example, the pulse counting module 3 may be configured to count adjacent pulse edges of the pulse digital signal, and calculate a phase deviation of the pulse digital signal according to a count difference between the adjacent pulse edges.
For example: the pulse counting module 3 is used for counting the adjacent pulse edges of the digital pulse signals sin1 and cos1, and calculating the phase deviation according to the counting difference between the adjacent pulses.
In an alternative embodiment, the AD sampling module 4 may be configured to convert the input signal from an analog signal (e.g., the analog signals sin0 and cos0) into a first digital signal (e.g., the digital signals sin2 and cos 2).
For example: the AD sampling module 4 functions to convert the analog signals sin0, cos0 into digital signals sin2, cos 2.
In an alternative specific example, the phase difference compensation module 5 may be configured to perform a first phase compensation or a second phase compensation on the first digital signal according to the phase deviation to obtain a second digital signal (e.g., the digital signal sin3, cos3) as the required first compensation signal or second compensation signal.
For example: the phase difference compensation module 5 is configured to perform phase compensation on the digital signals sin2 and cos2 according to the detected phase difference to obtain the digital signals sin3 and cos 3.
Therefore, the phase variation of the pulse digital signal is obtained by counting the adjacent pulse edges of the pulse digital signal and calculating according to the counting difference between the adjacent pulse edges; the input signal is converted from an analog signal into a first digital signal, and then the first digital signal is subjected to corresponding phase compensation according to the phase deviation to obtain the required compensation speed, wherein the compensation mode is reliable; and can compensate according to different rotational speeds respectively, application scope is wide.
Further optionally, the compensation unit may further include: a location subdivision module 6.
The position subdividing module 6 may be configured to perform position subdividing on the second digital signal to obtain a required subdivided signal.
For example: the position subdivision module 6 is operative to perform a position subdivision of the phase compensated digital signals sin3, cos 3.
Therefore, the required subdivision signal can be obtained by subdividing the position of the second digital signal, and the method is high in reliability and good in accuracy.
Through a large number of tests, the technical scheme of the invention combines two phase compensation methods, adopts an intersection value phase compensation method when the motor rotates at a low speed and adopts a counting phase compensation method when the motor rotates at a high speed, can solve the problem that the phase compensation precision is limited by the rotating speed of the motor, and improves the compensation reliability.
According to an embodiment of the present invention, there is also provided an encoder corresponding to the control device of the encoder. The encoder may include: the control device for an encoder described above.
In an optional embodiment, in order to solve the problems in the prior art, the present invention provides a system for detecting and compensating a phase of a subdivided signal of an absolute encoder, which can solve the problem of a phase compensation effect of the absolute encoder deteriorating when a motor rotates at a high speed, the problem of an absolute encoder having an excessively high requirement on an AD sampling rate for phase compensation, the problem of an absolute encoder having an excessively high requirement on a processor for phase compensation, and the problem of insufficient resolution and subdivision accuracy of the absolute encoder.
In an optional example, the two phase compensation methods are combined through the speed detection module, the intersection value phase compensation method is adopted when the motor rotates at a low speed, the counting phase compensation method is adopted when the motor rotates at a high speed, the two methods are combined, and the problem that the phase compensation precision is limited by the rotating speed of the motor is solved. The phase difference detection method can reduce the requirements of hardware on the AD sampling rate and the processor and the production cost, solve the problem that the compensation effect is limited by the AD sampling rate, improve the high-frequency phase compensation effect of the subdivision signal and achieve the aims of enhancing the resolution and subdivision precision of the encoder.
In an alternative embodiment, a specific implementation process of the scheme of the present invention may be exemplarily described with reference to the examples shown in fig. 2 to fig. 4.
As shown in fig. 2, the system for detecting and compensating the phase of a sub-divided signal of an absolute encoder according to the present invention may include: the device comprises a sine and cosine comparison module 1, a speed detection module 2, a pulse counting module 3, an AD sampling module 4, a phase difference compensation module 5 and a position subdivision module 6.
Specifically, as shown in fig. 4, the sin/cos comparison module 1 is used to convert the analog signals sin0 and cos0 into digital pulse signals sin1 and cos 1. The function of the speed detection module 2 is to detect the current motor speed through digital pulse signals sin1 and cos 1. The pulse counting module 3 is used for counting the adjacent pulse edges of the digital pulse signals sin1 and cos1, and calculating the phase deviation according to the counting difference between the adjacent pulses. The AD sampling module 4 functions to convert the analog signals sin0, cos0 into digital signals sin2, cos 2. The phase difference compensation module 5 is configured to perform phase compensation on the digital signals sin2 and cos2 according to the detected phase difference to obtain the digital signals sin3 and cos 3. The position subdivision module 6 is operative to perform a position subdivision of the phase compensated digital signals sin3, cos 3.
The speed detection module 2 is added, an intersection value phase compensation method is adopted at low speed, a counting phase compensation method is adopted at high speed, the two methods are made up for each other, and the problem that the phase compensation precision is limited by the rotating speed of the motor is solved.
In an optional specific example, the absolute encoder subdivided signal phase detection and compensation system in the present invention may be as shown in fig. 2, and mainly includes a sine and cosine comparison module 1, a speed detection module 2, a pulse counting module 3, an AD sampling module 4, a phase difference compensation module 5, and a position subdivision module 6.
As shown in fig. 4, Sin0 and Cos0 are input signals of the system, and due to the practical production capacity, there is a certain phase deviation between Sin0 and Cos0, and as shown in the lissajous diagram of fig. 3, Sin0 and Cos0 can be expressed by equation (1):
Sin0＝A*Sinθ
cos0 is represented by formula (1).
In formula (1), sin0 and cos0 are analog sine and cosine signals, a is the amplitude of the sine and cosine signals, and θ is the angle and is the phase deviation.
The sine and cosine comparison module 1 converts the input analog signals Sin0 and Cos0 into pulse signals Sin1 and Cos1, as shown in fig. 4; and the pulse edge variation of Sin1 corresponds to n x 360 ° and n x 360 ° +180 ° of Sin0, and the pulse edge variation of Cos1 corresponds to n x 360 ° +90 ° and n x 360 ° +270 ° of Cos0, n being an integer.
The speed detection module 2 calculates a current speed value of the motor through pulse signals Sin1 and Cos1, compares the current speed value with a threshold speed value (obtained through multiple tests), and when the current speed value is lower than or equal to the threshold speed value, the system adopts an intersection value phase compensation method; when the current speed value is higher than the threshold speed value, the system adopts a counting phase compensation method, the method can ensure the phase compensation precision at high speed, and simultaneously, the requirement of hardware on a processor at high speed is not high.
The phase detection and compensation system skillfully combines two phase compensation methods together through the speed detection module 2, thereby achieving the effect of making up for the deficiencies of the two methods. No matter the motor speed is high or low, the system can ensure ideal phase compensation precision, and simultaneously reduces the requirements of hardware on AD sampling rate and a processor and production cost.
Since the processes and functions implemented by the encoder of the present embodiment substantially correspond to the embodiments, principles, and examples of the apparatus shown in fig. 1, reference may be made to the related descriptions in the foregoing embodiments for details which are not described in the present embodiment, and thus no further description is given here.
Through a large number of tests, the technical scheme of the invention combines two phase compensation methods, adopts an intersection value phase compensation method when the motor rotates at a low speed and a counting phase compensation method when the motor rotates at a high speed, can solve the problem that the compensation effect is limited by the AD sampling rate, reduces the requirements of hardware on the AD sampling rate and a processor and the production cost, improves the compensation precision and enlarges the application range.
According to an embodiment of the present invention, there is also provided a control method of an encoder corresponding to the encoder, as shown in fig. 5, which is a schematic flow chart of an embodiment of the method of the present invention. The control method of the encoder may include: step S110 to step S130.
At step S110, an input signal of the encoder is acquired.
Optionally, the obtaining the input signal of the encoder in step S110 may include: the input signal is received and converted from an analog signal (e.g., analog signal sin0, cos0) to a pulsed digital signal (e.g., digital pulse signal sin1, cos 1).
For example: as shown in fig. 4, the sin-cos comparison module 1 is used to convert the analog signals sin0 and cos0 into digital pulse signals sin1 and cos 1.
For example: the sine and cosine comparison module 1 converts the input analog signals Sin0 and Cos0 into pulse signals Sin1 and Cos1, as shown in fig. 4; and the pulse edge variation of Sin1 corresponds to n x 360 ° and n x 360 ° +180 ° of Sin0, and the pulse edge variation of Cos1 corresponds to n x 360 ° +90 ° and n x 360 ° +270 ° of Cos0, n being an integer.
Therefore, the input signal is received and converted into the pulse digital signal from the analog signal, so that the current speed of the motor can be conveniently detected based on the pulse digital signal, subsequent phase compensation is facilitated, the acquisition mode is simple and convenient, and the accuracy of the acquisition result is good.
In step S120, a current speed of a motor to which the encoder belongs is detected from the input signal, and the current speed is compared with a preset speed threshold.
Optionally, the step S120 of obtaining the current speed of the motor to which the encoder belongs through the input signal detection may include: and detecting the current rotating speed of the motor through the pulse digital signal to compare the current speed with a preset speed threshold, and controlling the compensation unit to perform first phase compensation according to the intersection value phase compensation method when the current speed is lower than or equal to the speed threshold, or controlling the compensation unit to perform second phase compensation according to the counting phase compensation method when the current speed is higher than the speed threshold.
For example: the function of the speed detection module 2 is to detect the current motor speed through digital pulse signals sin1 and cos 1. And a speed detection module 2 is added, an intersection value phase compensation method is adopted at low speed, a counting phase compensation method is adopted at high speed, the two methods are made up for each other, and the problem that the phase compensation precision is limited by the rotating speed of the motor is solved.
For example: the speed detection module 2 calculates the current speed value of the motor through pulse signals Sin1 and Cos1, compares the current speed value with a threshold speed value (obtained through multiple tests), and when the current speed value is lower than or equal to the threshold speed value, the system adopts an intersection value phase compensation method; when the current speed value is higher than the threshold speed value, the system adopts a counting phase compensation method, the method can ensure the phase compensation precision at high speed, and simultaneously, the requirement of hardware on a processor at high speed is not high.
For example: the two phase compensation methods are skillfully combined together through the speed detection module 2, and the effect of making up for the deficiencies of the two phase compensation methods is achieved. No matter the motor speed is high or low, the system can ensure ideal phase compensation precision, and simultaneously reduces the requirements of hardware on AD sampling rate and a processor and production cost.
Therefore, the current rotating speed of the motor is obtained through detection based on the pulse digital signal obtained through input signal conversion, and the corresponding phase compensation method is adopted to compensate according to the size relation between the current speed and the preset speed threshold value, so that the compensation reliability is high, the precision is high, and the cost is low.
In step S130, if the current speed is lower than or equal to the speed threshold, performing a first phase compensation on the input signal by using a set intersection value phase compensation method to obtain a first compensation signal; or under the condition that the current speed is higher than the speed threshold, performing second phase compensation on the input signal by adopting a set counting phase compensation method to obtain a second compensation signal.
For example: the two phase compensation methods are combined through the speed detection module, the intersection value phase compensation method is adopted when the motor rotates at a low speed and the counting phase compensation method is adopted when the motor rotates at a high speed, the two methods are combined, and the problem that the phase compensation precision is limited by the rotating speed of the motor is solved. The phase difference detection method can reduce the requirements of hardware on the AD sampling rate and the processor and the production cost, solve the problem that the compensation effect is limited by the AD sampling rate, improve the high-frequency phase compensation effect of the subdivision signal and achieve the aims of enhancing the resolution and subdivision precision of the encoder.
Wherein, when the current speed is equal to the set speed threshold value, the phase compensation is not needed.
Therefore, the input signal of the encoder is acquired, the current speed of the motor to which the encoder belongs is obtained through the input signal detection, and the phase compensation is carried out on the current speed according to the intersection value phase compensation method under the condition that the current speed is lower than or equal to the set speed threshold value, or the phase compensation is carried out according to the counting phase compensation method under the condition that the current speed is higher than the set speed threshold value, so that the compensation reliability is high, the accuracy is high, and the cost is low.
Optionally, with reference to a flowchart of an embodiment of performing phase compensation on the current speed in the method of the present invention shown in fig. 6, a specific process of performing first phase compensation on the input signal by using a set intersection value phase compensation method or performing second phase compensation on the input signal by using a set counting phase compensation method in step S130 may further include: step S210 to step S230.
Step S210, counting adjacent pulse edges of the pulse digital signal, and calculating a phase deviation of the pulse digital signal according to a count difference between the adjacent pulse edges.
For example: the pulse counting module 3 is used for counting the adjacent pulse edges of the digital pulse signals sin1 and cos1, and calculating the phase deviation according to the counting difference between the adjacent pulses.
In step S220, the input signal is converted from an analog signal (e.g., the analog signals sin0, cos0) into a first digital signal (e.g., the digital signals sin2, cos 2).
For example: the AD sampling module 4 functions to convert the analog signals sin0, cos0 into digital signals sin2, cos 2.
Step S230, performing a first phase compensation or a second phase compensation on the first digital signal according to the phase deviation to obtain a second digital signal (e.g. digital signal sin3, cos3) as a required first compensation signal or second compensation signal.
For example: the phase difference compensation module 5 is configured to perform phase compensation on the digital signals sin2 and cos2 according to the detected phase difference to obtain the digital signals sin3 and cos 3.
Therefore, the phase variation of the pulse digital signal is obtained by counting the adjacent pulse edges of the pulse digital signal and calculating according to the counting difference between the adjacent pulse edges; the input signal is converted from an analog signal into a first digital signal, and then the first digital signal is subjected to corresponding phase compensation according to the phase deviation to obtain the required compensation speed, wherein the compensation mode is reliable; and can compensate according to different rotational speeds respectively, application scope is wide.
Further optionally, the performing, in step S130, a first phase compensation on the input signal by using a set intersection value phase compensation method, or performing a second phase compensation on the input signal by using a set counting phase compensation method, may further include: and carrying out position subdivision on the second digital signal to obtain a required subdivision signal.
For example: the position subdivision module 6 is operative to perform a position subdivision of the phase compensated digital signals sin3, cos 3.
Therefore, the required subdivision signal can be obtained by subdividing the position of the second digital signal, and the method is high in reliability and good in accuracy.
Since the processing and functions implemented by the method of the present embodiment substantially correspond to the embodiments, principles and examples of the encoder shown in fig. 2 to fig. 4, the description of the present embodiment is not detailed, and reference may be made to the related descriptions in the foregoing embodiments, which are not repeated herein.
Through a large number of tests, the technical scheme of the embodiment is adopted, two phase compensation methods are combined, the intersection value phase compensation method is adopted when the motor rotates at a low speed, the counting phase compensation method is adopted when the motor rotates at a high speed, the high-frequency phase compensation effect of the subdivision signal is improved, the purposes of enhancing the resolution ratio and the subdivision precision of the encoder are achieved, and the compensation reliability and the compensation precision are high.
In summary, it is readily understood by those skilled in the art that the advantageous modes described above can be freely combined and superimposed without conflict.
The above description is only an example of the present invention, and is not intended to limit the present invention, and it is obvious to those skilled in the art that various modifications and variations can be made in the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.
Claims (10)
1. A control device of an encoder, comprising: the device comprises an acquisition unit, a detection unit and a compensation unit; wherein the content of the first and second substances,
the acquisition unit is used for acquiring an input signal of the encoder; the acquisition unit includes: a sine and cosine comparison module (1); the sine and cosine comparison module (1) is used for receiving the input signal and converting the input signal from an analog signal into a pulse digital signal;
the detection unit is used for detecting the current speed of the motor to which the encoder belongs through the input signal and comparing the current speed with a preset speed threshold;
the compensation unit is used for performing first phase compensation on the input signal by adopting a set intersection value phase compensation method under the condition that the current speed is lower than or equal to the speed threshold value to obtain a first compensation signal; under the condition that the current speed is higher than the speed threshold, performing second phase compensation on the input signal by adopting a set counting phase compensation method to obtain a second compensation signal;
the compensation unit includes: the device comprises a pulse counting module (3), an AD sampling module (4) and a phase difference compensation module (5); wherein the content of the first and second substances,
the pulse counting module (3) is used for counting adjacent pulse edges of the pulse digital signal and calculating the phase deviation of the pulse digital signal according to the counting difference between the adjacent pulse edges;
the AD sampling module (4) is used for converting the input signal from an analog signal into a first digital signal;
and the phase difference compensation module (5) is used for performing first phase compensation or second phase compensation on the first digital signal according to the phase deviation to obtain a second digital signal which is used as a required first compensation signal or second compensation signal.
2. The apparatus of claim 1, wherein the detection unit comprises: a speed detection module (2);
the speed detection module (2) is used for detecting the current rotating speed of the motor through the pulse digital signal; and comparing the current speed with a preset speed threshold value, so as to control the compensation unit to perform first phase compensation according to the intersection value phase compensation method when the current speed is lower than or equal to the speed threshold value, and to control the compensation unit to perform second phase compensation according to the counting phase compensation method when the current speed is higher than the speed threshold value.
3. The apparatus of claim 1, wherein the compensation unit further comprises: a location subdivision module (6);
and the position subdivision module (6) is used for carrying out position subdivision on the second digital signal to obtain a required subdivision signal.
4. The apparatus according to one of claims 1 to 3, wherein,
the input signal comprises: an analog sine and cosine signal; the formula of the simulated sine and cosine signal is as follows:
wherein sin0 and cos0 are analog sine and cosine signals, A is the amplitude of the sine and cosine signals,
in order to be an angle, the angle is,
is the phase deviation;
and/or the presence of a gas in the gas,
the pulse digital signal comprises: pulse digital sine and cosine signals;
in the pulse digital sine-cosine signal, the pulse edge change of the first signal corresponds to n × 360 ° and n × 360 ° +180 ° of Sin0, the pulse edge change of the second signal corresponds to n × 360 ° +90 ° and n × 360 ° +270 ° of Cos0, and n is an integer.
5. An encoder, comprising: control means for an encoder according to any one of claims 1 to 4.
6. A method of controlling an encoder according to claim 5, comprising:
acquiring an input signal of the encoder;
detecting through the input signal to obtain the current speed of a motor to which the encoder belongs, and comparing the current speed with a preset speed threshold;
under the condition that the current speed is lower than or equal to the speed threshold, performing first phase compensation on the input signal by adopting a set intersection value phase compensation method to obtain a first compensation signal; and under the condition that the current speed is higher than the speed threshold, performing second phase compensation on the input signal by adopting a set counting phase compensation method to obtain a second compensation signal.
7. The method of claim 6, wherein obtaining the input signal to the encoder comprises:
and receiving the input signal, and converting the input signal from an analog signal into a pulse digital signal.
8. The method of claim 7, wherein detecting the current speed of the motor to which the encoder belongs from the input signal comprises:
and detecting the current rotating speed of the motor through the pulse digital signal.
9. The method of claim 7 or 8, wherein performing a first phase compensation on the input signal by using a set intersection value phase compensation method or performing a second phase compensation on the input signal by using a set counting phase compensation method comprises:
counting adjacent pulse edges of the pulse digital signal, and calculating the phase deviation of the pulse digital signal according to the counting difference between the adjacent pulse edges;
converting the input signal from an analog signal to a first digital signal;
and carrying out first phase compensation or second phase compensation on the first digital signal according to the phase deviation to obtain a second digital signal which is used as a required first compensation signal or second compensation signal.
10. The method of claim 9, wherein performing a first phase compensation on the input signal by using a set cross point value phase compensation method or performing a second phase compensation on the input signal by using a set count phase compensation method, further comprising:
and carrying out position subdivision on the second digital signal to obtain a required subdivision signal.
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| CN101213423A (en) * | 2006-06-19 | 2008-07-02 | 松下电器产业株式会社 | Phase correction circuit of encoder signal |
| CN101131329A (en) * | 2006-08-22 | 2008-02-27 | 松下电器产业株式会社 | Correction circuit for coder signal |
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