CN101119179B

CN101119179B - Transmission system

Info

Publication number: CN101119179B
Application number: CN2006101083524A
Authority: CN
Inventors: 谢武洪; 扬睿
Original assignee: Ali Corp
Current assignee: Ali Corp
Priority date: 2006-08-02
Filing date: 2006-08-02
Publication date: 2010-06-09
Anticipated expiration: 2026-08-02
Also published as: CN101119179A

Abstract

The present inventionrelates to a transmission system comprising a receiving device and a conveying device. The conveying device is used for transmitting a first data and a second data to the receiving device and comprises a cache unit, a storage unit and a transmission unit. The cache unit is used for storing a stopping value and the storage unit stores the first data and the second data. The transmission unit collects the first data and transmits to the receiving device and then collects the second data and transmits to the receiving device after waiting for a prearranged time according to the stopping value.

Description

Transmission system

Technical field

The invention relates to a kind of transmission system, particularly relevant for a kind of (programmable) the able to programme transmission system of time of delay.

Background technology

In System on Chip/SoC (system on chip), all can add conveyer usually, to carry out system communication.General common conveyer is UART Universal Asynchronous Receiver Transmitter (Universal AsynchrorousReceiver/Transmitter; Hereinafter to be referred as UART).At set-top box (Set Top Box; STB) in the System on Chip/SoC, UART often is used in condition and receives (Conditional Access; CA) in the system, as the controller of smart card (smart card, IC card, 7816 card).

In this system, if use non-first-in first-out (First-In First-Out; When FIFO) pattern is carried out transfer of data, be easy to shortcomings such as the generation systems data consumes is big, interruption is many.If when using the first-in first-out pattern, smart card requires at UART to need to have a fixing blanking time between two bytes usually when sending data.

Yet in known byte, each byte can have one or two position of rests.Therefore be the duration of one or two position of rest the blanking time between byte.The blanking time that smart card requires is usually greater than duration of two position of rests.

Known settling mode is to utilize software to control blanking time between two hytes.Yet, when central processing unit (CPU) is busy state, or under the many especially situations of the data that send, be easy to cause the blanking time between two bytes long, make smart card that overtime (timeout) take place, thereby cause separating problem such as mistake.

Summary of the invention

For solving present the above-mentioned problems in the prior art, the invention provides a kind of transmission system, comprise a receiving system and a conveyer.Conveyer sends receiving system in order to transmit first and second data, and comprises a buffer unit, a storage element and a transmission unit.Buffer unit stops value in order to store one.Storage unit stores one first data and one second data.Transmission unit is gathered first data and is sent a receiving system to, and according to stopping value, wait for a Preset Time after, gather second data again and send receiving system to.

Description of drawings

Fig. 1 is a transmission system schematic diagram of the present invention.

Fig. 2 is data D ₁And D ₂Transformat.

Fig. 3 is that one of transmission unit may embodiment.

Symbol description:

12: receiving system; 14: conveyer;

142: buffer unit; 144: storage element;

146: transmission unit; 148: clock generator;

20: Qi Shiwei; 21～28: data bit;

29: the coordination position; 32: digit counter;

34: byte counter; 36: delay counter;

38: controller.

Embodiment

For above and other objects of the present invention, feature and advantage can be become apparent, cited below particularlyly go out preferred embodiment, and cooperate appended graphicly, be described in detail below:

Fig. 1 is a transmission system schematic diagram of the present invention.As shown in the figure, transmission system 10 comprises receiving system 12 and conveyer 14.Conveyer 14 transmits data and gives receiving system 12, and the blanking time between may command two data.In the present embodiment, conveyer 14 is a UART Universal Asynchronous Receiver Transmitter, transmits data D with asynchronous system ₁And D ₂Give receiving system 12, wherein data D ₁And D ₂Between blanking time be can be controlled.

Conveyer 14 comprises buffer unit 142, storage element 144 and transmission unit 146.Buffer unit 142 stores one and stops to be worth S _SStorage element 144 storage data D ₁And D ₂Transmission unit 146 image data D ₁Send receiving system 12 to, and according to stopping to be worth S _S, wait for a Preset Time after, image data D again ₂Send receiving system 12 to.

Fig. 2 is data D ₁And D ₂Transformat.Data D ₁And D ₂Include one and open beginning position (startbit) 20, data bit (data bits) 21～28 and one coordination position (parity bit) 29.The present invention is the quantity of restricting data position not, in the present embodiment, and data D ₁And D ₂Data bit be eight positions.At data D ₁And D ₂In, the duration T of each is all identical.

Fig. 3 is that one of transmission unit may embodiment.Transmission unit 146 comprises, digit counter 32, byte counter 34, delay counter 36 and controller 38.

Digit counter 32 is according to clock signal S _CLKBegin counting.In the present embodiment, clock signal S _CLKProduced by a clock generator 148.When digit counter 32 counts up to one first default value, carry-out bit triggering signal S then _T1Give byte counter 34 and controller 38.When controller 38 receives the triggering signal S that puts in place _T1The time, then begin to receive data D ₁Open beginning position 20.

In the present embodiment, digit counter 32 time of counting up to first default value equals data D ₁The duration T of single position.Therefore, receive data D when controller 38 ₁Opened beginning position at 20 o'clock, digit counter 32 is carry-out bit triggering signal S once more _T1, make controller 38 continue image data D ₁Data bit 21, and with data D ₁The beginning position 20 of opening export receiving system 14 to.

At digit counter 32 carry-out bit triggering signal S _T1The time, byte counter 34 is according to position triggering signal S _T1Begin counting.When byte counter 34 counts up to one second default value, output byte triggering signal S then _T2,, and make controller 38 stop to gather data in the storage element 144 in order to trigger delay counter 36.

In the present embodiment, byte counter 34 time of counting down to second default value equals data D ₁Total time 10T.When byte counter 34 count down to second default value, because controller 38 has been gathered data D ₁All positions, and with data D ₁Be sent to receiving system 12, therefore suspend the collection action of controller 38.

At byte counter 34 output byte triggering signal S _T2After, delay counter 36 begins counting.When delay counter 36 counts up to one the 3rd default value, then output delay triggering signal S _T3, make controller 38 begin to gather the data D in the storage element 144 ₂

In the present embodiment, receive byte triggering signal S when controller 38 _T2The time, then can keep in and gather storage element 144; When controller 38 receives delayed trigger signal S _T3The time, then can begin to gather storage element 144.Therefore, delay counter 36 time of counting up to the 3rd default value equals the time that controller 38 suspends.

Because the blanking time between transmission unit 146 two data able to programme, to meet the requirement of smart card, and need not the software timing, thereby the resource consumption of reduction system, simultaneously also avoided central processing unit data to be sent to conveyer 14, and caused the overtime problem of smart card because of busy having little time.

Though the present invention discloses as above with preferred embodiment; right its is not in order to limiting the present invention, anyly has the knack of this skill person, without departing from the spirit and scope of the present invention; when the change that can do a little and retouching, so protection scope of the present invention is as the criterion when looking the claim person of defining.

Claims

1. hardware transmission system comprises:

One receiving system; And

One conveyer, in order to send first and second data to this receiving system, this conveyer comprises:

One buffer unit stops value in order to store one;

One storage element stores this first and second data; And

One transmission unit is gathered these first data and is sent this receiving system to, and according to this value of stopping, waiting for a Preset Time after, gather these second data again and send this receiving system to.

2. hardware transmission system as claimed in claim 1, wherein these first and second data all have ten.

3. hardware transmission system as claimed in claim 2, wherein ten of these first and second data comprise, one opens beginning position, eight data bit and a coordination position.

4. hardware transmission system as claimed in claim 2 also comprises a clock generator, in order to produce a clock signal.

5. hardware transmission system as claimed in claim 4, this transmission unit wherein comprises:

One controller is gathered these ten of these first data earlier and is sent this receiving system to;

One digit counter, when this controller collects of this first data, then begin counting according to this clock signal, when counting up to one first default value, then export a triggering signal, wherein this digit counter time of counting up to this first default value equals the duration of the single position of these first data;

One byte counter, begin counting according to this triggering signal, when counting up to one second default value, then export a byte triggering signal, make this controller stop to gather the data in this storage element, and this byte counter time of counting up to this second default value equal the total time of these first data; And

One delay counter, begin counting according to this byte triggering signal, when counting up to this value of stopping, then export a delayed trigger signal and send this controller to, make its described a plurality of positions that begin to gather these second data, wherein this delay counter time of counting down to this value of stopping equals the time that this controller suspends.

6. hardware transmission system as claimed in claim 5, wherein this controller is to transmit this first and second data with an asynchronous system.

7. hardware transmission system as claimed in claim 6, wherein when this digit counter was exported this triggering signal, then this controller provided this position of these first data that collected to send this receiving system to.

8. hardware transmission system as claimed in claim 6, wherein this conveyer is a UART Universal Asynchronous Receiver Transmitter.

9. hardware transmission system as claimed in claim 6, wherein this delay counter time of counting up to this value of stopping equals this Preset Time.