CN101063698A - Power distribution network fault testing method based on topology picture - Google Patents

Power distribution network fault testing method based on topology picture Download PDF

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Publication number
CN101063698A
CN101063698A CN 200710035057 CN200710035057A CN101063698A CN 101063698 A CN101063698 A CN 101063698A CN 200710035057 CN200710035057 CN 200710035057 CN 200710035057 A CN200710035057 A CN 200710035057A CN 101063698 A CN101063698 A CN 101063698A
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fault
test
database
vector
circuit
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CN100492032C (en
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阳春华
桂卫华
王罡
王雅琳
朱红求
唐朝晖
李勇刚
谢永芳
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Central South University
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Central South University
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Abstract

This invention relates to one match system fault test method based on topological image composed of previous and afterwards diagnose phases, which comprises the following steps: firstly establishing one dynamic update database and inputting regular ones into it and accordingly updating false priority; then the injection system selects the false into aim circuit for simulation to generate false test codes to form the database and comparing the feedback result with database to find out false rapidly; afterwards false judgment to insulate and exclude false for index and position according to the image circuit structure.

Description

A kind of power distribution network fault testing method based on topological diagram
Technical field the present invention relates to a kind of fault testing method of distribution system.
The background technology power distribution system for vehicle mainly refers to special vehicle, as is the distribution system of tank and panzer etc., mainly comprises block terminal and boxcar.Tank or panzer artillery system are the important means of giving full play to tank or panzer firepower, improving the battlefield viability.Block terminal and boxcar model reach tens kinds more than, have short run, performance structure variation, characteristics such as complicated.Difference is very big between the various model block terminals, and working environment and function are different, and the correctness that need be connected with internal wiring the quality of components and parts is carried out testing and diagnosing.Block terminal has following characteristics: based on relay, other devices are auxilliary in the components and parts; Relay logic operation circuit very complicated; Functional circuit is many, the which couple between difference in functionality is strong; The internal circuit need seal in other circuit modules by external interface and device could be formed realization functional integrity circuit; Pumping signal and can survey node and all can only operate from external interface.By these characteristics as can be known, only rely on the lid of opening block terminal to estimate circuit, it has no problem to be difficult to reliable diagnostic, need carry out comprehensive testing and diagnosing to all devices of block terminal, circuit and could judge its quality.
Diagnostic method can be summarized as following key step:
1. analysis principle figure sets test vector.Test vector comprises test condition and test result.Test condition refers to that the signal introduced from the block terminal external interface, test result refer to the signal that detects from the block terminal external interface, and the signal of being introduced by these interfaces and the signal of detection form one group one group test vector to be come block terminal is detected.Therefore the first step of test is exactly according to schematic diagram, puts out all test vectors of assurance block terminal integrality in order.
2. analyze external pin and introduce signal type, the design stube cable.In test process, need to apply pumping signal to the block terminal pin according to test vector, and the added signal of block terminal pin has nothing in common with each other, therefore will be according to the test vector analysis of arrangement, design and produce out corresponding stube cable, one end connects the block terminal external interface, and an end connects exciting signal source.
3. according to the test condition in the test vector, add corresponding signal for the block terminal respective pins.
4. according to the test result in the test vector, detect the return signal of block terminal respective pins.
5. according to the signal that returns, judge, analyze, diagnose out problematic circuit and device.
In finishing test vector the institute in steps, end of test (EOT).
By the characteristics of block terminal and method of testing as can be known, problem and difficult point that existing method of testing mainly exists are as follows: localization of fault is indeterminate, and diagnosis speed is slow, and fault diagnosis is not comprehensive, and automaticity is low.Existing method of testing adopts manually control operation fully, and the operator is easy to operating mistake in the test process.The error message of test can not show intuitively, needs the tester to contrast schematic diagram and searches, and the speed of diagnosis has very big relation with operator's skill level.
Summary of the invention
The purpose of this invention is to provide a kind of distribution system method for diagnosing faults based on topological diagram.
Distribution system method for diagnosing faults of the present invention is divided into two stages: survey the prior fault diagnosis and survey rear fault diagnosis.Surveying the prior fault diagnosis mainly is to adopt fault dictionary method.At first need to set up a fault database that can dynamically update, the fault that often occurs is input to fault database, and can upgrades according to test result the priority level of tracing trouble.Then from fault database, select fault to be injected in the objective circuit by fault injection system, and utilize circuit simulation system to carry out fault simulation, generate the fault test code, form fault dictionary, after test is finished, test result information and the fault dictionary that returns compared, can therefrom find out fast the fault of generation.Fault diagnosis then is according to the test result after the test after surveying, not Fault Isolation, the eliminating of generation, and carry out fault search, search according to the graphics circuitry structure, with fault location.Method for diagnosing faults at first will be set up the test vector incidence matrix after surveying, and is used for representing the relation of test vector and element.Row in the test vector incidence matrix is made up of the element of test result, row in the incidence matrix are made up of the element in the subgraph circuit and line summit, element in the matrix represents that with " 0 " and " 1 " element relevant with test represents that with " 1 " other represents with " 0 ".According to the as a result automatic analysis incidence matrix after the test, the components and parts that testing result is correct are got rid of from fault, and fault coverage is partitioned to minimum, and in the graphics edition platform fault are shown then.
Adopt block terminal method for diagnosing faults of the present invention, the speed of diagnosis, comprehensive, accuracy are improved greatly, search fault automatically, improved the automaticity of diagnosis, reduced staff's labour intensity, improved work efficiency by computing machine.
Description of drawings
Fig. 1 is improved method of testing graph of a relation;
Fig. 2 sets up and renewal process figure for fault database;
Fig. 3 is the generative process figure of fault dictionary.
Embodiment
The present invention is described in further detail below in conjunction with accompanying drawing.
1, surveys the prior fault diagnosis
At first need to set up fault database, fault database is to be used for storing the contingent fault of block terminal.The process of setting up of fault database as shown in Figure 2.For the fault database of a sky, need manually add the fault element according to the characteristics of block terminal and experience in the past by the staff, the probability that this moment, fault database internal fault element took place is an initial value all, and the priority of fault element is determined by the staff.After each test is finished, system is kept at diagnostic result in the database automatically, after the test through in batches certain and certain hour, namely can from database, extract relevant data and carry out statistical analysis, the fault element is arranged priority according to the size of probability of happening, and the element in the fault database is upgraded.The fault database of the dynamic adjustment that this method is set up when carrying out the test of different model block terminal, can be chosen fault type according to priority and set up fault dictionary, and more incidental fault is diagnosed more earlier.
Need fault is injected in the block terminal circuit after setting up fault database.Fault is injected, namely according to selected fault model, produce consciously fault and put in the specific objective circuit with artificial method, so that objective circuit makes a mistake, adopt simultaneously Circuit Emulation Service that the circuit that injects fault is carried out simulation calculation, obtain the test result of faulty circuit.After fault was injected, the circuit that has injected fault just substituted with corresponding fault model, and the recycling Circuit Emulation Service carries out fault simulation, and specific operation process as shown in Figure 3.Each circuit that has injected fault will generate corresponding fault test code through circuit simulation system, thereby sets up fault dictionary.
The test process of block terminal is by the control of the test condition in the test vector, and whether break down after the test is also shown by the test result in the test vector, so the expression of test patterns is also closely bound up with test vector.By test vector as can be known, each group test result in test vector has more than or equal to 1 element, and wherein the circuit or the device of the represented test of each element are all different.Also just usually embodied by the unit in these test results when therefore, breaking down.For example, F appears 0During fault, second element of test result and standard value do not meet in first group of test vector, then F 0Just comprise " 1.2 " this element in the test patterns of fault, represent which group test vector before the decimal point, expression belongs to which element of test result in the reorganization test vector after the decimal point.F appears 0The complete test patterns of fault then is made up of according to above-mentioned method the unusual test vector of occur.Table 5-4 has represented the fault test sign indicating number that partial fault generates.
Table 2 partial fault dictionary
Fault The fault test code
F 0Fault 1.2,3.1,5.4
F 1Fault 1.1,2.1,4.1,6.3
F 2Fault 3.2,4.1,5.2,5.3,10.2
F 3Fault 5.1,8.3,9.2,13.1
Fault test code by one group one group is lined up, and namely can be configured to a fault dictionary.Set up after the fault dictionary, the post-analysis of survey of fault is just simple, and concrete steps are as follows:
1. after block terminal is tested, preserve its test result, the test vector that all test results is unusual combines, and forms out of order test patterns.
2. the fault test code of step in 1. searched in fault dictionary, if in the fault dictionary test patterns of certain fault belong to step 1. in the subset of the out of order test patterns of institute, then represent this fault has taken place, thereby determine the state that tested block terminal is current.
If in fault dictionary, can not find the subset of test patterns, and really there is the unusual situation of test result, then adopts the rear fault diagnosis of survey to search.
2, survey rear fault diagnosis
Survey the back fault diagnosis, at first will set up the test vector incidence matrix.The test vector incidence matrix is the relation of expression test vector and element.Interconnection vector of each element representation of test result, be that row in the test vector incidence matrix is made up of the element of test result, row in the incidence matrix are made up of the element in the subgraph circuit and line summit, element in the matrix represents with " 0 " and " 1 ", the element relevant with test represents that with " 1 " other represents with " 0 ".
After block terminal is tested according to test vector, if the result who detects and the standard value in the test result do not meet, then the associated element of this test has at least one to break down, and namely the element in the corresponding interconnection vector of this test result element has at least one fault is arranged.But only rely on this interconnection vector also to be not enough to determine the concrete element that breaks down, fault accurately can not be located.Under many circumstances, certain element in the block terminal is not only only tested in one group of test vector, all can comprise this element but organize in the test vector more.Therefore, need to Fault Isolation, allow the scope of failure judgement element dwindle.
Utilize incidence matrix to come the primitive rule of isolated fault to have following several:
Rule one: any interconnection vector that comprises an element, no matter whether its test result is correct, can both uniquely determine the state (normal or fault) of this element.
Rule two: the element that the interconnection vector that test result is correct is associated can be defined as normal condition.
Rule three: in the associated element of the interconnection vector that test result is unusual, if the element of determining state in the above-mentioned rule is arranged, then it can be got rid of, until the fault element of confirming is counted minimum.
Can at first the correct test vector that only comprises an element be decided according to rule one.Confirm that according to the associated element state of interconnection vector that rule two can be correct with test result specific operation process is that the interconnection vector that test result is correct carries out OR operation, obtains the interconnection vector of all normal elements.According to regular three the element rows of committed state is removed again, namely realized according to the interconnection vector of the normal element of rule two all that obtain.Concrete operations are carried out xor operation for the element for corresponding row in the interconnection vector of the element of " 1 " and normal element in the interconnection vector that test result is unusual, for the element of " 0 " still is " 0 ", do not carry out any operation.
In the vector that operation draws, if an element for " 1 " is only arranged, then its pairing element is a fault element thus; If have, then can not uniquely determine which element breaks down, but the scope of fault element be dwindled greater than a element for " 1 ".
Adopt and survey the block terminal method for diagnosing faults that combines behind the before measurement, both guaranteed rapidity and the practicality of fault diagnosis, guaranteed again the integrality of fault diagnosis.

Claims (1)

1. power distribution network fault testing method based on topological diagram, it is characterized in that: method for diagnosing faults is divided into to be surveyed prior fault diagnosis and rear two stages of fault diagnosis of survey, survey the prior fault diagnosis and adopt fault dictionary method, fault database that dynamically updates of model, the fault that often occurs is input to fault database, and upgrades the priority level of tracing trouble according to test result; Then by fault injection system, from fault database, select fault to be injected in the objective circuit, and utilize circuit simulation system to carry out fault simulation, generate the fault test code, form fault dictionary, after test is finished, test result information and the fault dictionary that returns compared, therefrom find out fast the fault of generation; Fault diagnosis then is according to the test result after the test after surveying, will be less than the Fault Isolation that takes place, get rid of, and carry out fault search according to the graphics circuitry structure, search, with fault location, method for diagnosing faults model test vector incidence matrix after surveying, be used for representing the relation of test vector and element, row in the test vector incidence matrix is made up of the element of test result, row in the incidence matrix are made up of the element in the subgraph circuit and line summit, element in the matrix represents with " 0 " and " 1 ", the element relevant with test represents with " 1 ", other represents that with " 0 " according to the as a result automatic analysis incidence matrix after the test, the components and parts that testing result is correct are got rid of then from fault, fault coverage is partitioned to minimum, and in the graphics edition platform, fault is shown.
CNB2007100350575A 2007-06-05 2007-06-05 Power distribution network fault testing method based on topology picture Expired - Fee Related CN100492032C (en)

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CN102724167A (en) * 2011-03-29 2012-10-10 联想(北京)有限公司 Method and device for logging in information server
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CN102724167B (en) * 2011-03-29 2015-12-16 联想(北京)有限公司 A kind of method of log-on message server and device
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CN102565623A (en) * 2011-12-21 2012-07-11 北京交通大学 Method and device for online fault search positioning of multi-branch complex distribution network
CN103675514A (en) * 2012-09-12 2014-03-26 株式会社日立制作所 Logic circuit and control apparatus using the same
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CN103942261A (en) * 2014-03-24 2014-07-23 北京航天发射技术研究所 Allocation input method for vehicle-mounted system fault dictionary
CN103942261B (en) * 2014-03-24 2017-12-12 北京航天发射技术研究所 A kind of configuration input method for onboard system fault dictionary
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CN106226657A (en) * 2016-09-07 2016-12-14 上海市政工程设计研究总院(集团)有限公司 A kind of power supply interrupted district recognition methods for electric network failure diagnosis
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CN109752968A (en) * 2017-11-07 2019-05-14 瑞萨电子株式会社 Simulator and computer readable storage medium
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