CN101059940A - Operation amplifier driving circuit for eliminating the operational amplifier offset voltage - Google Patents
Operation amplifier driving circuit for eliminating the operational amplifier offset voltage Download PDFInfo
- Publication number
- CN101059940A CN101059940A CN 200610075831 CN200610075831A CN101059940A CN 101059940 A CN101059940 A CN 101059940A CN 200610075831 CN200610075831 CN 200610075831 CN 200610075831 A CN200610075831 A CN 200610075831A CN 101059940 A CN101059940 A CN 101059940A
- Authority
- CN
- China
- Prior art keywords
- operational amplifier
- transistor
- switch
- input end
- offset voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Amplifiers (AREA)
Abstract
An operation amplifier drive circuit for eliminating the bias voltage of operation amplifier comprises an operation amplifier with a chopper, a first input, a second input and an output, a first switch for receiving an input voltage to be connected to the first input of the operation amplifier, a second switch connected with the first input and the output of the operation amplifier, a third switch connected with the second input and the output of the operation amplifier, and a capacitor connected with the second input of the operation amplifier. The output of the operation amplifier directly discharges and charges the capacitor, and the polarities of the first and the second inputs of the operation amplifier can be exchanged, therefore, the drive circuit can avoid improving the drive ability of input signal, shorten the discharge/charge time of capacitor and eliminate bias voltage.
Description
Technical field
The present invention relates to a kind of operational amplifier driving circuit, specifically, relate to a kind of operational amplifier driving circuit of eliminating the operational amplifier offset voltage.
Background technology
(Thin Film Transistor liquid crystal display, the output voltage of source electrode driver TFT-LCD) (Source Driver) is driven by operational amplifier (Operational Amplifier) general Thin Film Transistor-LCD.Therefore, the offset voltage of operational amplifier (offset voltage) can influence the output voltage of source electrode driver.And operational amplifier can be because of the relation of manufacturing process, and the offset voltage that causes each operational amplifier to export is inequality, and then has influence on the color quality of LCD.Therefore, eliminating this offset voltage is the problem that source electrode driver must solve.
Figure 1A is the operational amplifier driving circuit that the operational amplifier of prior art is eliminated offset voltage.Shown in Figure 1A, this operational amplifier driving circuit 10 comprises three switches 11,12 and 13, electric capacity 14 and operational amplifier 15.Input signal Vin inputs to the positive input terminal of operational amplifier 15 after via switch 11.This input signal Vin is in addition via the negative input end that inputs to operational amplifier 15 behind switch 12 and 13.Electric capacity 14 is connected in the positive input terminal of operational amplifier 15 and the tie point of switch 12 and 13.And the output terminal of operational amplifier 15 feeds back to negative input end.The running of this operational amplifier driving circuit 10 is divided into two stages, and the phase one is the offset voltage sample phase, and subordinate phase is that offset voltage keeps the stage.
Figure 1B illustrates the on off state of offset voltage sample phase of the operational amplifier driving circuit of Figure 1A, and Fig. 1 C illustrates the offset voltage of the operational amplifier driving circuit of Figure 1A and keeps the on off state in stage.Shown in Figure 1B, when the offset voltage sample phase, switch 11 and 13 conductings (Turned ON), switch 12 open circuit (Turned OFF).Therefore, the offset voltage of operational amplifier 15 can be stored in the two ends of electric capacity 14.And shown in Fig. 1 C, when offset voltage kept the stage, switch 11 and 13 opened circuit, switch 12 conductings.Therefore, the magnitude of voltage that is stored in electric capacity 14 two ends can be offset with the offset voltage of operational amplifier 15, makes the output end voltage Vout of operational amplifier 15 identical with input voltage vin.
But above-mentioned Technology Need input voltage directly goes electric capacity is charged, so the driving force of input signal needs enough can realize.When the driving force of input signal was not enough, the effect of above-mentioned technology was with undesirable and can influence reaction velocity.
Summary of the invention
Because the problems referred to above, technical matters solved by the invention provides a kind of operational amplifier driving circuit of eliminating the offset voltage of operational amplifier and not needing directly electric capacity to be charged by input signal.
Technical scheme of the present invention is as follows:
A kind of operational amplifier driving circuit of eliminating the operational amplifier offset voltage comprises:
Operational amplifier with chopper, this operational amplifier has first input end, second input end and output terminal;
First switch has first end and second end, and wherein this first termination is received input voltage, and this second end is connected to the described first input end of described operational amplifier;
Second switch is connected in the first input end of described operational amplifier and the output terminal of described operational amplifier;
The 3rd switch connects second input end of described operational amplifier and the output terminal of described operational amplifier; And
Electric capacity is connected in second input end and the power supply ground of described operational amplifier;
Wherein when the input voltage storage stage, described first switch and described the 3rd switch conduction, described second switch open circuit, described first input end switches to positive input terminal and described second input end switches to negative input end; And at output voltage during the stage, described first switch and described the 3rd switch open circuit, described second switch conducting, described first input end switches to negative input end and described second input end switches to positive input terminal.
Preferably, described operational amplifier with chopper is controlled the switching that described first input end and described second input end are made positive input terminal and negative input end by control signal.
Preferably, described operational amplifier with chopper comprises:
The first transistor, transistor seconds, the 3rd transistor and the 4th transistor, current source, output amplifier stage, the 4th switch, the 5th switch, the 6th switch and minion are closed;
Wherein, the drain electrode of this first transistor and this transistor seconds is joined, the 3rd transistor and the 4th transistor drain are joined, this the first transistor and the 3rd transistorized grid join, the drain electrode of this first transistor couples the 3rd transistorized grid by the 4th switch, the grid of this first transistor couples the 3rd transistor drain by the 5th switch, the drain electrode of this first transistor couples the input end of this output amplifier stage by the 6th switch, the input end of this output amplifier stage closes by this minion and couples the 3rd transistor drain, the source electrode of this transistor seconds and the 4th transistorized source electrode are coupled to ground by this current source, the 4th transistorized grid is a first input end, and the grid of this transistor seconds is second input end;
When the 4th switch and this minion are closed conducting and the 5th switch and the 6th switch when opening circuit, this first input end is a positive input terminal and this second input end is a negative input end; Close when the 4th switch and this minion and to open circuit and when the 5th switch and the 6th switch conduction, this first input end is a negative input end and this second input end is a positive input terminal.
Preferably, this circuit is as the source electrode drive circuit of Thin Film Transistor-LCD.
Another one technical scheme of the present invention is as follows:
A kind of operational amplifier driving circuit of eliminating the operational amplifier offset voltage comprises:
The first transistor, wherein, the grid of this first transistor is connected with drain electrode;
Transistor seconds, wherein, the drain electrode of this transistor seconds is connected with the drain electrode of described the first transistor, forms first current path, and the grid of this transistor seconds is defined as first input end;
First switch;
The 3rd transistor, wherein, the 3rd transistorized grid links to each other with the 3rd transistor drain via described first switch;
The 4th transistor, wherein, the 4th transistor drain is connected with described the 3rd transistor drain, form second current path, and in the 4th transistor drain generation differential voltage, and the 4th transistorized grid is defined as second input end, and the source electrode of the 4th transistorized source electrode and this transistor seconds is connected to ground;
Electric capacity is connected between described the first transistor and the described the 3rd transistorized grid;
The output gain level receives described differential voltage and produces an output voltage;
Second switch connects between described first input end and described second input end; And
The 3rd switch connects between the output terminal of described first input end and described output gain level;
Wherein when the offset voltage storage stage, described first switch opens circuit with described second switch conducting, described the 3rd switch, and offset voltage is stored in aforementioned electric capacity; And at output voltage during the stage, described first switch and described second switch open circuit, described the 3rd switch conduction, and signal is exported via the output gain level.
Preferably, also comprise current source, be connected between source electrode, the described the 4th transistorized source electrode and the ground of described transistor seconds.
Preferably, described first input end is a negative input end.
Preferably, described second input end is a positive input terminal.
Preferably, described the first transistor and described the 3rd transistor are the P-channel field-effect transistor (PEFT) transistor.
Preferably, described transistor seconds and aforementioned the 4th transistor are the N slot field-effect transistor.
Because this operational amplifier driving circuit, therefore need not improved the driving force of input signal, and can shorten the capacitor charge and discharge time directly to capacitor charge and discharge by the output terminal of operational amplifier.
Description of drawings
Figure 1A is the operational amplifier driving circuit that the operational amplifier of prior art is eliminated offset voltage;
Figure 1B is the on off state of offset voltage sample phase of the operational amplifier driving circuit of Figure 1A;
Fig. 1 C is that the offset voltage of the operational amplifier driving circuit of Figure 1A keeps the on off state in stage;
Fig. 2 A and 2B are the circuit diagrams with operational amplifier of chopper.
Fig. 3 A eliminates the circuit diagram of the operational amplifier driving circuit of operational amplifier offset voltage for the present invention, and this operational amplifier driving circuit is to be in the input voltage storage stage;
Fig. 3 B is the reduced graph of Fig. 3 A operational amplifier driving circuit;
Fig. 4 A eliminates the circuit diagram of the operational amplifier driving circuit of operational amplifier offset voltage for the present invention, and this operational amplifier driving circuit is to be in the output voltage stage;
Fig. 4 B is the reduced graph of Fig. 4 A operational amplifier driving circuit;
Fig. 5 A and 5B eliminate the circuit diagram of operational amplifier driving circuit second embodiment of operational amplifier offset voltage for the present invention, and wherein Fig. 5 A is the on off state of offset voltage sampling, and Fig. 5 B is the on off state that offset voltage keeps.
Embodiment
Describe the operational amplifier driving circuit that the present invention eliminates the operational amplifier offset voltage in detail below with reference to accompanying drawing.
The general operational amplifier positive input terminal and the pin of negative input end are all fixing, can't exchange.But the operational amplifier with chopper (chopper) then can be controlled the pin of positive input terminal and negative input end via switching signal.Fig. 2 A and 2B show the circuit diagram of the operational amplifier with chopper of different pins.Shown in Fig. 2 A and 2B, this operational amplifier 20 with chopper also comprises four switch SW 21, SW22, SW23 and SW24 except four transistors 211,212,213,214, output amplifier stage (Output Gain Stage) 22 and the current source 23 that comprise general operational amplifier.Transistor 211,212 is serially connected, and transistor 213,214 is serially connected.The grid of transistor 212,214 is connected to each other, and the source electrode of transistor 211,213 is connected to each other after by current source 23 ground connection.Switch SW 21 is connected between the grid and drain electrode of transistor 212, and switch SW 23 is connected between the grid and drain electrode of transistor 214.Because the grid of transistor 212,214 is connected to each other, so a wherein end of switch SW 21 and switch SW 23 also is connected to each other.The drain electrode of transistor 212 is connected to the drain electrode of transistor 214 via switch SW 22 and SW24.And the signal of the tie point of switch SW 22 and SW24 is connected to the input end of output amplifier stage 22.And the conducting of switch SW 21, SW22, SW23 and SW24 is controlled by switching signal.
The grid of transistor 213,211 is defined as the first input end and second input end respectively.Shown in Fig. 2 A, when switch SW 21 and SW24 conducting, and switch SW 22 is when opening circuit with SW23, and first input end is a positive input terminal and second input end is a negative input end.In addition, shown in Fig. 2 B, when switch SW 21 opens circuit with SW24, and switch SW 22 is during with the SW23 conducting, and first input end is a negative input end and second input end is a positive input terminal.
Fig. 3 A eliminates the circuit diagram of operational amplifier driving circuit first embodiment of operational amplifier offset voltage for the present invention, and this operational amplifier driving circuit is in the input voltage storage stage among the figure.Fig. 3 B is the reduced graph of Fig. 3 A operational amplifier driving circuit.Fig. 4 A eliminates the circuit diagram of operational amplifier driving circuit first embodiment of operational amplifier offset voltage for the present invention, and this operational amplifier driving circuit is to be in the output voltage stage among the figure.Fig. 4 B is the reduced graph of Fig. 4 A operational amplifier driving circuit.
As shown in Figure 3A, the present invention's operational amplifier driving circuit 30 of eliminating the operational amplifier offset voltage comprises first switch SW 31, second switch SW32 and the 3rd switch SW 33, the operational amplifier 31 with chopper and electric capacity 32.Input voltage vin is received the first input end A of the operational amplifier 31 with chopper via first switch SW 31.Output terminal with operational amplifier 31 of chopper feeds back to first input end A via second switch SW32.And the output terminal with operational amplifier 31 of chopper feeds back to the second input end B via the 3rd switch SW 33, and the second input end B is via electric capacity 32 ground connection.At this input voltage storage stage, the first input end with operational amplifier 31 of chopper is a positive input terminal, and second input end is a negative input end.
Please refer to Fig. 3 B, the first input end of operational amplifier 31 (positive input terminal) receives input voltage vin, and second input end (negative input end) of operational amplifier 31 and output terminal and electric capacity 32 link together.So electric capacity 32 just can charge by the output terminal of this operational amplifier 31, and stores the output voltage of operational amplifier.The offset voltage of supposing operational amplifier this moment is positive offset voltage.This moment, electric capacity 32 stored voltage Vc were the offset voltage Vos that input voltage vin adds operational amplifier 31.Operational amplifier 311 is desirable and does not have the operational amplifier of offset voltage.
Vc=Vin+Vos ...(1)
Then the input voltage storage stage of the operational amplifier driving circuit of Fig. 3 A is switched to the voltage output stage of the operational amplifier driving circuit of Fig. 4 A.That is with the positive input terminal and the negative input end exchange of operational amplifier 31, and the relation that the offset voltage of operational amplifier 31 also exchanges because of input end becomes negative bias by positive offset voltage and moves voltage.
Shown in Fig. 4 A, the composition of operational amplifier driving circuit 30 ' is identical with the operational amplifier driving circuit 30 of Fig. 3 A, and its difference is that first switch SW 31 opens circuit with second switch SW33, and second switch SW32 conducting.Simultaneously, the first input end A of the operational amplifier with chopper 31 of operational amplifier driving circuit 30 ' is a negative input end, and the second input end B is a positive input terminal.
Please refer to Fig. 4 B, the output terminal of operational amplifier 31 feeds back to first input end (negative input end), and second input end (positive input terminal) of operational amplifier 31 receives the voltage of electric capacity 32 as input voltage vin.So the output voltage V out of this moment deducts offset voltage Vos for capacitance voltage Vc.
Vout=Vc-Vos ...(2)
(1) formula (2) formula of bringing into can be derived output voltage V out equal input voltage vin.
Vout=Vin+Vos-Vos=Vin ...(3)
Therefore, the output voltage V out that is produced at the voltage output stage equals input voltage vin, not influenced by the offset voltage Vos of operational amplifier 31.So, even operational amplifier because of the relation of manufacturing process, the offset voltage that causes each operational amplifier to export is inequality also can not to influence output voltage V out.And, owing to electric capacity 32 stored voltage Vc directly drive at the output terminal of input voltage storage stage by operational amplifier 31, so need not improve the time that the driving force of input signal also can shorten the input voltage storage stage.The operational amplifier driving circuit of elimination operational amplifier offset voltage of the present invention can be applicable to source electrode drive circuit and other device that needs source electrode drive circuit of TFT-LCD.
Fig. 5 A and 5B eliminate the circuit diagram of operational amplifier driving circuit second embodiment of operational amplifier offset voltage for the present invention, and wherein Fig. 5 A is the on off state of offset voltage sampling, and Fig. 5 B is the on off state that offset voltage keeps.
Shown in Fig. 5 A and 5B, the operational amplifier driving circuit 50 of eliminating the operational amplifier offset voltage also comprises three switch SW 51, SW52, SW53 and an electric capacity 54 except four transistors 211,212,213,214, output amplifier stage (Output Gain Stage) 22 and the current source 23 that comprise general operational amplifier.Transistor 211,212 forms first current path, and transistor 213,214 forms second current path, and first current path and second current path form differential amplifier circuit, and transistor 212 is connected via electric capacity 54 with the grid of transistor 214.And the grid of transistor 214 is connected in grid that the grid of drain electrode, the transistor 211 of transistor 214 is connected in the grid of transistor 213 and transistor 211 via switch SW 52 is connected in output gain level 22 via switch SW 53 output terminal via switch SW 51.In this embodiment, transistor 212,214 is P-channel field-effect transistor (PEFT) transistor (a PMOS transistor), and transistor 211,213 is N slot field-effect transistor (nmos pass transistor).
The operational amplifier driving circuit of the elimination operational amplifier offset voltage shown in Fig. 5 A is the on off state of offset voltage sampling, switch SW 51, SW52 conducting at this moment, and switch SW 53 opens circuit.So two transistorized grids of PMOS of current mirror link to each other with drain electrode end, and two input end IP of this operational amplifier are connected to same input voltage with IN, are used to provide the input signal of differential amplifier circuit.When not having the manufacturing process factor, the current value of these two current paths is identical, but after adding the manufacturing process factor, these two current path electric currents are slightly inequality.It is poor to utilize this moment electric capacity 54 to store two transistorized grid voltages of PMOS that flow different current paths.
The operational amplifier driving circuit of the elimination operational amplifier offset voltage shown in Fig. 5 B is the on off state that offset voltage keeps, and switch SW 51, SW52 open circuit at this moment, and switch SW 53 conductings.At this moment, operational amplifier is got back to the connection of normal running, and just input end IN receives the pressure feedback port of operational amplifier output terminal.Add an electric capacity between the grid of the PMOS transistor 212,214 on the current path, this electric capacity stores two voltage differences that current path is small.Utilize this electric capacity 54 to allow two current paths supply required electric current respectively and offset the output voltage drift that causes because of manufacturing process.
So shown in Fig. 5 A and 5B, the input terminal voltage signal does not need directly to drive electric capacity 54 and discharges and recharges, and utilize the electric current that changes current mirror to eliminate the offset voltage that produces because of manufacturing process.
Though more than with embodiment the present invention is described, therefore do not limit the present invention's scope, only otherwise the main idea that breaks away from the present invention, the sector person can carry out various distortion or change.
The above only is a preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (10)
1. an operational amplifier driving circuit of eliminating the operational amplifier offset voltage is characterized in that, comprising:
Operational amplifier with chopper, this operational amplifier has first input end, second input end and output terminal;
First switch has first end and second end, and wherein this first termination is received input voltage, and this second end is connected to the described first input end of described operational amplifier;
Second switch is connected in the first input end of described operational amplifier and the output terminal of described operational amplifier;
The 3rd switch connects second input end of described operational amplifier and the output terminal of described operational amplifier; And
Electric capacity is connected in second input end and the power supply ground of described operational amplifier;
Wherein when the input voltage storage stage, described first switch and described the 3rd switch conduction, described second switch open circuit, described first input end switches to positive input terminal and described second input end switches to negative input end; And at output voltage during the stage, described first switch and described the 3rd switch open circuit, described second switch conducting, described first input end switches to negative input end and described second input end switches to positive input terminal.
2. the operational amplifier driving circuit of elimination operational amplifier offset voltage as claimed in claim 1, it is characterized in that described operational amplifier with chopper is controlled the switching that described first input end and described second input end are made positive input terminal and negative input end by control signal.
3. the operational amplifier driving circuit of elimination operational amplifier offset voltage as claimed in claim 1 is characterized in that, described operational amplifier with chopper comprises:
The first transistor, transistor seconds, the 3rd transistor and the 4th transistor, current source, output amplifier stage, the 4th switch, the 5th switch, the 6th switch and minion are closed;
Wherein, the drain electrode of this first transistor and this transistor seconds is joined, the 3rd transistor and the 4th transistor drain are joined, this the first transistor and the 3rd transistorized grid join, the drain electrode of this first transistor couples the 3rd transistorized grid by the 4th switch, the grid of this first transistor couples the 3rd transistor drain by the 5th switch, the drain electrode of this first transistor couples the input end of this output amplifier stage by the 6th switch, the input end of this output amplifier stage closes by this minion and couples the 3rd transistor drain, the source electrode of this transistor seconds and the 4th transistorized source electrode are coupled to ground by this current source, the 4th transistorized grid is a first input end, and the grid of this transistor seconds is second input end;
When the 4th switch and this minion are closed conducting and the 5th switch and the 6th switch when opening circuit, this first input end is a positive input terminal and this second input end is a negative input end; Close when the 4th switch and this minion and to open circuit and when the 5th switch and the 6th switch conduction, this first input end is a negative input end and this second input end is a positive input terminal.
4. the operational amplifier driving circuit of the offset voltage of elimination operational amplifier according to claim 1 is characterized in that this circuit is as the source electrode drive circuit of Thin Film Transistor-LCD.
5. an operational amplifier driving circuit of eliminating the operational amplifier offset voltage is characterized in that, comprises:
The first transistor, wherein, the grid of this first transistor is connected with drain electrode;
Transistor seconds, wherein, the drain electrode of this transistor seconds is connected with the drain electrode of described the first transistor, forms first current path, and the grid of this transistor seconds is defined as first input end;
First switch;
The 3rd transistor, wherein, the 3rd transistorized grid links to each other with the 3rd transistor drain via described first switch;
The 4th transistor, wherein, the 4th transistor drain is connected with described the 3rd transistor drain, form second current path, and in the 4th transistor drain generation differential voltage, and the 4th transistorized grid is defined as second input end, and the source electrode of the 4th transistorized source electrode and this transistor seconds is connected to ground;
Electric capacity is connected between described the first transistor and the described the 3rd transistorized grid;
The output gain level receives described differential voltage and produces an output voltage;
Second switch connects between described first input end and described second input end; And
The 3rd switch connects between the output terminal of described first input end and described output gain level;
Wherein when the offset voltage storage stage, described first switch opens circuit with described second switch conducting, described the 3rd switch, and offset voltage is stored in aforementioned electric capacity; And at output voltage during the stage, described first switch and described second switch open circuit, described the 3rd switch conduction, and signal is exported via the output gain level.
6. the operational amplifier driving circuit of elimination operational amplifier offset voltage as claimed in claim 5 is characterized in that, also comprises current source, is connected between source electrode, the described the 4th transistorized source electrode and the ground of described transistor seconds.
7. the operational amplifier driving circuit of elimination operational amplifier offset voltage according to claim 5 is characterized in that, described first input end is a negative input end.
8. the operational amplifier driving circuit of elimination operational amplifier offset voltage as claimed in claim 7 is characterized in that, described second input end is a positive input terminal.
9. the operational amplifier driving circuit of elimination operational amplifier offset voltage as claimed in claim 5 is characterized in that, described the first transistor and described the 3rd transistor are the P-channel field-effect transistor (PEFT) transistor.
10. the operational amplifier driving circuit of elimination operational amplifier offset voltage as claimed in claim 9 is characterized in that, described transistor seconds and aforementioned the 4th transistor are the N slot field-effect transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 200610075831 CN101059940A (en) | 2006-04-18 | 2006-04-18 | Operation amplifier driving circuit for eliminating the operational amplifier offset voltage |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 200610075831 CN101059940A (en) | 2006-04-18 | 2006-04-18 | Operation amplifier driving circuit for eliminating the operational amplifier offset voltage |
Publications (1)
Publication Number | Publication Date |
---|---|
CN101059940A true CN101059940A (en) | 2007-10-24 |
Family
ID=38866024
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 200610075831 Pending CN101059940A (en) | 2006-04-18 | 2006-04-18 | Operation amplifier driving circuit for eliminating the operational amplifier offset voltage |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101059940A (en) |
Cited By (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101996596A (en) * | 2009-08-10 | 2011-03-30 | 瑞萨电子株式会社 | LCD driving circuit using operational amplifier and LCD display apparatus using the same |
CN102082552A (en) * | 2010-12-03 | 2011-06-01 | 中国航天科技集团公司第九研究院第七七一研究所 | Driver with controlled slope |
CN102215032A (en) * | 2010-04-08 | 2011-10-12 | 凌阳科技股份有限公司 | Differential offset correcting circuit |
CN102778910A (en) * | 2011-05-08 | 2012-11-14 | 曹先国 | High voltage reference |
CN103021351A (en) * | 2011-09-21 | 2013-04-03 | 三星电子株式会社 | Display device and method of canceling offset thereof |
CN103219959A (en) * | 2012-01-20 | 2013-07-24 | 联发科技股份有限公司 | Amplifying circuits and calibration methods therefor |
CN103247261A (en) * | 2013-04-25 | 2013-08-14 | 京东方科技集团股份有限公司 | External compensation induction circuit, induction method of external compensation induction circuit and display device |
CN104050939A (en) * | 2013-03-14 | 2014-09-17 | 瑞萨Sp驱动器公司 | Driver ic |
CN106100618A (en) * | 2016-06-06 | 2016-11-09 | 中航(重庆)微电子有限公司 | A kind of voltage offset correction device and method |
US9601050B2 (en) | 2013-03-14 | 2017-03-21 | Boe Technology Group Co., Ltd. | External compensation sensing circuit and sensing method thereof, display device |
CN106533370A (en) * | 2015-09-15 | 2017-03-22 | 奕力科技股份有限公司 | Operational amplifier circuit with direct current offset cancellation technology |
CN106656078A (en) * | 2016-09-23 | 2017-05-10 | 西安电子科技大学 | Operational amplifier and analog-digital converter with inductor and double power supplies |
CN107395168A (en) * | 2016-05-16 | 2017-11-24 | 株式会社村田制作所 | Output circuit |
CN107924207A (en) * | 2015-08-27 | 2018-04-17 | 高通股份有限公司 | Load current sensing in voltage regulator |
CN110728950A (en) * | 2018-07-16 | 2020-01-24 | 联咏科技股份有限公司 | Source driver |
CN110855253A (en) * | 2018-08-20 | 2020-02-28 | 原相科技股份有限公司 | Amplifier circuit and transimpedance amplifier circuit |
CN111064440A (en) * | 2018-10-17 | 2020-04-24 | 美光科技公司 | Duplicate reference based auto-zeroing technique for operational amplifiers with source follower output stages |
JP2020106667A (en) * | 2018-12-27 | 2020-07-09 | キヤノン株式会社 | Display device and electronic apparatus |
CN113129816A (en) * | 2019-12-30 | 2021-07-16 | 联咏科技股份有限公司 | Current integrator and signal processing system thereof |
CN113129836A (en) * | 2019-12-31 | 2021-07-16 | 联咏科技股份有限公司 | Current integrator for organic light emitting diode panel |
CN114844479A (en) * | 2022-04-27 | 2022-08-02 | 苏州领慧立芯科技有限公司 | Capacitive programmable amplifier |
-
2006
- 2006-04-18 CN CN 200610075831 patent/CN101059940A/en active Pending
Cited By (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101996596A (en) * | 2009-08-10 | 2011-03-30 | 瑞萨电子株式会社 | LCD driving circuit using operational amplifier and LCD display apparatus using the same |
CN101996596B (en) * | 2009-08-10 | 2014-10-22 | 瑞萨电子株式会社 | LCD driving circuit using operational amplifier and LCD display apparatus using the same |
CN102215032A (en) * | 2010-04-08 | 2011-10-12 | 凌阳科技股份有限公司 | Differential offset correcting circuit |
CN102082552A (en) * | 2010-12-03 | 2011-06-01 | 中国航天科技集团公司第九研究院第七七一研究所 | Driver with controlled slope |
CN102082552B (en) * | 2010-12-03 | 2013-03-20 | 中国航天科技集团公司第九研究院第七七一研究所 | Driver with controlled slope |
CN102778910A (en) * | 2011-05-08 | 2012-11-14 | 曹先国 | High voltage reference |
CN103021351A (en) * | 2011-09-21 | 2013-04-03 | 三星电子株式会社 | Display device and method of canceling offset thereof |
US9159282B2 (en) | 2011-09-21 | 2015-10-13 | Samsung Electronics Co., Ltd. | Display device and method of canceling offset thereof |
CN103021351B (en) * | 2011-09-21 | 2016-03-23 | 三星电子株式会社 | The method of display device and elimination skew thereof |
CN103219959A (en) * | 2012-01-20 | 2013-07-24 | 联发科技股份有限公司 | Amplifying circuits and calibration methods therefor |
CN103219959B (en) * | 2012-01-20 | 2015-12-02 | 联发科技股份有限公司 | Amplifying circuit and bearing calibration thereof |
CN104050939A (en) * | 2013-03-14 | 2014-09-17 | 瑞萨Sp驱动器公司 | Driver ic |
US9601050B2 (en) | 2013-03-14 | 2017-03-21 | Boe Technology Group Co., Ltd. | External compensation sensing circuit and sensing method thereof, display device |
CN103247261A (en) * | 2013-04-25 | 2013-08-14 | 京东方科技集团股份有限公司 | External compensation induction circuit, induction method of external compensation induction circuit and display device |
CN107924207A (en) * | 2015-08-27 | 2018-04-17 | 高通股份有限公司 | Load current sensing in voltage regulator |
CN106533370A (en) * | 2015-09-15 | 2017-03-22 | 奕力科技股份有限公司 | Operational amplifier circuit with direct current offset cancellation technology |
CN106533370B (en) * | 2015-09-15 | 2019-12-03 | 奕力科技股份有限公司 | Operational amplification circuit with direct current offset technology for eliminating |
CN107395168A (en) * | 2016-05-16 | 2017-11-24 | 株式会社村田制作所 | Output circuit |
CN106100618A (en) * | 2016-06-06 | 2016-11-09 | 中航(重庆)微电子有限公司 | A kind of voltage offset correction device and method |
CN106656078A (en) * | 2016-09-23 | 2017-05-10 | 西安电子科技大学 | Operational amplifier and analog-digital converter with inductor and double power supplies |
CN110728950B (en) * | 2018-07-16 | 2021-10-08 | 联咏科技股份有限公司 | Source driver |
CN110728950A (en) * | 2018-07-16 | 2020-01-24 | 联咏科技股份有限公司 | Source driver |
CN110855253A (en) * | 2018-08-20 | 2020-02-28 | 原相科技股份有限公司 | Amplifier circuit and transimpedance amplifier circuit |
CN111064440A (en) * | 2018-10-17 | 2020-04-24 | 美光科技公司 | Duplicate reference based auto-zeroing technique for operational amplifiers with source follower output stages |
CN111064440B (en) * | 2018-10-17 | 2021-06-18 | 美光科技公司 | Duplicate reference based auto-zeroing technique for operational amplifiers with source follower output stages |
JP2020106667A (en) * | 2018-12-27 | 2020-07-09 | キヤノン株式会社 | Display device and electronic apparatus |
JP7222706B2 (en) | 2018-12-27 | 2023-02-15 | キヤノン株式会社 | Displays and electronics |
CN113129816A (en) * | 2019-12-30 | 2021-07-16 | 联咏科技股份有限公司 | Current integrator and signal processing system thereof |
CN113129836A (en) * | 2019-12-31 | 2021-07-16 | 联咏科技股份有限公司 | Current integrator for organic light emitting diode panel |
CN113129836B (en) * | 2019-12-31 | 2023-12-05 | 联咏科技股份有限公司 | Current integrator for organic light emitting diode panel |
CN114844479A (en) * | 2022-04-27 | 2022-08-02 | 苏州领慧立芯科技有限公司 | Capacitive programmable amplifier |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101059940A (en) | Operation amplifier driving circuit for eliminating the operational amplifier offset voltage | |
CN1251400C (en) | Operation amplifer with deviation offset function | |
CN101750815B (en) | Source driver for driving a panel and related method for controlling a display | |
US11094239B2 (en) | Shift register and driving method thereof, gate driving circuit and display device | |
US7786970B2 (en) | Driver circuit of display device | |
CN102208898B (en) | Differential amplifier circuit | |
CN1841933A (en) | Voltage level converter circuit and semiconductor integrated circuit device | |
CN1461521A (en) | High duty cycle offset compensation for operational amplifiers | |
CN1494759A (en) | Power generation circuit, display apparatus and cellular terminal apparatus | |
CN1551502A (en) | Level shift circuit | |
US20070290728A1 (en) | Circuit and method for slew rate control | |
CN101123430A (en) | Level conversion circuit | |
CN112309322B (en) | Shift register and driving method thereof, grid driving circuit and display device | |
CN104637430B (en) | Gate driving circuit and display device | |
CN101034541A (en) | Current drive circuit | |
Son et al. | A column driver with low-power area-efficient push-pull buffer amplifiers for active-matrix LCDs | |
CN1819009A (en) | Liquid crystal display grid electrode drive circuit and panel charging time adjusting method | |
CN114038385A (en) | Gate driver and display device | |
US11456715B1 (en) | Operational amplifier with reduced input capacitance | |
CN1241323C (en) | Differential sampler structure with reduced distortion and current requirements | |
CN212516507U (en) | Charge sharing circuit, display driving module and display device | |
CN100350728C (en) | Transistor circuit and booster circuit | |
CN107767827B (en) | Compensation circuit and display device | |
CN102264166B (en) | LED output drive circuit structure and method for providing drive current for LED | |
CN113658539B (en) | GOA circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C12 | Rejection of a patent application after its publication | ||
RJ01 | Rejection of invention patent application after publication |