CN101043282A - Data storage means for multi-channel voice process - Google Patents
Data storage means for multi-channel voice process Download PDFInfo
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- CN101043282A CN101043282A CNA2006100584215A CN200610058421A CN101043282A CN 101043282 A CN101043282 A CN 101043282A CN A2006100584215 A CNA2006100584215 A CN A2006100584215A CN 200610058421 A CN200610058421 A CN 200610058421A CN 101043282 A CN101043282 A CN 101043282A
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Abstract
The invention discloses a data storing method of multiple channel voice processing, aiming at problems that interrupt is happened frequently in DSP of current calculation to lead to serious use of resource, the method of the invention includes: the length of transmission data of DMA is set to L=MXN; Data is stored to buffer area as time-gap number; based on the relationship between data sequence number and channel number, the excursion address table is generated; based on the change of channel parameter and DMA parameter, the excursion address table and DMA parameter are updated dynamically. The data storing method of multiple channel voice processing of the invention can exchange data between TDM port and inner buffer area effectively by managing the distribution of channel and setting the transmission length of DMA is MXN, the calculation needed of arithmetic is decreased, the process of more channels can be realized at the same condition of resource.
Description
Technical field
The present invention relates to the date storage method that a kind of multicenter voice is handled.
Background technology
Existing VOP (Voice Over Packet, the bag voice-bearer) the system works principle is as follows: TDM (Time DivisionMultiplex, time division multiplexing) is transferred to DSP (digital singnal processor after the sampling of the speech data on the line, digital signal processor) Nei Bu buffering area sends to network side through forming voice packet (packet) after the data processing such as compress speech; The packet that receives network side simultaneously carries out reverting to the speech data buffer memory after the relevant treatment such as decompress(ion), sends at last on the TDM line.Above-mentioned language process function uses the DSP device to realize usually.When the port number of handling during, promptly during multichannel,, also need increase a controller switch of each passage, corresponding time slot, buffering distribution, exchanges data etc. are managed except top basic speech processes greater than 2; A progress distributor is to distributing the running time of each channel algorithm and coordinating.The problem that the present invention pays close attention to is the controller of multichannel VOP system.
In multichannel VOP system, data processing such as compression, decompress(ion) are carried out by passage, are again that the data with certain time length are unit when the data of each passage are handled, 10ms for example, and the data of each each passage correspondence of unit duration are a frame.Supposing has N passage work, and each passage per unit duration comprises M sampled data, and the total amount of data that then receives in duration unit or send is M * N.For realizing the high-speed transfer of these data between TDM bus and internal memory, generally adopt DMA (Direct Memory Access, direct memory visit) transmission means.Be a kind of common implementation method below:
1, distribute data to receive buffering area and data transmission buffering area, the data in the buffering area are pressed the size order of channel number and are arranged;
2, configuration receives, sends the DMA parameter, and the length of moving of DMA is made as port number n, and the DMA control register enables corresponding time slot;
3, at TDM to the Packet direction, distributes an interim reception buffering area Rxtemp, the length of buffering area is port number n, DMA with the data-moving of DSP serial ports receiving register to Rxtemp.Finish to produce DMA and interrupt when DMA receives, in interrupt function,, the data of each time slot are moved into corresponding channel buffer according to each passage time slot corresponding number.As shown in Figure 1.Wherein, Dx, y represent that y of the x passage receives sampled point.
To the TDM direction, the data that DSP finishes dealing with leave in by passage and send the data buffer zone at Packet.Distribute an interim buffering area Txtemp that sends simultaneously, DMA is responsible for the data-moving among the Txtemp is sent the serial ports register to DSP, after last DMA is sent completely, produce to send and interrupt, the data that will next time will send in interrupt routine are moved into the corresponding time slot position of Txtemp from send buffering area.As shown in Figure 2.Dx wherein, y represent that y of the x passage sends sampled point.
Adopting the advantage of said method is that the buffering area that each channel data takies is fixed, the control and management of data is intuitively simple, when the parameter change of passage, be that passage On/Off or passage time slot corresponding are when number changing, only influence the data of this passage, to the not influence of data of other passage.Maximum shortcoming is to interrupt frequently expending a large amount of DSP resources.Be in the system of 8KHz in the frame synchronization frequency for example, every 125us will produce 2 DMA and interrupt (1 reception, 1 transmission).And each interruption all needs to carry out scene protection, task is switched, and has a strong impact on the operating efficiency of DSP.
Summary of the invention
At existing problem and shortage in the above-mentioned prior art, when the objective of the invention is to propose the processing of the enough DSP realizations of a kind of energy multicenter voice, can carry out swap data between TDM mouth and the internal buffer efficiently, thereby reduce the needed operand of algorithm, under equal resources supplIes, realize the date storage method of the multicenter voice processing of more multichannel processing.
The present invention proposes the date storage method that a kind of multicenter voice is handled to achieve these goals, may further comprise the steps:
1, a kind of date storage method of multicenter voice processing comprises:
(1) at least two data is set and receives buffering area and at least two data transmission buffering areas, described Data Receiving buffering area is ping-pong operation each other, described data send buffering area ping-pong operation each other, and the size of each buffering area is not less than M * N, wherein N is the port number of effectively working, M is the length of data, i.e. the sampling number that comprises in the unit duration of a passage;
(2) data that are provided with in described Data Receiving buffer area and the described data transmission buffer area are arranged by time slot;
(3) the transmission parameter of setting DMA comprises time slot and transmits data length, wherein transmits data length L=M * N, in receiving, send DMA serial ports register, corresponding time slot is set;
(4) be respectively sendaisle and receive path and generate mapping table between the channel number of the time slot of all data and data, and to generate with the channel number according to mapping table be the address offset table of data in buffering area of each passage correspondence of index;
(5) when the parameter of passage or DMA parameter change, dynamically update described address offset table and DMA parameter.
Wherein, described step (4) is specially:
(I) generate the original time slot and the correspondence table of passage, and the passage that time slot does not have to open is deleted from correspondence table;
(II) correspondence table of step (I) the gained size according to time slot is put in order, generate the address offset sequence number of data in buffering area of each passage correspondence;
(III) generating with the channel number is the address offset table of data in buffering area of each passage correspondence of index.
Wherein, described step (5) is specially:
(a) judge whether the receive path parameter changes,, and, when next unit duration arrives, use described new offset address to upgrade the offset address table of sendaisle its buffer memory if then calculate the new offset address of each receive path;
(b) judge whether the sendaisle parameter changes,, and upgrade the offset address table of sendaisle immediately if then calculate the new offset address of each sendaisle;
(c) when DMA produces interruption, judge that DMA receives parameter and whether changes, receive parameter and upgrade the reception dma controller immediately if then calculate DMA;
(d) when DMA produces interruption, judge that DMA sends parameter and whether changes, send parameter if then calculate new DMA, and it is temporary, the described new DMA that interrupts the use buffer memory at next DMA sends parameter, upgrades to send dma controller.
Wherein, described step (5) also comprises:
(e) set up three offset address tables changes of also initialization identifier, comprising: receive path offset address table changes identifier r_table_ch, sendaisle offset address table changes t_table_ch, the temporary identifier r_table_tempch of receive path offset address table;
(f) set up also three DMA parameter changes of initialization identifier, comprising: receive DMA parameter change identifier r_DMA_ch, transmission DMA parameter change identifier t_DMA_ch, the temporary identifier t_DMA_tempch of new DMA parameter.
Wherein, described step (a) is specially:
(A) judge whether the receive path parameter changes,, otherwise enter step (b) if then establish r_table_ch=1 and r_DMA_ch=1;
(B) if r_table_ch=1 calculates the new offset address of receive path, and it is temporary, and establish r_table_tempch=1, the r_table_ch of zero clearing simultaneously;
(C) when next unit duration arrives, judge whether r_table_tempch is 1, if then use the described new offset address of buffer memory to upgrade receive path offset address table, and zero clearing r_table_tempch.
Wherein, described step (b) is specially:
1. judge whether the sendaisle parameter changes,, otherwise enter step (c) if then establish t_table_ch=1 and t_DMA_ch=1;
If 2. t_table_ch=1 calculates the new offset address of sendaisle, and upgrade transmission offset address table, the r_table_ch of zero clearing simultaneously immediately;
Wherein, described step (c) is specially:
When DMA produces interruption, judge whether r_DMA_ch equals 1, DMA receives parameter and renewal immediately receives dma controller if then calculate, while zero clearing r_DMA_ch, otherwise enter step (d).
Wherein, described step (d) is specially:
(i) when DMA takes place to interrupt, judge whether t_DMA_ch equals 1, send parameter if then calculate new DMA, and it is temporary, and establish t_DMA_tempch=1, the t_DMA_ch of zero clearing simultaneously;
(ii) when next interrupts arriving, judge whether t_DMA_tempch equals 1, send dma controller if then use the described new DMA of buffer memory to send parameter update, and zero clearing t_DMA_tempch.
Wherein, described step (5) also comprises:
(g) according to new DMA parameter data are reset.
The present invention proposes the date storage method that a kind of multicenter voice is handled.
Prior art frequently produces interrupts causing system to have a strong impact on the operating efficiency of DSP, the present invention compared with prior art, configuration by each passage of dynamic management, and the transmission length of setting DMA is M * N, produce interruption again after promptly having transmitted M * N data, compared with prior art interruption times reduces M doubly, greatly reduced the workload of DSP, can carry out swap data between TDM mouth and the internal buffer efficiently, thereby reduce the needed operand of algorithm, under equal resources supplIes, realize more multichannel processing.
Description of drawings
Fig. 1 is the schematic diagram data of n for receiving length in the prior art;
Fig. 2 is the schematic diagram data of n for sending length in the prior art;
Fig. 3 is method of the present invention and the prior art contrast schematic diagram to resource occupation;
Fig. 4 is a data arrangement schematic diagram in data buffer zone in the method for the present invention;
Fig. 5 is that the channel address offset table generates schematic diagram in the method for the present invention;
Fig. 6 is that DMA receives parameter and channel offset address synchronization change schematic diagram in the method for the present invention;
Fig. 7 is that DMA sends parameter and channel offset address synchronization change schematic diagram in the method for the present invention;
Fig. 8 is the flow chart of the preferred embodiment of the present invention;
Fig. 9 interrupts flow chart for DMA.
Embodiment
The present invention is described in further detail below in conjunction with accompanying drawing.
The preferred embodiment of the present invention may further comprise the steps:
(1) at least two data is set and receives buffering area and at least two data transmission buffering areas, described two data receive buffering area ping-pong operation each other, described two data send buffering area ping-pong operation each other, and the size of each buffering area is not less than M * N, wherein M is the port number of effectively working, N is the length of data, i.e. the sampling number that comprises in the unit duration of a passage;
(2) described Data Receiving buffer area and described data are set and send of the big minispread of the interior data of buffer area by timeslot number;
(3) the transmission parameter of setting DMA comprises time slot and transmits data length, wherein transmits data length L=M * N, in receiving, send DMA serial ports register, corresponding time slot is set;
(4) be respectively sendaisle and receive path and generate mapping table between the channel number of the time slot of all data and data, and to generate with the channel number according to mapping table be the address offset table of data in buffering area of each passage correspondence of index;
(5) when the parameter of passage or DMA parameter change, dynamically update described address offset table and DMA parameter.
The present invention starts with from changing the DMA transmission means, and a kind of solution efficiently is provided.As previously mentioned, in the multicenter voice treatment system, be that the data with certain time length are unit (for example 10ms) when the data of each passage are handled, the data of each each passage correspondence of unit duration are a frame.Supposing has N passage work, and each passage unit's duration comprises M sampled data, and the total amount of data that then receives in duration unit or send is M * N.Interrupt data in order to reduce the DMA of transmission during these data, the transmission length that the present invention sets DMA is M * N, produces interruption again after promptly transmit M * N data, and compared with prior art the interruption times minimizing is M times, has greatly reduced the workload of DSP.Fig. 3 has contrasted conventional method and the invention provides the resources occupation rate situation of method in the VOP of reality system, as can be seen from Figure, the method that the invention provides expense to resource in system reduces greatly than traditional data-moving method, substantially be not subjected to simultaneously the influence of real work port number, open the instruction expense of moving with data preparation and traditional data-moving method is limited by the frequency of interruption, along with the increase resource occupation of port number also along with increase.
In mode of the present invention, the data of data buffer zone can only be arranged according to the size order of timeslot number, and DSP is when the processed voice data, with the passage is unit, therefore also needs the correspondence table of a passage and time slot and calculates the offset address table (call channel offset address table) of each channel data in the data buffer zone thus.If each passage time slot corresponding relation determines that then the transmission course of data is just fairly simple.If require the on off state of each passage and pairing time slot dynamically to change, then the channel offset address table also will be along with dynamic change, otherwise will cause the data dislocation of all passages.Operated simultaneously by DMA and data processing function for fear of data in addition, cause conflict, be necessary for to send and receive and respectively set up two buffer areas, carry out ping-pong operation, when the channel offset address table was changed and was just needed careful design this moment.
Realization principle of the present invention is as described below:
1, distribute two data to receive buffering area, ping-pong operation each other; Distribute two to send buffering area, ping-pong operation each other.The size of every buffering area is M * N, and wherein N is the port number of effectively working, the sampling number of M for comprising in each passage duration unit; Data in the buffering area are arranged by the size order of the timeslot number of real work.For example, effectively working time slot is 0,1,4,6,9,10, then receives or send data in the arrangement of buffering area as shown in Figure 4.
2, dynamically set the DMA transmission parameter, comprise time slot and transmission length are set, wherein transmit length L=M * N; N is the port number of effectively working, the sampling number of M for comprising in each passage duration unit; In receiving, send DMA serial ports register, corresponding time slot is set.
3, the offset address table of passage generates: move for the efficient data that cooperates DMA, the correspondence table of passage and time slot need be provided and calculate the offset address table of each channel data in the data buffer zone thus.In the present invention, be the traditional ranking method of no use of increasing work efficiency, and adopt the corresponding search procedure of a kind of simple channel slot to generate the offset address table.Be illustrated with reference to figure 5,, do not distinguish in the legend because the algorithm of receiving slot and sending time slots is the same.
Step 1:, generate original time slot and passage correspondence table Slot_ChannelTable[i according to the transmitting-receiving configuration relation of upper strata control channel], the span of i: 0～n-1, n are transmitting-receiving largest passages (time slot) number of default.For example: Slot_ChannelTable[0]=21, expression time slot 0 takies for passage 21.When certain time slot was not opened, corresponding passage ID was set at 0xFF.
Step 2: with Slot_ChannelTbale[i] invalid time slot in the correspondence table picks out, and is reduced to Reduce_Slot_ChannelTbale[i].
Step 3: the size according to time slot puts in order, and generates the address offset sequence number of data in buffering area of each passage correspondence, and for example the address offset sequence number of the data buffer zone of passage 1 is 3.
Step 4: adopt the reverse find method, generating with the channel number is the address offset table of data in buffering area of each passage correspondence of index, and for example the address offset of the data buffer zone of passage 1 is that 3 * every frame sampling is counted.
4, carry out data rearrangement in the DMA interrupt routine: the dma controller working method of different DSP is different, some dma controller (as the C64x of TI company series) is by the setting of DMA parameter, can just finish data arrangement when the transmission data, this moment, this step can be omitted.The dma controller of some DSP can not be realized this function, can only be by the sequencing moving data of Data Receiving or transmission, and need put in order in the DMA interrupt routine this moment, and the data that receive are reset by time slot.
5, arrive the PACKET direction at TDM, when data processor fetches data by passage, at first search the channel offset address table, and obtain this channel data in the appropriate address district that receives buffering area.
6, arrive the TDM direction at PACKET, when data processor is pressed passage transmission data, at first search the channel offset address table, and this channel data is moved the appropriate address district that sends buffering area.
7, when channel parameters such as the on off state of passage or the corresponding time slot of passage change, need to revise channel offset address table and DMA running parameter.For guaranteeing the normal transmission of DMA, the modification of DMA running parameter must receive or send at DMA to be interrupted finishing.Because ping-pong buffer influences, DMA running parameter and channel offset address table can not change at synchronization simultaneously.The change procedure of offset address table and DMA running parameter on the both direction is described respectively below.The starting point of each duration unit of expression such as the r1 among Fig. 6, Fig. 7, r2, t1, t2.
TDM is to PACKET direction (DMA reception): as shown in Figure 6, suppose between r1～r2 certain constantly DSP receive the instruction of receive path parameter change, receive at r2 DMA constantly and interrupt, DMA receives parameter change.When data processor fetched data between r2～r3, the reception buffering area of its sensing still was that DMA receives the data that sample before the parameter change, so the channel offset address table should be kept original value.And when data processor when r3～r4 fetches data, the Data Receiving buffering area of its sensing has been to use the data that new DMA receives parameter sampling, therefore must change the channel offset address table at this moment.
PACKET is to TDM direction (DMA transmission): as shown in Figure 7, suppose between t1～t2 certain constantly DSP receive the instruction of sendaisle parameter change, the channel offset address table changes thereupon.At t2 constantly, the data of buffering area to be sent still be the data of old channel offset address table correspondence, so the time DMA transmission parameter remain unchanged.At t3 constantly, the data of buffering area to be sent have been the data of new tunnel offset address table correspondence, therefore need to revise DMA and send parameter value.
Realize operating process of the present invention such as Fig. 8, shown in Figure 9.Fig. 8 is a main flow, and after finishing initialization, circulation is carried out, and each duration unit is carried out once.Fig. 9 is a DMA interrupt routine flow process.
With reference to Fig. 8, the concrete operations step of main flow is as follows:
801. distribute to receive, send buffering area, and with the data zero clearing of buffering area;
802. initialization receives, sends the DMA parameter;
803. initialization channel offset address table distributes a default quiet data district, and the offset pointer of each passage correspondence in the channel offset address table is pointed to this quiet data district;
804. setting up also, three channel offset address tables of initialization change identifier: r_table_ch (change of receive path offset address table), t_table_ch (change of sendaisle offset address table), r_table_tempch (new receive path offset address table is temporary);
805. set up and three DMA parameter changes of initialization identifier r_DMA_ch (receiving the DMA parameter change), t_DMA_ch (sending out the DMA parameter change), t_DMA_tempch (new DMA parameter is temporary);
806. enabling DMA receives, sends and interrupt;
If, establish r_table_ch=1 and r_DMA_ch=1 807. receive the instruction of receive path parameter change;
If, establish t_table_ch=1 and t_DMA_ch=1 808. receive the instruction of sendaisle parameter change;
809. if r_table_ch=1 calculates the new offset address of each receive path, but do not upgrade receive path offset address table immediately, but it is temporary, and establish r_table_tempch=1, the r_table_ch of zero clearing simultaneously;
810. when next unit duration, if r_table_tempch=1, each receive path offset address of using a unit duration calculation upgrades receive path offset address table, and zero clearing r_table_tempch;
If 811. t_table_ch=1 calculates the new offset address of each sendaisle, and upgrade sendaisle offset address table immediately, the r_table_ch of zero clearing simultaneously;
812. data processor is moved into the data of finishing dealing with and is sent the data buffer zone;
813. data processor is taken pending data away from receive buffering area;
814. the data processing that data processor is correlated with;
815. wait for the timing signal of next duration unit, return step 7 then.With reference to Fig. 9, DMA produces when interrupting, and the concrete operations step of DMA parameter update flow process is as follows:
901. if r_DMA_ch=1 calculates DMA and receives parameter and upgrade the reception dma controller immediately, the r_DMA_ch of zero clearing simultaneously;
902. if t_DMA_ch=1 calculates new DMA and sends parameter, do not send dma controller but do not upgrade immediately, but it is temporary, and establish t_DMA_tempch=1, the t_DMA_ch of zero clearing simultaneously;
903. when next interrupts, if t_DMA_tempch=1 sends parameter update with the DMA that interrupts calculating and sends dma controller, and zero clearing t_DMA_tempch;
904. data rearrangement is optional according to the working method of dma controller as previously mentioned.
Claims (9)
1, a kind of date storage method of multicenter voice processing comprises:
(1) at least two data is set and receives buffering area and at least two data transmission buffering areas, described Data Receiving buffering area is ping-pong operation each other, described data send buffering area ping-pong operation each other, and the size of each buffering area is not less than M * N, wherein N is the port number of effectively working, M is the length of data, i.e. the sampling number that comprises in the unit duration of a passage;
(2) data that are provided with in described Data Receiving buffer area and the described data transmission buffer area are arranged by time slot;
(3) the transmission parameter of setting DMA comprises time slot and transmits data length, wherein transmits data length L=M * N, in receiving, send DMA serial ports register, corresponding time slot is set;
(4) be respectively sendaisle and receive path and generate mapping table between the channel number of the time slot of all data and data, and to generate with the channel number according to mapping table be the address offset table of data in buffering area of each passage correspondence of index;
(5) when the parameter of passage or DMA parameter change, dynamically update described address offset table and DMA parameter.
2, the date storage method of multicenter voice processing according to claim 1 is characterized in that described step (4) is specially:
(I) generate the original time slot and the correspondence table of passage, and the passage that time slot does not have to open is deleted from correspondence table;
(II) correspondence table of step (I) the gained size according to time slot is put in order, generate the address offset sequence number of data in buffering area of each passage correspondence;
(III) generating with the channel number is the address offset table of data in buffering area of each passage correspondence of index.
3, the date storage method of multicenter voice processing according to claim 1 and 2 is characterized in that described step (5) is specially:
(a) judge whether the receive path parameter changes,, and, when next unit duration arrives, use described new offset address to upgrade the offset address table of sendaisle its buffer memory if then calculate the new offset address of each receive path;
(b) judge whether the sendaisle parameter changes,, and upgrade the offset address table of sendaisle immediately if then calculate the new offset address of each sendaisle;
(c) when DMA produces interruption, judge that DMA receives parameter and whether changes, receive parameter and upgrade the reception dma controller immediately if then calculate DMA;
(d) when DMA produces interruption, judge that DMA sends parameter and whether changes, send parameter if then calculate new DMA, and it is temporary, the described new DMA that interrupts the use buffer memory at next DMA sends parameter, upgrades to send dma controller.
4, the date storage method of multicenter voice processing according to claim 3 is characterized in that described step (5) also comprises:
(e) set up three offset address tables changes of also initialization identifier, comprising: receive path offset address table changes identifier r_table_ch, sendaisle offset address table changes t_table_ch, the temporary identifier r_table_tempch of receive path offset address table;
(f) set up also three DMA parameter changes of initialization identifier, comprising: receive DMA parameter change identifier r_DMA_ch, transmission DMA parameter change identifier t_DMA_ch, the temporary identifier t_DMA_tempch of new DMA parameter.
5, the date storage method of multicenter voice processing according to claim 4 is characterized in that described step (a) is specially:
(A) judge whether the receive path parameter changes,, otherwise enter step (b) if then establish r_table_ch=1 and r_DMA_ch=1;
(B) if r_table_ch=1 calculates the new offset address of receive path, and it is temporary, and establish r_table_tempch=1, the r_table_ch of zero clearing simultaneously;
(C) when next unit duration arrives, judge whether r_table_tempch is 1, if then use the described new offset address of buffer memory to upgrade receive path offset address table, and zero clearing r_table_tempch.
6, the date storage method of multicenter voice processing according to claim 4 is characterized in that described step (b) is specially:
1. judge whether the sendaisle parameter changes,, otherwise enter step (c) if then establish t_table_ch=1 and t_DMA_ch=1;
If 2. t_table_ch=1 calculates the new offset address of sendaisle, and upgrade transmission offset address table, the r_table_ch of zero clearing simultaneously immediately.
7, the date storage method of multicenter voice processing according to claim 4 is characterized in that described step (c) is specially:
When DMA produces interruption, judge whether r_DMA_ch equals 1, DMA receives parameter and renewal immediately receives dma controller if then calculate, while zero clearing r_DMA_ch, otherwise enter step (d).
8, the date storage method of multicenter voice processing according to claim 4 is characterized in that described step (d) is specially:
(i) when DMA takes place to interrupt, judge whether t_DMA_ch equals 1, send parameter if then calculate new DMA, and it is temporary, and establish t_DMA_tempch=1, the t_DMA_ch of zero clearing simultaneously;
(ii) when next interrupts arriving, judge whether t_DMA_tempch equals 1, send dma controller if then use the described new DMA of buffer memory to send parameter update, and zero clearing t_DMA_tempch.
9, the date storage method of multicenter voice processing according to claim 4 is characterized in that described step (5) also comprises:
(g) according to new DMA parameter data are reset.
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| CN102290050A (en) * | 2010-06-18 | 2011-12-21 | 北京中星微电子有限公司 | Audio data transmission method and device |
| CN105185072A (en) * | 2015-06-29 | 2015-12-23 | 瑞斯康达科技发展股份有限公司 | Multichannel switching value transmission method and device |
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| CN113961167A (en) * | 2021-10-28 | 2022-01-21 | 武汉船舶通信研究所（中国船舶重工集团公司第七二二研究所） | Multi-channel audio data processing method and device |
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| CN101645052A (en) * | 2008-08-06 | 2010-02-10 | 中兴通讯股份有限公司 | Quick direct memory access (DMA) ping-pong caching method |
| CN101645052B (en) * | 2008-08-06 | 2011-10-26 | 中兴通讯股份有限公司 | Quick direct memory access (DMA) ping-pong caching method |
| CN102290050A (en) * | 2010-06-18 | 2011-12-21 | 北京中星微电子有限公司 | Audio data transmission method and device |
| CN102290050B (en) * | 2010-06-18 | 2014-07-30 | 北京中星微电子有限公司 | Audio data transmission method and device |
| CN105185072A (en) * | 2015-06-29 | 2015-12-23 | 瑞斯康达科技发展股份有限公司 | Multichannel switching value transmission method and device |
| CN105185072B (en) * | 2015-06-29 | 2019-06-07 | 瑞斯康达科技发展股份有限公司 | Multi-channel switch amount transmission method and device |
| CN106487711A (en) * | 2016-10-13 | 2017-03-08 | 福建星海通信科技有限公司 | A kind of method of caching dynamically distributes and system |
| CN106844248A (en) * | 2017-02-16 | 2017-06-13 | 北京中航通用科技有限公司 | The method and system of data transfer |
| CN107481742A (en) * | 2017-09-22 | 2017-12-15 | 深圳震有科技股份有限公司 | A kind of method and terminal for playing voice document to TDM sides based on DSP |
| CN107481742B (en) * | 2017-09-22 | 2019-10-01 | 深圳震有科技股份有限公司 | A kind of method and terminal playing voice document to the side TDM based on DSP |
| CN108366372A (en) * | 2017-12-13 | 2018-08-03 | 国家电网公司 | The wireless telecommunication system and the means of communication of fault detector and hand-held maintenance tool |
| CN113961167A (en) * | 2021-10-28 | 2022-01-21 | 武汉船舶通信研究所（中国船舶重工集团公司第七二二研究所） | Multi-channel audio data processing method and device |
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