CN101043201B - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuit Download PDFInfo
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- CN101043201B CN101043201B CN2007100887477A CN200710088747A CN101043201B CN 101043201 B CN101043201 B CN 101043201B CN 2007100887477 A CN2007100887477 A CN 2007100887477A CN 200710088747 A CN200710088747 A CN 200710088747A CN 101043201 B CN101043201 B CN 101043201B
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Abstract
An N-trench transistor is provided as a switch between a high electric potential power source line and a low electric potential power source line. A high pass filter is composed of a capacitor and a resistor. When a voltage between the high electric potential power source line and the low electric potential power source line is oscillated by operating the switch, the high pass filter makes a high pass component of the voltage be passed, thereby turning on the N-trench transistor to reduce a ringing.
Description
Technical field
The present invention relates to semiconductor integrated circuit, in particular to the semiconductor integrated circuit that is suitable for such as the such circuit that is used for the pulsed drive load of D class A amplifier A.
Background technology
As is known, the D class A amplifier A is used for ON/OFF load driving output transistor and is implemented to the conducting of load off and on.To intermittence of load in the turn on process, the electric current that flow into the stray inductance that is possessed on the power line of D class A amplifier A or the earthing conductor changes consumingly.Therefore, on these stray inductances, produce noise, cause ring occurring in the output signal of D class A amplifier A.Described ring causes the reproduction quality degradation of D class A amplifier A, in addition, causes to load or to the destruction of D class A amplifier A.Reason wishes to reduce described ring for this reason.Patent documentation 1 has proposed a kind of time gradient technology that reduces the signal output waveform of output transistor.Be applied to the D class A amplifier A by the technology with the type, the time gradient of signal output waveform is reduced, and can prevent to flow into the electric current flip-flop of output transistor.So it is possible reducing ring.Patent documentation 1: Japan Patent No.3152204.
Yet patent documentation 1 disclosed technology is used to reduce the time gradient of signal output waveform.Reason for this reason, the problem of existence is: sacrificed the service speed of D class A amplifier A by using this technology.Except the D class A amplifier A, this problem is for need with the high-speed driving load and need to reduce for the semiconductor integrated circuit of the ring in the output signal be ubiquitous.
Summary of the invention
Consider described situation, the purpose of this invention is to provide a kind of semiconductor integrated circuit that under the situation of not sacrificing service speed, can reduce the ring in the output signal.
The invention provides a kind of semiconductor integrated circuit, comprising: the switch between high potential power line and low potential power line; And high pass filter, be used to make the voltage that produces between high potential power line and the low potential power line high pass component by and the output high pass component with signal as the connection switch.
According to the present invention, when making voltage between high potential power line and the low potential power line to vibrate by switching manipulation, the high pass component of voltage is provided to switch by high pass filter, makes switch connection.So the oscillating component of voltage is leaked by switch between high potential power line and the low potential power line, thereby can reduce ring.
The invention provides a kind of ring and reduce circuit, described ring reduces circuit and comprises: be inserted in the output signal that is used for output buffer circuit that semiconductor integrated circuit inside is provided and be sent between the output signal line of semiconductor integrated circuit external loading and high potential power line or the low potential power line so that the switch element of supply voltage to be provided to output buffer circuit; And ringing detector, it is used for when the output signal that is supplied to load via output signal line ring and output signal occur surpass reference level on the plus or minus direction, and output is used to connect the signal of switch element.
According to the present invention, when ring and output signal occurring having surpassed reference level in the switching manipulation owing to output buffer circuit makes output signal on the plus or minus direction, switch element is connected.As a result, discharge occurs from output signal line to the low potential power line or the high potential power line, and therefore reduced ring.
Description of drawings
Fig. 1 shows the circuit diagram according to the D class A amplifier A structure of the embodiment of the invention,
Fig. 2 shows the oscillogram according to the waveform of each part of this embodiment,
Fig. 3 A-3C shows the application drawing according to this embodiment,
Fig. 4 shows the circuit diagram of another structure example of output buffer circuit, and
Fig. 5 shows the circuit diagram that ring reduces another structure example of circuit.
Fig. 6 shows the circuit diagram that ring reduces the D class A amplifier A configuration of circuit that has according to the embodiment of the invention 2, and shows the configuration that the ring that reduces overshoot reduces circuit especially.
Fig. 7 shows the circuit diagram of the D class A amplifier A configuration identical with Fig. 6, shows the configuration that the ring that reduces to dash down reduces circuit especially.
Fig. 8 shows the oscillogram of the waveform on single parts of embodiment 2 or the like.
Fig. 9 shows the circuit diagram that ring reduces the D class A amplifier A configuration of circuit that has according to the embodiment of the invention 3, and shows the configuration that the ring that reduces overshoot reduces circuit especially.
Figure 10 shows the circuit diagram of the D class A amplifier A configuration identical with Fig. 9, shows the configuration that the ring that reduces to dash down reduces circuit especially.
Figure 11 shows the circuit diagram that ring reduces the D class A amplifier A configuration of circuit that has according to the embodiment of the invention 4, and shows the configuration that the ring that reduces overshoot reduces circuit especially.
Figure 12 shows the circuit diagram of the D class A amplifier A configuration identical with Figure 11, shows the configuration that the ring that reduces to dash down reduces circuit especially.
Embodiment
Below with reference to accompanying drawing embodiments of the invention are described.
Embodiment 1
Fig. 1 shows the circuit diagram of structure of D class A amplifier A 600 of the embodiment 1 of the semiconductor integrated circuit according to the present invention.D class A amplifier A 600 has high potential power end 601, low potential power end 602, input 603 and output 604A and 604B.High potential power end 601 is connected to the positive electrode of power vd D, and low potential power end 602 is connected to negative electrode and the ground connection of power vd D.In the example shown in this figure, use single power supply.Reason for this reason, low potential power end 602 ground connection.Yet in the situation of using the following stated structure, even described structure is used power supply that generates positive voltage and the power supply that generates negative supply voltage, yet preferably, high potential power end 601 should be connected to the output of the former power supply, and low potential power end 602 should be connected to the output of latter's power supply.Audio signal is input to input 603 from the sound source (not shown).Load 700 such as low pass filter and loud speaker is connected to output 604A and 604B.
Form D class A amplifier A 600 in the encapsulation by on the semiconductor-based end, forming each circuit shown in the drawings and they being sealed in.The low potential power line 612 that is connected to the high potential power line 611 of high potential power take-off 601 and is connected to low potential power end 602 formed on the semiconductor-based end.The source electric current is provided to each circuit that constitutes D class A amplifier A 600 via high potential power end 601 and high potential power line 611 and from power vd D.Arrive the negative electrode of power vd D via low potential power line 612 and low potential power end 602 through the source electric current of each circuit.
In D class A amplifier A 600, PWM modulator 501 is a kind of circuit that are used to export with the corresponding pulse through pulse-width modulation of the level of the input signal that is provided via input 603.Predriver 502 is a kind of circuit that respond described pulse with driving output buffer circuit 503.In example shown in the drawings, output buffer circuit 503 have so-called bridging structure and by comprise the transistor of the P-channel field-effect transistor (PEFT) transistor between high potential power line 611 and the low potential power line 612 (hereinafter being called p channel transistor) 531P and N slot field-effect transistor (hereinafter being called the N channel transistor) 531N to and the transistor that comprises p channel transistor 532P between high potential power line 611 and low potential power line 612 and N channel transistor 532N to constituting.Each drain electrode that each drain electrode of p channel transistor 531P and N channel transistor 531N is connected to output 604A and p channel transistor 532P and N channel transistor 532N is connected to output 604B.Predriver 502 provides pulse GP1, GN1, GP2 and GN2 so that realize the conducting of load 700 in the corresponding cycle in the pulse duration that is provided with PWM modulator 501 to transistor 531P, 531N, 532P and 532N.In order to prevent so-called through current, in addition, predriver 502 comprises the circuit of adjusting the pulse sequence that is applied on each transistor gate as follows, described mode is: direct-connected two p channel transistors and two N channel transistors (just, a group transistor 531P and 531P and a group transistor 532P and a 532N) are not gone up at one time and are connected under the situation that does not have load 700.
Fig. 2 shows from PWM modulator 501 to load the oscillogram of the operation of each part of 700.As shown in Figure 2, in D class A amplifier A 600, pulse GP1, the GN1, GP2 and the GN2 that are sent to transistor gate generate as follows, and promptly the group of the group of p channel transistor 531P and N channel transistor 532N and p channel transistor 532P and N channel transistor 531N is alternately connected.In addition, in each transistorized on/off is switched, in with the state of adjusting sequential as shown in the figure like that, export pulse GP1 from predriver 502 as follows, GN1, GP2 and GN2 are to prevent through current, and described mode is: the group of p channel transistor 531P and N channel transistor 532N be converted to from connection disconnect after the group of p channel transistor 532P and N channel transistor 531N be converted to from disconnection connect and the group of p channel transistor 532P and N channel transistor 531N from connect conversion disconnect after the group of p channel transistor 531P and N channel transistor 532N be converted to connection from disconnection.
It is that embodiment 1 is peculiar that ring reduces circuit 504.Constitute ring by N channel transistor 541 and high pass filter 542 and reduce circuit 504.N channel transistor 541 has the drain electrode that is connected to high potential power line 611 and is connected to the source electrode of low potential power line 612.Provide N channel transistor 541 with as a kind of switch, this switch is used for impelling the ring of removing oscillating component and reducing the situation that the voltage between high potential power line 611 and low potential power line 612 will vibrate.In semiconductor integrated circuit, usually, insertion has the transistor of big molded dimension to protect equipment as the electrostatic breakdown between high potential power line and the low potential power line.N channel transistor 541 can be used for the transistor as electrostatic breakdown protection equipment.Insert capacitor 542A and resistor 542B can obtain high pass filter 542 by series connection between high potential power line 611 and low potential power line 612, and provide voltage on the resistor 542B two ends with gate source voltage as N channel transistor 541.When producing high pass component on the voltage between high potential power line 611 and low potential power line 612, high pass filter 542 be used to impel have a certain frequency or bigger high pass component by and this high pass component offered N channel transistor 541.Preferably, should be for selecting suitable value with the capacitance of the corresponding capacitor 542A of the frequency of the ring that will be reduced and the resistance value of resistor 542B.As a kind of example, the capacitance that capacitor 542A has is 5pF, and the resistance value that resistor 542B has is 50k Ω.
Next, will operation according to embodiment 1 be described referring to figs. 2 and 3 A-3C.At first, such as shown in Figure 3A at t1 shown in Figure 2 constantly, p channel transistor 532P and N channel transistor 531N connect, and p channel transistor 531P and N channel transistor 532N disconnection.Reason for this reason, the source current i Continuous Flow that power vd D is provided is through p channel transistor 532P, load 700 and N channel transistor 531N.The stray inductance 621 that the i path of source electric current is provided comprising from power vd D positive electrode to the path of p channel transistor 532P source electrode and from N channel transistor 531N source electrode to the path of power vd D negative electrode (=ground connection) the stray inductance 622 that provided.
Next, at t2 shown in Figure 2 constantly, p channel transistor 532P and N channel transistor 531N are converted to disconnection from connection.Ideally, p channel transistor 532P and N channel transistor 531N disconnect on synchronization.Yet, usually, in the sequential that two transistors disconnect, produce drift.Like that, in the state that p channel transistor 532P connects, when N raceway groove 531N disconnected, the path of source current i process stray inductance 621 and source current i were interrupted by the path of stray inductance 622 shown in Fig. 3 B.So, induce oscillating voltage in stray inductance 621 and stray inductance 622 two ends.In addition, be in the situation of inductive load in load 700, keep the sensed load 700 of voltage that the source electric current that flows to load 700 is thitherto carved.So such as shown in the figure, oscillating current flow into by load 700, in the loop that p channel transistor 531P and the parasitic diode 531D at the semiconductor-based end and p channel transistor 532P are constituted.Reason if do not take any countermeasure, produces huge vibration so on the voltage between high potential power line 611 and the low potential power line 612 for this reason, so that the ring by described vibration produced occurs on the signal that will be imported into load 700.
Yet, in embodiment 1, when beginning to generate oscillating component on the voltage between high potential power line 611 and low potential power line 612, it is provided to the grid of N channel transistor 541 via high pass filter 542, so that N channel transistor 541 is connected.Reason, and the corresponding electric current of oscillating component that generates between high potential power line 611 and low potential power line 612 for this reason flow into N channel transistor 541, so that be attenuated before oscillating component increases.Therefore, the ring that is output in the signal of load 700 is reduced.In D class A amplifier A 600, except operation, can carry out various switching manipulations from state shown in Fig. 3 A to state of switch shown in Fig. 3 B.Yet, in these states, when the current path that flows through stray inductance and load be interrupted and high potential power line 611 and low potential power line 612 between voltage will vibrate the time, the high pass component of described voltage is connected N channel transistor 541.Thereby, reduce ring.
As mentioned above, according to embodiment 1, under the situation of the service speed of not sacrificing D class A amplifier A 600, it is possible reducing ring.Foregoing only is illustrative and can implements other various embodiment for the purposes of the present invention.For example, following embodiment can be proposed.
(1) though the present invention is applied to comprise the D class A amplifier A that has output buffer circuit 503 in the present embodiment, wherein said output buffer circuit 503 has two so-called p channel transistors of use and the right bridging structure of N channel transistor, but output buffer circuit can have the known configurations that is made of p channel transistor 535 and N channel transistor 536 as shown in Figure 4.
(2) p channel transistor being used as switch also is possible to reduce ring.Fig. 5 shows described example.In this embodiment, p channel transistor 543 has source electrode that is connected to high potential power line 611 and the drain electrode that is connected to low potential power line 612.High pass filter 544 has the resistor 544A that inserts in series connection between high potential power line 611 and the low potential power line 612 and capacitor 544B and provides on the resistor 544A two ends voltage with the gate source voltage as p channel transistor 543.Equally in this manner, obtain with embodiment 1 in identical advantage be possible.
＜embodiment 2 〉
Fig. 6 and 7 shows the configuration circuit figure that ring reduces the D class A amplifier A 100A of circuit 40NA and 40PA that has according to the embodiment of the invention 2.Fig. 6 shows the circuit arrangement that ring reduces circuit 40NA, and Fig. 7 shows the circuit arrangement that ring reduces circuit 40PA.
D class A amplifier A 100A has high potential power end 101, low potential power end 102, input 103 and output 104.High potential power end 101 is connected to the positive pole of power vd D via the high potential power line 131 of D class A amplifier A 100A disposed outside, and low potential power end 102 is connected to negative pole and the ground connection of power vd D via the low potential power line 132 of D class A amplifier A 100A disposed outside.In illustrative example, owing to use single power supply, so low potential power end 102 ground connection.Yet be used for generating the power supply of positive voltage and be used to generate the configuration of the power supply of negative supply voltage in use, high potential power end 101 and low potential power end 102 can be connected respectively to the output of the former power supply and latter's power supply.Audio signal is input to input 103 from the sound source (not shown).Be inserted between output 104 and the low potential power line 132 such as low pass filter and the such load 200 of loud speaker.
D class A amplifier A 100A is a kind of semiconductor integrated circuit, and wherein the single circuit shown in Fig. 6 and 7 forms on the semiconductor-based end and is sealed in the encapsulation.The low potential power line 112 that is connected to the high potential power line 111 of high potential power take-off 101 and is connected to low potential power end 102 formed on the semiconductor-based end.Source current is via high potential power line 131, high potential power end 101, stray inductance 141 of lead, closing line or the like and high potential power line 111 and be provided to the single circuit that constitutes D class A amplifier A 100A from power vd D.Flow through the source current of single circuit via low potential power line 112, stray inductance 142 of lead, closing line or the like and low potential power end 102 and low potential power line 132 and arrive the negative pole of power vd D.
In D class A amplifier A 100A, PWM modulator 10 is the circuit according to the pulse of the incoming signal level output pulse width modulation that provides via input 103.Predriver 20 is the circuit according to these pulsed drive output buffer circuits 30.In illustrative example, output buffer circuit 30 is to have the circuit of so-called inverter structure and be made of the transistor that is inserted in p slot field-effect transistor (hereinafter simply being called " p channel transistor ") 30P between high potential power line 111 and the low potential power line 112 and n slot field-effect transistor (hereinafter being called " n channel transistor ") 30N.The drain electrode of p channel transistor 30P and n channel transistor 30N is connected to each other and their tie point is connected to output 104 via output signal line 120.Predriver 20 provides pulse GP and GN to each transistor 30P and 30N, thereby in the underexcitation load of corresponding cycle of pulse duration 700 that is provided with PWM modulator 10.In order to prevent so-called through current, predriver 20 comprises circuit as described below, and promptly this circuit is used for the sequential adjustment is carried out in the pulse that will be provided to each transistor 30P and 30N, so that transistor 30P and 30N can not connect simultaneously.
Ring reduces circuit 40NA and 40PA is embodiment 2 peculiar circuit.As shown in Figure 6, ring reduces circuit 40NA by constituting as the n channel transistor 401 of switch element with as the comparator 410 of ringing detector.The drain electrode of transistor 401 is connected to output signal line 120, this output signal line 120 sends to external loading 200 with the output signal OUT of output buffer circuit 30, and the source electrode of transistor 401 is connected to the low potential power line 112 in high potential power line 111 and the low potential power line 112, and high potential power line 111 and low potential power line 112 are provided to output buffer circuit 30 with supply voltage.Comparator 410 has p channel transistor 411 and 412 and constant-current source 413 and 414.The source electrode of transistor 411 is used as the non-inverting input (anode) of comparator 410 and is connected to output signal line 120.The source electrode of transistor 412 is used as the inverting input (negative terminal) of comparator 410 and is connected to high potential power line 111. Transistor 411 and 412 grid are connected to the drain electrode of transistor 412, and the drain electrode of transistor 412 is connected to low potential power line 112 via constant-current source 414.The drain electrode of transistor 411 is connected to low potential power line 112 via constant-current source 413.The tie point of the drain electrode of transistor 411 and constant-current source 413 is used as the output of comparator 410 and is connected to the grid of transistor 401.Utilize above-mentioned configuration, comparator 410 will offer the output signal OUT of load 200 and the PVDDI (reference level) of high potential power line 111 compares via output signal line 120.If output signal OUT is surpassing reference level (overshoot occurring) forward, comparator 410 is provided to transistor 401 with H level grid voltage and therefore will connects as the transistor 401 of switch element so.
As shown in Figure 7, ring reduces circuit 40PA by as the n channel transistor 402 of switch element, constitute as the comparator 420 and the inverter 429 of ringing detector.The source electrode of transistor 402 is connected to output signal line 120, and the drain electrode of transistor 402 is connected to high potential power line 111.Comparator 420 has n channel transistor 421 and 422 and constant-current source 423 and 424.The source electrode of transistor 421 is used as the non-inverting input (anode) of comparator 420 and is connected to output signal line 120.The source electrode of transistor 422 is used as the inverting input (negative terminal) of comparator 420 and is connected to low potential power line 112. Transistor 421 and 422 grid are connected to the drain electrode of transistor 422, and the drain electrode of transistor 422 is connected to high potential power line 111 via constant-current source 424.The drain electrode of transistor 421 is connected to high potential power line 111 via constant-current source 423.The tie point of the drain electrode of transistor 421 and constant-current source 423 is used as the output of comparator 420 and is connected to the grid of transistor 402 via inverter 429.Utilize above-mentioned configuration, comparator 420 will offer the output signal OUT of load 200 and the level PVSSI (reference level) of low potential power line 112 compares via output signal line 120.If output signal OUT is surpassing reference level (dashing under occurring) on the negative sense, comparator 420 is exported the L level signals so.Inverter 429 transforms to the H level with the output signal of comparator 420, and with its grid that is provided to transistor 402 so that transistor 402 is connected.
In embodiment 2, when in the output signal OUT of output signal line 120, occur overshoot or down towards the time, transistor 401 or 402 as switch element functions as follows, promptly by from output signal line 120 to low potential power line 112 or 111 discharges of high potential power line with discharge excessive energy reduce described overshoot or under dash.So for suitably reducing to degree overshoot or dash down, hope is arranged on desired value with the channel width of transistor 401 or 402.In a kind of preferred form, the channel width of transistor 401 or 402 is arranged on is approximately 1/100 of transistor 30N channel width.
Can revise ring as follows and reduce circuit 40PA, promptly replace the output signal of n channel transistor 402 and comparator 420 directly to be provided to the p channel transistor by the p channel transistor, just, no longer via inverter 429.In embodiment 2, use n channel transistor 402 and do not use the reason of p channel transistor to be to make the connection resistance of n channel transistor less than the connection resistance of p channel transistor with same channel width.
Fig. 8 shows the oscillogram of the waveform of each parts etc. among the embodiment 2.As shown in Figure 8, in D class A amplifier A 100A, generate the pulse GP and the GN that are provided on each transistor 30P and the 30N grid, so that alternately connect transistor 30P and 30N.For preventing through current to occur at each transistorized switch switching instant, the predriver 20 outputs pulse GP and the GN that carry out the sequential adjustment as shown in Figure 8, so that transistor 30N switches to on-state from off-state after transistor 30P switches to off-state from on-state, and transistor 30P switches to on-state from off-state after transistor 30N switches to off-state from on-state.
At t1 shown in Figure 8 constantly, transistor 30P is in off-state and transistor 30N is in on-state.So negative current I flow into transistor 30N from load 200.At t2 constantly, transistor 30N disconnects.At this constantly, the path of flowing through as the electric current I of the load 200 of inductive load is interrupted.And the electric current of the load 200 of flowing through begins to flow into power vd D via the stray inductance of the parasitic diode that for example forms and closing line or the like between transistor 30P drain electrode and rear portion n type substrate thereof, thus, induces the vibration high pressure in load 200.As a result, in signal OUT, tend to occur ring.On the contrary, in embodiment 2, the value of signal OUT surpasses the level PVDDI of high potential power line 111 and occurs in the cycle of overshoot on positive direction, the comparator 410 that reduces circuit 40NA from ring is provided to n channel transistor 401 with the high level grid voltage, thereby n channel transistor 401 continues to keep.As a result, n channel transistor 401 allows electric current to flow to low potential power line 112 (discharge just occurring) from output signal line 120.So, reduced the overshoot among the signal OUT as shown in Figure 8.
At t3 constantly, transistor 30P is in on-state and transistor 30N is in off-state.So positive current I flows to load 200 from transistor 30P.At t4 constantly, transistor 30P disconnects.At this constantly, the path of flowing through as the electric current I of the load 200 of inductive load is interrupted.And the electric current of the load 200 of flowing through begins to flow via the stray inductance of the parasitic diode that for example forms between transistor 30N drain electrode and rear portion p type substrate thereof and closing line or the like, thus, induces the vibration high pressure in load 200.As a result, in signal OUT, tend to occur ring.On the contrary, in embodiment 2, the value of signal OUT surpasses the level PVSSDI of low potential power line 112 and in cycle of dashing under occurring, the transistor 402 that ring reduces circuit 40PA continues to keep connecting on negative direction.As a result, transistor 402 allows the 112 appearance discharges from output signal line 120 to the low potential power line.So, reduced following the dashing among the signal OUT as shown in Figure 8.
As mentioned above, embodiment 2 can reduce ring in the situation of the service speed of not sacrificing D class A amplifier A 100A.
＜embodiment 3 〉
Fig. 9 and Figure 10 show the configuration circuit figure that ring reduces the D class A amplifier A 100B of circuit 40PB and 40NB that has according to the embodiment of the invention 3.Fig. 9 shows the circuit arrangement that ring reduces circuit 40NB, and Figure 10 shows the circuit arrangement that ring reduces circuit 40PB.In Fig. 9 and 10, have and be provided identical reference symbol later on the parts of the corresponding component of above related Fig. 6 and 7 and will no longer be described.
In embodiment 2, the level and the level PVSSI of the level PVDDI of high potential power line 111 or low potential power line 112 by output line 120 relatively detects among the output signal OUT and ring occurs as the comparator 410 of ringing detector and 420.
Yet, when the switch current of output buffer circuit 30 is flowed through stray inductance 141 or 142, the huge back electromotive force of induction in stray inductance 141 or 142, thus the vibration noise in the level PVDDI of high potential power line 111 or in the level PVSSI of low potential power line 112, generated.Even do not occur among the output signal OUT overshoot or under dash, if the vibration noise has big amplitude, connect comparator 410 or 420 to comparator 410 or 420 possible errors so so that the output signal OUT distortion of output buffer circuit 30.
Consider above content, in embodiment 3, such as shown in Figures 9 and 10, D class A amplifier A 100B has high potential power end 101a and the low potential power end 102a that is separated with high potential power end 101 and low potential power end 102, and they are used for providing power supply to the single circuit that comprises output buffer circuit 30.High potential power end 101a and low potential power end 102a are connected respectively to positive pole and the negative pole of power vd D.Ring reduces the comparator 410 of circuit 40NB by output signal OUT being compared with the level PVDDIa of the high potential power line 111a that is connected to high potential power end 101a to detect the overshoot among the output signal OUT.Ring reduces the comparator 420 of circuit 40PB by output signal OUT being compared with the level PVSSIa of the low potential power line 112a that is connected to low potential power end 102a to detect following the dashing among the output signal OUT.
Dispose ring as follows and reduce circuit 40NB, be about to the ring that p channel transistor 431 and non-inverting buffer 431 add the foregoing description 2 to and reduce circuit 40NA.The source electrode of transistor 431 is connected to the source electrode that output signal line 120 and its grid and drain electrode are connected to transistor 411.Transistor 431 is as the comparator 410 than muting sensitivity, so that when occurring too little among the output signal OUT so that can not be called the meticulous vibration of overshoot, comparator 410 does not have too responsive reaction to it.Similarly, the n channel transistor 433 that is used to reduce the susceptibility of comparator 420 is added to ring and reduces circuit 40PB.Non-inverting buffer 432 is used to produce gate voltage, and its level allows transistor 401 on/off reliably.
In embodiment 3, the stray inductance 141a that between high potential power line 111a and high potential power end 101a, has lead, closing line etc., and between low potential power line 112a and low potential power end 102a, have the stray inductance 142a of lead, closing line etc.Yet, owing between high potential power end 101a and low potential power end 102a, do not insert output buffer circuit 30, so output buffer circuit 30 does not have switch current flow through stray inductance 141a or 142a.So the level PVDDIa of the high potential power line 111a in the noise and the level PVSSIa of low potential power line 112a are low and therefore the level PVSSI than the level PVDDI of high potential power line 111 and low potential power line 112 is more stable respectively.Like this, even making and occurring under the situation of big noise among the level PVSSIa of the level PVDDIa of high potential power line 111a or low potential power line 112a owing to switching output buffer circuit 30, embodiment 3 can prevent from output signal OUT, to detect mistakenly overshoot or under dash.
＜embodiment 4 〉
Figure 11 and Figure 12 show the configuration circuit figure that ring reduces the D class A amplifier A 100C of circuit 40PC and 40NC that has according to the embodiment of the invention 4.Figure 11 shows the circuit arrangement that ring reduces circuit 40NC, and Figure 12 shows the circuit arrangement that ring reduces circuit 40PC.In Figure 11 and 12, have and be provided identical reference symbol later on the parts of above related Fig. 6,7,9 and 10 corresponding component and will no longer be described.
And in embodiment 4, as embodiment 3 described situations, D class A amplifier A 100C has high potential power end 101a and the low potential power end 102a that is separated with high potential power end 101 and low potential power end 102, and they are used for providing power supply to the single circuit that comprises output buffer circuit 30.High potential power end 101a and low potential power end 102a are connected respectively to positive pole and the negative pole of power vd D.For detecting overshoot or dashing down, be connected to the level PVDDIa of high potential power line 111a of high potential power end 101a and the level PVSSIa that is connected to the low potential power line 112a of low potential power end 102a and be used as reference level.
In embodiment 4, the parasitic diode that between drain electrode that is inserted in p channel transistor 30P between output signal line 120 and the high potential power line 111 and rear portion n type substrate thereof, forms.So, when overshoot occurring among the output signal OUT, the overshoot of the low about parasitic diode forward voltage VB of its electromotive force specific output signal OUT appears in the level PVDDI of high potential power line 111.In addition, the parasitic diode that between drain electrode that is inserted in n channel transistor 30N between output signal line 120 and the low potential power line 112 and rear portion p type substrate thereof, forms.So, when occur among the output signal OUT down towards the time, high approximately following the dashing of parasitic diode forward voltage VB of its electromotive force specific output signal OUT appears in the level PVSSI of low potential power line 112.
Consider foregoing, the comparator 410 that the ring of embodiment 4 reduces circuit 40NC is compared the level PVDDI of high potential power line 111 with the level PVDDIa of high potential power line 111a, and therefore more stable than the former, wherein said level PVDDIa is lower in noise.If the former level PVDDI is higher than latter's level PVDDIa, comparator 410 outputs are used to connect the signal of transistor 401 so.The comparator 420 that the ring of embodiment 4 reduces circuit 40PC is compared the level PVSSI of low potential power line 112 with the level PVSSIa of low potential power line 112a, and therefore more stable than the former, and wherein said level PVSSIa is lower in noise.If the former level PVSSI is lower than latter's level PVSSIa, comparator 420 outputs are used to connect the signal of transistor 402 so.
Embodiment 4 provides the advantage identical with embodiment 3.
Although more than described embodiments of the invention 2-4, other different embodiment of the present invention also are possible, and described example is as follows:
(1) although in the above-described embodiments, the present invention is applied to have the D class A amplifier A of the output buffer circuit 30 of inverter structure, but the present invention also can be applied to have the D class A amplifier A of the output buffer circuit of bridging structure, and described bridging structure uses two transistors of p channel transistor and n channel transistor right.In addition, range of application of the present invention is not limited to the various semiconductor integrated circuit that D class A amplifier A and the present invention also can be applied to wish to reduce ring.
(2) though in the above-described embodiments, in semiconductor integrated circuit, provide the ring that is used to reduce overshoot to reduce circuit and the ring that is used to reduce dash down reduces circuit, in them can only be provided.
(3) although in the above-described embodiments, provide ring to reduce circuit in the inside of semiconductor integrated circuit, they also can be positioned at the outside of semiconductor integrated circuit and be connected to semiconductor integrated circuit.
(4) high potential power line 111a and low potential power line 112a can be connected to the stable position of supply voltage in the semiconductor integrated circuit.
Claims (13)
1. semiconductor integrated circuit comprises:
Switch is provided between high potential power line and the low potential power line;
High pass filter, make the voltage that between described high potential power line and described low potential power line, produces high pass component by and export this high pass component as the signal of connecting described switch;
Output buffer circuit comprises that at least one transistor is right, and this transistor is to comprising p channel transistor and the N channel transistor that is connected between described high potential power line and the described low potential power line, and
Predriver is connected to each grid of described p channel transistor and described N channel transistor, and connects or disconnects the corresponding transistor control signal to described each grid supply,
Wherein, when because each transistorized on/off is switched the voltage that makes between described high potential power line and the described low potential power line begins to produce when vibrating, the component of vibration flow to described switch by described high pass filter, thereby connects described switch to reduce vibration.
2. semiconductor integrated circuit according to claim 1, wherein said switch comprises field-effect transistor, and this field-effect transistor has the drain electrode that is connected to one of described high potential power line and described low potential power line, be connected in described high potential power line and the described low potential power line another source electrode and provide from the grid of the signal of high pass filter output.
3. semiconductor integrated circuit according to claim 2, wherein said field-effect transistor is as equipment that reduces vibration and electrostatic breakdown protection equipment.
4. semiconductor integrated circuit according to claim 1 further comprises the PWM modulator of exporting pulse in response to input signal,
Wherein said predriver with the width time corresponding of the described pulse of described PWM modulator supply on supply described control signal to described each grid.
5. semiconductor integrated circuit according to claim 1, wherein
Described output buffer circuit comprises that two transistors are right, and
Described predriver is so that a pair of and another mode adjustment to alternately connection of described two pair of transistors is supplied to the sequential of the described control signal of described each grid.
6. a ring that provides in semiconductor integrated circuit inside reduces circuit, described semiconductor integrated circuit comprises output buffer circuit and is used for the output signal of described output buffer circuit is sent to the output signal line of described semiconductor integrated circuit external loading that described ring reduces circuit and comprises:
Switch element is inserted between described output signal line and high potential power line or the low potential power line to provide supply voltage to described output buffer circuit; And
Ringing detector is used for when described output signal ring and described output signal occur surpass reference level on the plus or minus direction, and output is used to connect the signal of described switch element.
7. ring according to claim 6 reduces circuit, wherein said ringing detector comprises comparator, and the level that is used for level by more described output signal line and described high potential power line or described low potential power line detects described output signal and surpass described reference level on the plus or minus direction.
8. ring according to claim 6 reduces circuit, wherein said ringing detector comprises comparator, is used for level by more described output signal line and detects described output signal with the level that is different from the power line of described high potential power line and described low potential power line surpass described reference level on the plus or minus direction.
9. ring according to claim 6 reduces circuit, wherein said ringing detector comprises comparator, be used for comparing by the level with the level of described high potential power line or described low potential power line and power line and detect described output signal surpass described reference level on the plus or minus direction, described power line is different from described high potential power line and described low potential power line and is not the part in path of switching current of described output buffer circuit of flowing through.
10. ring according to claim 6 reduces circuit, wherein
Described switch element is inserted between described output signal line and the described low potential power line, and
The output when detecting described output signal surpass described reference level on positive direction of described ringing detector is used to connect the signal of described switch element, and described reference level is the level of described high potential power line or the level more stable than the level of described high potential power line.
11. ring according to claim 6 reduces circuit, wherein
Described switch element is inserted between described output signal line and the described high potential power line, and
The output when detecting described output signal surpass described reference level on negative direction of described ringing detector is used to connect the signal of described switch element, and described reference level is the level of described low potential power line or the level more stable than the level of described low potential power line.
12. ring according to claim 6 reduces circuit, wherein
Described switch element comprise be inserted in first switch element between described output signal line and the described low potential power line and be inserted in described output signal line and described high potential power line between the second switch element; And
Described ringing detector comprises first comparator and second comparator, the output when detecting described output signal surpass first reference level on positive direction of described first comparator is used to connect the signal of described first switch element, the output when detecting described output signal surpass second reference level on negative direction of described second comparator is used to connect the signal of described second switch element, level that described first reference level is described high potential power line or the level more stable, the level that described second reference level is described low potential power line or the level more stable than the level of described low potential power line than the level of described high potential power line.
13. a semiconductor integrated circuit comprises according to arbitrary described ring in the claim 6 to 12 reducing circuit.
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006-079771 | 2006-03-22 | ||
| JP2006079771A JP2007258990A (en) | 2006-03-22 | 2006-03-22 | Semiconductor integrated circuit |
| JP2006079771 | 2006-03-22 | ||
| JP2006-190991 | 2006-07-11 | ||
| JP2006190991 | 2006-07-11 | ||
| JP2006190991A JP4222389B2 (en) | 2006-07-11 | 2006-07-11 | RINGING REDUCTION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT HAVING THE RINGING REDUCTION CIRCUIT |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101043201A CN101043201A (en) | 2007-09-26 |
| CN101043201B true CN101043201B (en) | 2010-09-01 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2007100887477A Expired - Fee Related CN101043201B (en) | 2006-03-22 | 2007-03-22 | Semiconductor integrated circuit |
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| JP (1) | JP2007258990A (en) |
| CN (1) | CN101043201B (en) |
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| KR101572483B1 (en) * | 2008-12-31 | 2015-11-27 | 주식회사 동부하이텍 | transmitter |
| JP5539916B2 (en) * | 2011-03-04 | 2014-07-02 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| JP5498527B2 (en) * | 2011-05-16 | 2014-05-21 | 株式会社日本自動車部品総合研究所 | Ringing suppression circuit |
| US8947163B2 (en) * | 2012-05-02 | 2015-02-03 | Qualcomm Incorporated | Split capacitors scheme for suppressing overshoot voltage glitches in class D amplifier output stage |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000216673A (en) * | 1999-01-26 | 2000-08-04 | Toshiba Corp | Electrostatic destruction protection circuit and cmos circuit with electrostatic destruction protection circuit |
| JP3152204B2 (en) * | 1998-06-02 | 2001-04-03 | 日本電気株式会社 | Slew rate output circuit |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5821791B2 (en) * | 1978-04-18 | 1983-05-04 | 松下電器産業株式会社 | induction heating device |
| JPS62147689A (en) * | 1985-12-20 | 1987-07-01 | 松下電器産業株式会社 | Induction heating cooker source abnormality detecting circuit |
| JPH01216768A (en) * | 1988-02-25 | 1989-08-30 | Showa Denko Kk | Method and device for polishing semiconductor substrate |
| JPH09230951A (en) * | 1996-02-22 | 1997-09-05 | Sony Corp | Switching power circuit |
| JP2001309656A (en) * | 2000-04-24 | 2001-11-02 | Canon Inc | Ringing choke converter and overload detection method |
| JP2002223132A (en) * | 2001-01-29 | 2002-08-09 | Niigata Seimitsu Kk | Sound reproducing device and method |
| JP2004180294A (en) * | 2002-11-15 | 2004-06-24 | Matsushita Electric Ind Co Ltd | Power amplifier |
| JP2005295753A (en) * | 2004-04-05 | 2005-10-20 | Fuji Electric Device Technology Co Ltd | Terminal protection circuit and synchronous rectification type switching power supply |
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2006
- 2006-03-22 JP JP2006079771A patent/JP2007258990A/en active Pending
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3152204B2 (en) * | 1998-06-02 | 2001-04-03 | 日本電気株式会社 | Slew rate output circuit |
| JP2000216673A (en) * | 1999-01-26 | 2000-08-04 | Toshiba Corp | Electrostatic destruction protection circuit and cmos circuit with electrostatic destruction protection circuit |
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| Publication number | Publication date |
|---|---|
| CN101043201A (en) | 2007-09-26 |
| JP2007258990A (en) | 2007-10-04 |
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