CN101036216A - Planar avalanche photodiode - Google Patents
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- CN101036216A CN101036216A CNA2004800432368A CN200480043236A CN101036216A CN 101036216 A CN101036216 A CN 101036216A CN A2004800432368 A CNA2004800432368 A CN A2004800432368A CN 200480043236 A CN200480043236 A CN 200480043236A CN 101036216 A CN101036216 A CN 101036216A
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- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
- H01L31/107—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes
- H01L31/1075—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure
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Abstract
A planar avalanche photodiode includes a small localized contact layer on the top of the device produced by either a diffusion or etching process and a semiconductor layer defining a lower contact area. A semiconductor multiplication layer is positioned between the two contact areas and a semiconductor absorption layer is positioned between the multiplication layer and the upper contact layer. The photodiode has a low capacitance and a low field near the edges of the semiconductor multiplication and absorption layers.
Description
Technical field
[0001] the present invention relates to photodiode.More particularly, the present invention relates to avalanche photodide.
Background technology
[0002] because known photon and interelectric interaction in recent years, makes progress in the photodiode field, particularly those utilize the photodiode of semi-conducting material.The photodiode of one class based semiconductor also claims avalanche photodide, comprises many semi-conducting materials such as absorption and multiplication (multiplication) that are used for various objectives.
[0003] avalanche photodiode structure by the effect of the electric charge carrier that is excited, produces a large amount of electron hole pairs in dynode layer, provide big gain.In order to prevent the tunnel effect in the absorbed layer, adjust the electric field in the avalanche photodide self, make the electric field in the dynode layer, be significantly higher than the electric field in the absorbed layer.
[0004] a kind of specific type avalanche photodide that is called as the table top avalanche photodide, the p-n junction and a large amount of surface and the interface state that exposes that present High-Field, the surface of these exposures and interface state make the avalanche photodide of the type be difficult to use the insulation material layer passivation.Therefore, conventional InP/InGaAs avalanche photodide uses the diffusion structure of covering p-n junction.But, these InP avalanche photodides, the degree of depth and doping density to p N-type semiconductor N district require split hair diffusion control, and accurately control the n doped region that this diffusion will enter.This conclusive doping control is essential, because diffusion can be controlled: total electric charge in the length of the amplitude of electric field, avalanche region and the electric charge key-course in the position of p-n junction, the multiplication region, this total electrical charge is determined the electric field value in High-Field InP avalanche region and low two district, InGaAs uptake zone, electric field value in the High-Field InP avalanche region must be enough big, to produce multiplication, electric field value in the InGaAs uptake zone, low field must be enough little, to avoid tunnel effect.In addition, in this configuration, use the diffusion of accurately placing or inject guard ring, to avoid on the p-n junction edge of diffusion, avalanche breakdown occurring.Guard ring and the combination of the diffusion of control fatefully make the electric capacity increase, bandwidth is reduced and productivity ratio are descended, thereby increase the cost of these APD.
[0005] to ultrahigh speed performance detection device, can make avalanche layer without InP,, thereby can use thinner avalanche region, obtain higher speed and more high performance receiver because higher band gap reduces tunnel effect with InAlAs.But it is then more difficult to obtain diffusion structure in InAlAs, because bigger electron avalanche coefficient (with respect to the hole), preferably makes its electron multiplication, rather than as among the standard I nP base APD, making the hole multiplication.Have, it is not enough simply the p doping diffusion structure of standard being put upside down again, because the n alloy spreads soon inadequately.
Summary of the invention
[0006] the present invention provides a kind of planar avalanche photodiode, and it comprises first and second contact layers, the semiconductor layer of diffusion region, semiconductor multiplication layer and semiconductor absorption layer are arranged.The area of diffusion region is littler than semiconductor layer, and contiguous first contact layer in its position, and semiconductor multiplication layer is between first and second contact layers.
[0007] according to another aspect of the present invention, be a kind of planar avalanche photodiode, it comprises first and second contact layers, semiconductor absorption layer and semiconductor multiplication layer.The area of first contact layer is littler than the area of semiconductor absorption layer.Semiconductor absorption layer is between first contact layer and semiconductor multiplication layer, and semiconductor absorption layer and semiconductor multiplication layer are all between first and second contact layers.
[0008] photodiode that provides of each embodiment of the present invention has low electric capacity, and low field is arranged near absorbed layer and dynode layer edge.
[0009] other characteristic and advantage can be known from following explanation and claims and to see.
Description of drawings
[0010] Fig. 1 is the view profile according to planar avalanche photodiode of the present invention.
[0011] Fig. 2 is the view profile according to the another kind of planar avalanche photodiode of the present invention.
[0012] Fig. 3 is the empirical curve of the electric capacity of this planar avalanche photodiode.
[0013] Fig. 4 is the empirical curve of the electric capacity of this planar avalanche photodiode more than break-through, and this curve draws as the function of p contact size and isolation mesa size.
[0014] Fig. 5 signal result of calculation of the Electric Field Distribution curve by dynode layer of drawing, this distribution curve shows, is very big at the center.
[0015] Fig. 6 is the empirical curve of photoelectric current gain, and this curve draws as the function of crossover device distance.
[0016] Fig. 7 signal result of calculation of the Electric Field Distribution curve by absorbed layer of drawing, this distribution curve shows, is greatly at the center, and drops to insignificant value in mesa edge.
[0017] Fig. 8 signal result of calculation of the Electric Field Distribution curve by the device center of drawing, this curve that distributes shows, is high in dynode layer, and is low in absorbed layer.
[0018] Fig. 9 is according to the present invention, the view profile of Fig. 1 planar avalanche photodiode of the complementary field control structure of drawing.
[0019] Figure 10 is according to the present invention, the view profile of Fig. 2 planar avalanche photodiode of the complementary field control structure of drawing.
[0020] Figure 11 is according to another embodiment of the present invention, the view profile of the planar avalanche photodiode that draws, and it has the into diffusion region of uptake zone that stretches.
[0021] Figure 12 is according to another embodiment of the present invention, the view profile of the planar avalanche photodiode that draws, and it has the field control structure of additional oxidation.
Embodiment
[0022] with reference now to Fig. 1, a kind of photodetector structure of drawing on the figure specifically, is a kind of planar avalanche photodiode (" APD ") that embodies the principle of the invention, and note is with 10.As its chief component, APD 10 comprises a n type semiconductor layer 28 of p type contact layer 12 and definition the 2nd n type contact layer.This avalanche photodide 10 mixes by diffusion p type, sets up p-n junction and contacts with p, to the performance optimization that increases.Specifically, p type contact layer 12 is positioned on the 2nd n type semiconductor layer 16, and the 2nd n type semiconductor layer 16 comprises p type diffusion region 14, is used to form p-n junction and contacts with the p of the 2nd n type semiconductor layer 16 with setting up.Perhaps, semiconductor layer 16 can be the p type, so that by diffuseing to form the p-p+ knot.Semiconductor layer 16 can be undoped or low-doped, is beneficial to form depletion region under bias voltage.
[0023] planar avalanche photodiode 10 also comprises undoped or n or p N-type semiconductor N absorbed layer 20.This absorbed layer can be separated by the first segmented layer 18a with semiconductor layer 16, to increase the speed of photodiode.Absorbed layer 20 is between semiconductor layer 16 and semiconductor multiplication layer 24.In certain embodiments, semiconductor absorption layer 20 is separated by the p N-type semiconductor N electric charge key-course 22 and the second segmented layer 18b with dynode layer 24.N type contact layer 26 is collected electronics and is being shown on the figure on the n type semiconductor layer 28.
[0024] the one n type semiconductor layer 28 is selected from and comprises semi-conductive one group of three compositions, or III-V family semiconductor.Therefore, a n type semiconductor layer 28, or be two elements of III family and an element combinations of V family, or be conversely, two elements of V family and an element combinations of III family.Provide the table of representational family in the periodic table below.
II family | III family | IV family | V family |
Zinc (Zn) | Aluminium (Al) | Silicon (Si) | Phosphorus (P) |
Cadmium (Cd) | Gallium (Ga) | Germanium (Ge) | Arsenic (As) |
Mercury (Hg) | Indium (In) | Antimony (Sb) |
[0025] in certain embodiments, a n type semiconductor layer 28 is InAlAs.But, should be pointed out that a n type semiconductor layer 28 can be any binary or three composition semiconductors, as long as optimize the band gap that moves for planar avalanche photodiode 10 provides.
[0026] semiconductor multiplication layer 24 also is selected from and comprises semi-conductive one group of three compositions, or III-V family semiconductor.In a preferred embodiment, this semiconductor multiplication layer 24 is InAlAs.Preferably, semiconductor absorption layer 20 also is selected from and comprises semi-conductive one group of three compositions, or III-V family semiconductor.In a preferred embodiment, this semiconductor absorption layer 20 is InGaAs.But, should be pointed out that semiconductor absorption layer 20 and semiconductor multiplication layer 24 both, can be any binary or three composition semiconductors, as long as the band gap of optimizing operation is provided for planar avalanche photodiode 10.
[0027] second semiconductor layer 16 also is selected from and comprises semi-conductive one group of three compositions, or III-V family semiconductor.Ditto, second semiconductor layer 16, or be two elements of III family and an element combinations of V family, or be conversely, two elements of V family and an element combinations of III family.In a preferred embodiment, this second semiconductor layer 16 is InAlAs.But, should be pointed out that second semiconductor layer 16 can be any binary or three composition semiconductors, as long as optimize the band gap that moves for planar avalanche photodiode 10 provides.
[0028] as noted earlier, semiconductor layer 16 partly defines p type diffusion region 14 near the knot between self and the p type contact area 12.Be the small size of local p type diffusion region 14, rather than the outside table top of larger area, determine the electric capacity of planar avalanche photodiode 10 in aforementioned diffusion, increase the whole speed of structure thus.
[0029] planar avalanche photodiode 10 characteristic is thickness and doping contents of all decisive layers, all in initial crystal growth, adjust, from but in check, they can repeatedly be grown and be uniform on entire wafer.Therefore, the related difficulty of process control when making particularly relates to those difficulties of diffusing step, no longer becomes problem.
[0030] shown in Figure 2 is the embodiment of another kind of planar avalanche photodiode 110, and it comprises micro-mesa 32.To photodiode 110, the semiconductor region 14 of above-mentioned diffusion is replaced by the p type semiconductor layer, and this p type semiconductor layer is that micro-mesa 32 is advanced in epitaxial growth.P type semiconductor layer 32 can be InAlAs, or any other type, provide the III-V family semiconductor of suitable band gap for optimizing performance.
[0031] similar with structure shown in Figure 1 10, planar avalanche photodiode 110 also comprises: p type contact layer 12, the contact and the passivation layer 16 that are made of for example InAlAs and the n type semiconductor layer 28 that another contact area is provided.P type contact layer 12 is positioned on the p type semiconductor layer 32.All the other structures that passivation region 34 surrounds p type semiconductor layer 32 and planar avalanche photodiode.Suitable passivating material comprises BCB (benzocyclobutene, benzocyclobutene), silica, silicon nitride or polyimides.
[0032] will make photodiode 110, growth comprises the entire infrastructure of p type semiconductor layer 32 when beginning, makes photodiode 110 downward etchings with stop etch layers then, arrives the passivation layer 16 of high band gap, and this stop etch layers is positioned on the passivation layer.The local p contact zone 32 of the relevant capacitive region of aforementioned process definition control, thus obtain low electric capacity with avalanche photodide at a high speed.In addition, whole planar avalanche photodiode 110 is epitaxially grown, and does not require the diffusion of p type.
[0033] the another kind of approach that forms passivation region 34 is to utilize wet oxidation.Can make 32 oxidations of p type semiconductor layer, until the passivation layer or the first segmented layer 18a.Similarly, each side of outside table top comprises n type semiconductor layer 24, p N-type semiconductor N electric charge key-course 22 and the second segmented layer 18b, can be oxidized, and for example shown in the photodiode 510 of image pattern 12.At last, can make the interface that occurs gradual change between not oxidation and the already oxidised layer to a n type semiconductor layer 28 oxidations.Can reduce the field between a n type semiconductor layer 28 and the n N-type semiconductor N dynode layer 24 like this, cause the passivation that strengthens.
[0034] approach of passivation can inject with proton or oxygen atom and combine, so that control p N-type semiconductor N electric charge key-course 22 more, reduces the field on the outside mesa edge simultaneously, further improves passivation.
[0035] in addition, total can be with suitable passivating technique passivation, such as BCB (benzocyclobutene, benzocyclobutene).Perhaps, can use other surface passivation material,, make planar avalanche photodiode 210 outside passivation such as silica, silicon nitride or polyimides.
[0036] because electric capacity is not to be determined by big indecisive isolation mesa, so planar avalanche photodiode 110 and photodiode 10, because the area of p-n junction is little, electric capacity is low, thereby is at a high speed.Note, because electronics is in InAlAs rather than hole snowslide in InP, so these structures are put upside down with the APD geometry of common InP/InGaAs.Near this top (promptly wafer surface) that the place is positioned at device that exhausts that can make in the InGaAs uptake zone of putting upside down, and unlike the InP APD of routine.In other words, these structures 10,110 can make the High-Field multiplication region be overshadowed under the low uptake zone.This characteristic means, the electric field on upper face looks like the electric field in low PIN detector, thereby do not need protection ring, although where necessary, can control with the field that guard ring adds.
[0037] Fig. 1 and 2 p+ electric charge key-course 22 that draws, it can be crossed over whole isolation mesa and stretch with carbon or Be as the growth of p alloy.Although the p-n junction in this isolation mesa has big area, the electric capacity more than break-through does not increase basically.This is because the electric capacity (after the electric charge break-through and exhausting) of device, mainly determine by little diffusion region area (photodiode 10) or etched p+ district area (photodiode 110), can't help isolation mesa and determine, thus cause low electric capacity, APD at a high speed.
[0038] Fig. 3 relation of electric capacity and bias voltage of structure shown in Figure 1 of drawing.From Fig. 3 as seen, low electric capacity occurs after reaching punch through voltage.Specifically, the value when electric capacity starts from low bias voltage, this value is corresponding to the big isolation mesa area with the thickness of dynode layer.But on the high bias voltage after break-through (in other words, when electric charge key-course and absorbed layer exhaust), electric capacity drops to area corresponding to little p contact 12 and adds value corresponding to total depletion region thickness between p and the n contact.In addition, Fig. 4 above capacitance of break-through that draws increases with the p contact area, but as expectation like that, has nothing to do with the area of big isolation mesa.To less than 50 microns diameter, along the mesa diameter of axis of abscissas corresponding with little table top (isolation mesa is fixed on 50 microns), to greater than 50 microns diameter, little table top is fixed on 40 microns, and isolation mesa increases.
[0039] having, because electric field is in the center of InAlAs avalanche region maximum, and is low at the edge, avalanche region again, thus the ring that do not need protection, although the meticulous control that can carry out with guard ring.Fig. 5 this point of schematically drawing, field of calculating in the avalanche region 24 of drawing on the figure, this only at the APD center, directly below p contacts, be big.Therefore, depending on the avalanche gain of field exponentially, is big at the APD center only.This point is proved experimentally, as shown in Figure 6, draws on the figure as the photoelectric current gain of the measurement of leaving device centre distance function.
[0040] similarly, as shown in Figure 7, the field in the low band-gap absorption layer 20 is insignificant at the isolation mesa edge, and just in time the table top APD with routine is opposite, and the field of conventional table top APD is big in mesa edge.Have, because electric current also reduces on these surfaces, therefore the charged state at these borderline any surfaces or interface is lowered again.Like this, this designs makes this low band-gap layer passivation effectively.This reduction and passivation, the result can make device in that approximately for example the life-span on 150 ℃ surpasses 2000 hours (in other words, the dark current of device, approximately for example under 150 ℃, on greater than 2000 hours time period, with respect to initial value is constant basically), this is corresponding to normal working temperature, and for example the life-span under 70 ℃ was greater than 20 years.
[0041] last, Fig. 8 draws in device in the heart, as from the p contact downwards until the field of n contact distance function.This curve shows that the electric charge key-course is reduced to low-down value to the field in the absorbed layer effectively, and produces high field simultaneously in the avalanche layer of charge carrier multiplication.
[0042] therefore,, some feasible approach are arranged, for example, use the p contact (Fig. 1) of etched little table top p contact (Fig. 2) or diffusion for obtaining to make the local p contact of a localization.To the p contact of diffusion, be the InAlAs layer 16 that will enter, so that reduce lip-deep electric field by low-doped (or n or p) growth p diffusion.Can make them exhaust required voltage with reduction by grown low doped absorbed layer and dynode layer.
[0043] also to further point out, though this contact is spread, but be different from the p contact of common diffusion, p contact to common diffusion, conclusive doping control is essential, because to the APD of standard diffusion, this diffusion process can be controlled total electric charge in the length of amplitude, avalanche region of electric field in the position, multiplication region of p-n junction and the electric charge key-course, and this total electrical charge is determined the electric field value in High-Field avalanche region and low two district, InGaAs uptake zone.On the contrary, to APD10, this p diffusion only is the p contact, only requires indecisive process control.
[0044] as the discussion of front, Fig. 2 shows, does not use the p diffusion by etching " little table top ", can obtain local p contact zone.In other words, the growth of entire infrastructure comprises the p+ contact from the outset, and etching (can use stop etch layers) downwards then is until low-doped high band gap InAlAs passivation layer.Defined little local p contact zone like this, the relevant capacity area of this p contact zone control, thus cause low electric capacity and APD at a high speed.The advantage of this structure is that it spreads without any need for p from just intactly growth of beginning.This structure has low electric capacity (Fig. 3), response at a high speed, high gain bandwidth, center (ring does not need protection) that optic response is confined to device and extremely high sensitivity when being used as receiver.
[0045] in a specific embodiment, be used for one group of parameter of this little table top APD, for example have: the p doping InGaAs cap rock of 50A, below be the p doping InAlAs layer of 2000A and the InGaAs stop etch layers of 100A, all by 5 * 10
19Cm
-3Mix.Then be that the digital segmented layer of 500A non-impurity-doped InAlAs passivation layer, 180A non-impurity-doped, surface charge are 4.5 * 10
12Cm
-2The n of p doping charge layer, 1300A non-impurity-doped InAlAs dynode layer and 7000A mix 10
19Cm
-3Contact layer.Favourable little mesa diameter is 33 microns, and contacting table top with favourable outside is 60 microns.Such APD electric capacity is shown in Fig. 3.These parameter values are a kind of possibility, and other doping and one-tenth-value thickness 1/10 and other materials such as InP, also can be implemented in APD.For example, contact layer can make the resistance that causes because of for example diffusion of fluorine in the InAlAs contact layer increase minimum or elimination with the n type contact layer of InP.
[0046] pointed as top discussion, because photodiode 10,110 is compared with the APD of standard, reduce the table top electric field at isolation mesa edge widely, so the ring that do not need protection.But, if necessary, can spread leading edge with double diffusion shape p with guard ring or in the p contact, obtain more control.Realize that more the field is controlled, also can be for example by injecting n alloy (as Si) or deep donor impurity (as O) in mesa edge, passing through at the ion (as H, He) in the semi-insulating district of mesa edge injection establishment or by hydrogen passivation at this edge.All these methods all reduce the amplitude of p+ electric charge key-course on the mesa edge, thereby further reduce electric field.These are modified in Fig. 8 and 10 and schematically draw.
[0047] among Fig. 9 with the planar avalanche photodiode of 210 marks, comprise a control structure 30, for example Fu Jia diffusion region, can produce and mix or the injection region or the hydrogen passivation of insulation layer.Field control structure 30 is schematically drawn with a pair of intrusive body that puts in planar avalanche photodiode 110.The planar avalanche photodiode 310 that Figure 10 draws has micro-mesa 32 and intrusive body 30.Photodiode 310 can be used any other method passivation different with said method.
[0048] as mentioned above, various embodiments of the present invention provide many advantages, for example the structure in planar avalanche district.In addition, the structure of the planar avalanche photodiode 10,110 that Fig. 1 and 2 draws respectively, or Fig. 9 and 10 210,310 structures of drawing respectively, put upside down with typical InP/InGaAs avalanche photodide geometry, since opposite with hole snowslide in the InP multiplication region of seeing in the avalanche photodide of routine, be electronics snowslide in n N-type semiconductor N dynode layer 24.This structural putting upside down can make low place in the InGaAs uptake zone on the top of device, and in standard I nP avalanche photodide, is the top that is installing the High-Field avalanche region.
[0049] therefore, in the various embodiments of the invention described above, the High-Field avalanche region (promptly is overshadowed under the several semiconductor layer) in the bottom.Make such structure, avoided the difficulty of diffusing step, etching step or the implantation step of accurate control,, make by initial crystal growth because all layers particularly comprise the thickness and the doping of multiplication and electric charge key-course.Like this, all these parameters can repeatedly be grown and are uniform on entire wafer all under good control.The decisive part of the High-Field of structure is plane really, covered and therefore well passivated, and diffusing step or alternative little mesa etch step (producing little area contact with it) does not require the processing procedure control of hell and high water.
[0050] because the high uniformity of these APD, more owing to require simple processing procedure, the decisive parameter of all growths in these devices, all extremely evenly and be similar to the PIN detector very high productivity ratio is arranged like that.Therefore, can make big high-performance APD array, this is can not accomplish easily with the APD technology of standard.
[0051] according to APD of the present invention design, can with the PIN detector combination that strengthens, produce APD 410 as shown in figure 11.Along with diffusion profile enters uptake zone 20, by the shape of control diffusion profile 14, can set up the breast field of quickening carrier mobility, this and high speed PIN detector are similar.P diffusion region 14 then along with diffusing into the uptake zone, gradually becomes low-doped being heavy doping near contact 12 top.Correspondingly, the hole concentration that p mixes stretches and enters absorbed layer, descends along with entering absorbed layer then, sets up and bears the field and strengthen electron transfer, also reduces the hole acquisition time.So thicker absorbed layer can be arranged, thereby improve sensitivity.PIN detector details with above-mentioned characteristic, the U.S. Provisional Application U.S.Provisional Application No.60/467 that can submit on May 2nd, 2003, find in 399, and the title of submitting to together with it is the international pct application of PIN Photodetector (PIN photoelectric detector): International PCT Application, find among the Attorney Docket No.10555-068, here quote the full content of these applications, for reference.
[0052] above-mentioned photoelectric detector can be implemented as the waveguide type photoelectric detector or as single photon detector.This photoelectric detector can have integrated lens, to improve the collection of light.
[0053] front or other embodiment, all below within the scope of claims.For example, the semiconductor of all n and p doping can exchange.In other words, the n and the p that provide the little table top in top of n N-type semiconductor N to contact with p type bottom mix, and can put upside down.
Claims (54)
1. planar avalanche photodiode comprises:
First contact layer;
First semiconductor layer that the diffusion region is arranged, this diffusion region have the area littler than first semiconductor layer, and contiguous first contact layer in its position;
Define second semiconductor layer of second contact layer;
Semiconductor multiplication layer between first and second contact layers; With
Semiconductor absorption layer between the semiconductor multiplication layer and first semiconductor layer,
This photodiode has low electric capacity and low field near absorbed layer and dynode layer edge.
2. according to the photodiode of claim 1, first semiconductor layer wherein is a n type and the diffusion region is the p type.
3. according to the photodiode of claim 2, first contact layer wherein is a p type and second contact layer is the n type.
4. according to the photodiode of claim 1, first semiconductor layer wherein is a p type and the diffusion region is the n type.
5. according to the photodiode of claim 4, first contact layer wherein is a n type and second contact layer is the p type.
6. according to the photodiode of claim 1, first semiconductor layer wherein and diffusion region both are the p types, form the p-p+ knot.
7. according to the photodiode of claim 1, also comprise at least one segmented layer of the contiguous semiconductor absorption layer in its position.
8. according to the photodiode of claim 1, also comprise the p N-type semiconductor N electric charge key-course of the contiguous semiconductor multiplication layer in its position.
9. according to the photodiode of claim 1, first semiconductor layer wherein is InAlAs.
10. according to the photodiode of claim 1, second semiconductor layer wherein is InAlAs.
11. according to the photodiode of claim 1, semiconductor multiplication layer wherein is InAlAs.
12. according to the photodiode of claim 1, semiconductor absorption layer wherein is InGaAs.
13. according to the photodiode of claim 1, the diffusion profile of this photodiode wherein, be with p doping hole concentration by the decline mode into semiconductor absorption layer that stretches, set up with this and to bear, to strengthen electron transfer and reduce the hole acquisition time.
14. according to the photodiode of claim 1, wherein this photodiode is arranged in the photodiode array.
15. according to the photodiode of claim 1, wherein this photodiode is the waveguide type photodiode.
16. according to the photodiode of claim 1, wherein this photodiode is a single photon detector.
17., also comprise and improve the integral lens that light is collected according to the photodiode of claim 1.
18. according to the photodiode of claim 1, first contact layer wherein or second contact layer are n type InP.
19. according to the photodiode of claim 1, wherein this photodiode has dark current, surpassing on 2000 hours time period, is constant basically with respect to initial value.
20. according to the photodiode of claim 1, wherein life-span of having of this photodiode was above 20 years.
21. a method of making photodiode comprises:
First semiconductor layer of definition first contact zone is provided;
The deposition of semiconductor dynode layer;
The deposition of semiconductor absorbed layer;
Deposit second semiconductor layer;
Deposit second contact layer; With
Diffusion has the diffusion region of the area littler than the area of second semiconductor layer, contiguous second contact layer in the position of this diffusion region.
22., also comprise contiguous at least one segmented layer of semiconductor absorption layer deposit according to the method for claim 21.
23., also comprise contiguous semiconductor multiplication layer deposition of semiconductor electric charge key-course according to the method for claim 21.
24., also comprise the step of deposit one deck n type contact layer at least according to the method for claim 21.
25. according to the method for claim 21, first semiconductor layer wherein is InAlAs.
26. according to the method for claim 21, second semiconductor layer wherein is InAlAs.
27. according to the method for claim 21, semiconductor multiplication layer wherein is InAlAs.
28. according to the method for claim 21, semiconductor absorption layer wherein is InGaAs.
29. according to the method for claim 21, second semiconductor layer wherein is a n type and the diffusion region is the p type.
30. according to the method for claim 29, first contact layer wherein is a n type and second contact layer is the p type.
31. according to the method for claim 21, second semiconductor layer wherein is a p type and the diffusion region is the n type.
32. according to the method for claim 31, first contact layer wherein is a p type and second contact layer is the n type.
33. according to the method for claim 21, second semiconductor layer wherein and diffusion region both are the p types, form the p-p+ knot.
34. a planar avalanche photodiode comprises:
First contact layer;
Semiconductor absorption layer, this first contact layer has the area littler than semiconductor absorption layer;
Semiconductor multiplication layer, this semiconductor absorption layer is between first contact layer and semiconductor multiplication layer; With
Define the semiconductor layer of second contact layer, this semiconductor absorption layer and semiconductor multiplication layer between first and second contact layers,
This photodiode has low electric capacity and low field near absorbed layer and dynode layer edge.
35., also comprise at least one segmented layer of the contiguous semiconductor absorption layer in its position according to the photodiode of claim 34.
36., also comprise the semiconductor electric charge key-course of the contiguous semiconductor multiplication layer in its position according to the photodiode of claim 34.
37. according to the photodiode of claim 34, second contact layer wherein is InAlAs.
38. according to the photodiode of claim 34, semiconductor multiplication layer wherein is InAlAs.
39. according to the photodiode of claim 34, semiconductor absorption layer wherein is InGaAs.
40. according to the photodiode of claim 34, first contact layer wherein is the InAlAs semiconductor layer.
41. according to the photodiode of claim 34, first contact zone wherein is the p type.
42. according to the photodiode of claim 41, second contact layer wherein is the n type.
43. according to the photodiode of claim 34, first contact zone wherein is the n type.
44. according to the photodiode of claim 43, second contact layer wherein is the p type.
45. according to the photodiode of claim 34, also comprise passivation region, this passivation region comprises the semiconductor layer between first contact layer and semiconductor absorption layer.
46. according to the photodiode of claim 45, passivation region wherein comprises: the part of the part of first segmented layer and semiconductor absorption layer and dynode layer.
47. according to the photodiode of claim 34, the diffusion profile that has of this photodiode wherein, be with p doping hole concentration by the decline mode into semiconductor absorption layer that stretches, set up with this and to bear, to strengthen electron transfer and reduce the hole acquisition time.
48. according to the photodiode of claim 34, wherein this photodiode is arranged in the photodiode array.
49. according to the photodiode of claim 34, wherein this photodiode is the waveguide type photodiode.
50. according to the photodiode of claim 34, wherein this photodiode is a single photon detector.
51., also comprise and improve the integral lens that light is collected according to the photodiode of claim 34.
52. according to the photodiode of claim 34, first contact layer wherein or second contact layer are n type InP.
53. according to the photodiode of claim 34, wherein this photodiode has dark current, surpassing on 2000 hours time period, is constant basically with respect to initial value.
54. according to the photodiode of claim 34, wherein life-span of having of this photodiode was above 20 years.
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PCT/US2004/013584 WO2005114712A1 (en) | 2004-04-30 | 2004-04-30 | Planar avalanche photodiode |
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EP (1) | EP1741127A4 (en) |
JP (1) | JP2007535810A (en) |
CN (1) | CN100541721C (en) |
CA (1) | CA2564218A1 (en) |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102576720A (en) * | 2009-08-12 | 2012-07-11 | 格罗方德半导体公司 | Silicon photon detector |
CN104198909A (en) * | 2014-09-15 | 2014-12-10 | 华东光电集成器件研究所 | Mesa avalanche diode core area measuring method |
CN111066157A (en) * | 2017-09-15 | 2020-04-24 | 三菱电机株式会社 | Semiconductor light receiving element and method for manufacturing the same |
CN111354807A (en) * | 2018-12-20 | 2020-06-30 | 慧与发展有限责任合伙企业 | Avalanche photodiode, computing or communication device and method for producing an optoelectronic component |
Families Citing this family (4)
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JP5025330B2 (en) | 2007-05-22 | 2012-09-12 | 三菱電機株式会社 | Semiconductor light receiving element and manufacturing method thereof |
US20150115319A1 (en) * | 2012-05-17 | 2015-04-30 | Picometrix, Llc | Planar avalanche photodiode |
US10921369B2 (en) * | 2017-01-05 | 2021-02-16 | Xcalipr Corporation | High precision optical characterization of carrier transport properties in semiconductors |
CN110690314B (en) * | 2019-09-05 | 2023-06-27 | 中国电子科技集团公司第十三研究所 | Ultraviolet detector with absorption layer and multiplication layer in separate structures and preparation method thereof |
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JPH02262378A (en) * | 1989-04-03 | 1990-10-25 | Toshiba Corp | Manufacture of semiconductor photodetector |
JPH0389566A (en) * | 1989-08-31 | 1991-04-15 | Nec Corp | Superlattice avalanche photodiode |
US5126281A (en) * | 1990-09-11 | 1992-06-30 | Hewlett-Packard Company | Diffusion using a solid state source |
US6548878B1 (en) * | 1998-02-05 | 2003-04-15 | Integration Associates, Inc. | Method for producing a thin distributed photodiode structure |
JP4095746B2 (en) * | 1999-12-17 | 2008-06-04 | 日本オプネクスト株式会社 | Semiconductor light receiving device and manufacturing method |
JP4058921B2 (en) * | 2001-08-01 | 2008-03-12 | 日本電気株式会社 | Semiconductor photo detector |
WO2003065416A2 (en) * | 2002-02-01 | 2003-08-07 | Picometrix, Inc. | Enhanced photodetector |
CA2474560C (en) * | 2002-02-01 | 2012-03-20 | Picometrix, Inc. | Planar avalanche photodiode |
US6794631B2 (en) * | 2002-06-07 | 2004-09-21 | Corning Lasertron, Inc. | Three-terminal avalanche photodiode |
-
2004
- 2004-04-30 WO PCT/US2004/013584 patent/WO2005114712A1/en active Application Filing
- 2004-04-30 EP EP04822037A patent/EP1741127A4/en not_active Ceased
- 2004-04-30 CA CA002564218A patent/CA2564218A1/en not_active Abandoned
- 2004-04-30 JP JP2007510676A patent/JP2007535810A/en active Pending
- 2004-04-30 CN CNB2004800432368A patent/CN100541721C/en not_active Expired - Lifetime
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Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102576720A (en) * | 2009-08-12 | 2012-07-11 | 格罗方德半导体公司 | Silicon photon detector |
CN102576720B (en) * | 2009-08-12 | 2015-08-05 | 格罗方德半导体公司 | silicon photon detector |
CN104198909A (en) * | 2014-09-15 | 2014-12-10 | 华东光电集成器件研究所 | Mesa avalanche diode core area measuring method |
CN104198909B (en) * | 2014-09-15 | 2016-11-23 | 华东光电集成器件研究所 | A kind of measuring method of mesa avalanche diode chip area |
CN111066157A (en) * | 2017-09-15 | 2020-04-24 | 三菱电机株式会社 | Semiconductor light receiving element and method for manufacturing the same |
CN111354807A (en) * | 2018-12-20 | 2020-06-30 | 慧与发展有限责任合伙企业 | Avalanche photodiode, computing or communication device and method for producing an optoelectronic component |
US11227967B2 (en) | 2018-12-20 | 2022-01-18 | Hewlett Packard Enterprise Development Lp | Optoelectronic component with current deflected to high-gain paths comprising a three-terminal avalanche photodiode having an insulating layer between absorbing region and a leakage path |
CN111354807B (en) * | 2018-12-20 | 2022-12-16 | 慧与发展有限责任合伙企业 | Avalanche photodiode and method of manufacturing an optoelectronic component |
Also Published As
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EP1741127A1 (en) | 2007-01-10 |
HK1113520A1 (en) | 2008-10-03 |
CN100541721C (en) | 2009-09-16 |
JP2007535810A (en) | 2007-12-06 |
WO2005114712A1 (en) | 2005-12-01 |
EP1741127A4 (en) | 2009-04-22 |
CA2564218A1 (en) | 2005-12-01 |
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