CN101029984A - Crystal-liquid display device and its pulse-wave adjusting circuit - Google Patents
Crystal-liquid display device and its pulse-wave adjusting circuit Download PDFInfo
- Publication number
- CN101029984A CN101029984A CN 200710079495 CN200710079495A CN101029984A CN 101029984 A CN101029984 A CN 101029984A CN 200710079495 CN200710079495 CN 200710079495 CN 200710079495 A CN200710079495 A CN 200710079495A CN 101029984 A CN101029984 A CN 101029984A
- Authority
- CN
- China
- Prior art keywords
- pulse
- signal
- power supply
- drive chip
- pixel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
A liquid crystal display is prepared as setting pulse wave regulation circuit between power supply and grid driving chip, using power supply to provide power supply signal, using pulse wave regulation circuit to regulate multiple pulse wave of power supply signal to make pulse wave have a chamfer for raising display quality of liquid crystal display face plate.
Description
Technical field
The present invention is about a kind of LCD and pulse-wave adjusting circuit thereof, and this kind LCD can offer the power supply signal adjustment in advance of grid drive chip at power supply, and is poor with the feed-trough voltage that reduces even number bar sub-pixel and odd number bar sub-pixel.
Background technology
Along with scientific-technical progress, various electronic products have become people's indispensable part of living.Wherein, display is the significant components of electronic multimedia product.Because LCD (liquid crystal display, LCD) have that power saving, the no width of cloth are penetrated, volume is little, low power consumption, do not take up space, advantage such as flat square, high resolving power, image quality are stable, replace traditional cathode-ray tube display (cathode ray tubedisplay gradually, CRT display), be widely used on the display panel of electronic products such as mobile phone, screen, Digital Television, mobile computer.
On the display panel of general LCD, have a plurality of pixels (pixel) with array format.Also be provided with active matrix driving circuit on the display panel, in order to the action of each pixel on the control display panel.Each pixel all has a thin film transistor (TFT), and (thin film transistor is TFT) as switch.
Known thin film transistor (TFT) has three contacts, is respectively grid (gate), source electrode (source) and drain electrode (drain).The grid of the thin film transistor (TFT) of each pixel and source/drain couple with a pair of orthogonal sweep trace and data line respectively.Therefore the panel of Active Matrix Display has the sweep trace of many orthogonal arrangements and the active matrix driving circuit that data line is formed, and wherein, sweep trace is driven by grid drive chip, the switch that act as thin film transistor (TFT) of grid drive chip; Data line is then driven by source driving chip, and acting as of source driving chip provides the data-signal that charges into pixel.
In order effectively to reduce cost and to reduce the volume of LCD, industry has proposed half Driving technique (Multi-Switch Half source Driving of a kind of effective minimizing source driving chip number, MSHD), it utilizes and traditional different type of drive, makes the number of source driving chip only need half of known technology quantity.Traditional type of drive is that the time of line charging is the width of a grid frequency (GCK), and MSHD then reduces by half its duration of charging (for traditional half), therefore the quantity of source driving chip can be reduced by half.Figure 1A is the circuit diagram of known MSHD, and Figure 1B then is its gate drive signal waveform synoptic diagram.Gate drive signal repeats to form according to the order of one first pulse 11, one second pulse 13 and one the 3rd pulse 15.Wherein first pulse 11 has big work period (duty cycle), and second pulse 13 and 15 of the 3rd pulses all have a less work period.
In Figure 1A, the circuit function principle of known MSHD only is described, for example sub-pixel A, sub-pixel B, sub-pixel C, sub-pixel D and sub-pixel E with parton pixel (subpixel).The drain electrode and the data line of the thin film transistor (TFT) of these sub-pixels join, and grid is connected to sweep trace Gn, sweep trace Gn-1, sweep trace Gn+1 respectively, and source electrode more is connected to the drain electrode of another sub-pixel not only via liquid crystal capacitance ground connection.In this figure, the source electrode of sub-pixel A and sub-pixel C is connected to the drain electrode of sub-pixel B and sub-pixel D respectively; The grid of sub-pixel B and sub-pixel D then is connected to sweep trace Gn-1 and sweep trace Gn respectively; The source electrode of sub-pixel B and sub-pixel D then connects ground connection behind the liquid crystal capacitance.Look it with the direction parallel with data line, sub-pixel A, sub-pixel C and sub-pixel E are defined as odd number bar sub-pixel, and sub-pixel B and sub-pixel D then are defined as even number bar sub-pixel.
Among Figure 1B, GCK is the frequency signal of gate drive signal, and as seen from the figure, the gate drive signal of being made up of first pulse 11, second pulse 13 and the 3rd pulse 15 needs two frequency periods consuming time.The positive edge of first pulse 11 just with the positive edge of a frequency simultaneously, and the negative edge of first pulse 11 is early than the negative edge of this frequency; The positive edge of second pulse 13 just with the positive edge of a back frequency simultaneously, and the negative edge of second pulse 13 is early than the negative edge of this back frequency; The positive edge of the 3rd pulse 15 just with negative edge while of this back frequency, and the negative edge of the 3rd pulse 15 is early than the positive edge of a back frequency again.And the sequential of adjacent sweep trace respectively postpones a recurrence interval, that is the positive edge of second pulse 13 of sweep trace Gn-1 is proper and the positive edge while of first pulse 11 of sweep trace Gn, and the rest may be inferred.
The representative of the letter of following table is in this stage, and which sub-pixel is opened and charges and write voltage, and the bold Italic letter representation data line institute this moment desire that adds bottom line is supplied with the data voltage person.Simultaneously referring to Figure 1B, when the time is T1, because sweep trace Gn and sweep trace Gn-1 open simultaneously, so sub-pixel A, sub-pixel B and sub-pixel E are recharged simultaneously, but this moment, data voltage that data line charged into but was based on sub-pixel B, other sub-pixel A and sub-pixel E will after time point be written into correct voltage.
Furthermore, go into the T1 time point of sub-pixel B when being positioned at write data, the signal of sweep trace Gn and sweep trace Gn-1 all is required to be high levle, and this moment, the signal of input scan line Gn and sweep trace Gn-1 laid respectively at first pulse 11 and second pulse 13; Go into the T2 time point of sub-pixel E when being positioned at write data, the signal that only needs sweep trace Gn-1 is that high levle gets final product, and the signal of input scan this moment line Gn-1 is positioned at the 3rd pulse 15.By that analogy, when desire was imported data voltage to odd number bar sub-pixel, the 3rd pulse 15 was a high levle just; When desire was imported data voltage to even number bar sub-pixel, first pulse 11 and second pulse 13 were high levle just.According to T1, T2, T3, T4 and T5 sequential, data voltage just writes sub-pixel B, sub-pixel E, sub-pixel D, sub-pixel A and sub-pixel C respectively.
| Time | T1 | T2 | T3 | T4 | T5 |
| The sub-pixel that is recharged | A、B、E | E | A、C、D | A | C |
Yet this kind MSHD Driving technique can make feed-trough voltage (feedthroughvoltage) difference of adjacent subpixels, more causes the final voltage difference distance between odd number bar sub-pixel and the even number bar sub-pixel, shown in Fig. 1 C.Its reason is the number of times difference that the thin film transistor (TFT) 117 of adjacent subpixels is opened, the thin film transistor (TFT) 117 of odd number bar sub-pixel and even number bar sub-pixel all is subjected to the influence of 1 feed-trough voltage, when yet even number bar sub-pixel cuts off the power supply at odd number bar sub-pixel, originally be stored in even number strip pixel liquid crystal capacitor C
LCVoltage just can be subjected to odd number strip pixel liquid crystal capacitor C
LCInfluence, make originally to be stored in even number strip pixel liquid crystal capacitor C
LCVoltage be kept to original half, second half voltage then fills to odd number strip pixel liquid crystal capacitor C
LC, causing adjacent subpixels final voltage difference each other, each sub-pixel is differed by data voltages charged, makes each color sub-pixel brightness disproportionation, and then the whole image quality of influence.
Therefore, a kind of gap that can reduce the adjacent subpixels feed-trough voltage, the solution of improving the image quality of the Thin Film Transistor-LCD that uses the MSHD driving circuit simultaneously is that industry is needed badly for this reason.
Summary of the invention
A purpose of the present invention is to provide a kind of pulse-wave adjusting circuit, is connected between a power supply and a grid drive chip, and power supply provides a power supply signal, and pulse-wave adjusting circuit comprises one first switch and a discharge assembly.First switching response, one first control signal is to determine power supply signal is sent to the time of grid drive chip.Discharge assembly responds one second control signal, has been sent to the time of the power supply signal of grid drive chip with the decision discharge.First switch and discharge assembly alternate conduction.
Another purpose of the present invention is to provide a kind of pulse-wave adjusting circuit, be connected between a power supply and a grid drive chip, power supply provides a plurality of power supply signals, and this power supply signal has different voltage quasi positions, and pulse-wave adjusting circuit comprises a signal generator and a selector switch.Signal generator produces one group of control signal.Selector switch responds this group control signal, this power supply signal is sent to the time of grid drive chip with decision.This power supply signal that has been sent to grid drive chip determines the amplitude size of an input pulse wave signal, the input pulse wave signal has one first pulse, one second pulse and one the 3rd pulse, first pulse and the 3rd pulse at least one of them amplitude greater than the amplitude of second pulse.
Aforementioned pulse-wave adjusting circuit only utilizes a pulse-wave adjusting circuit, changes the drive waveforms of input driving circuit, just can reduce the gap of adjacent subpixels feed-trough voltage.
Another object of the present invention is to provide a kind of LCD, it comprises foregoing power supply, a plurality of grid drive chip and a plurality of pulse-wave adjusting circuit.This liquid crystal indicator has aforementioned pulse-wave adjusting circuit, the power supply signal that offers grid drive chip at power supply is adjusted in advance, so it is poor to reduce the feed-trough voltage of even number bar sub-pixel and odd number bar sub-pixel, and then improves liquid crystal indicator picture display quality.
After reaching the embodiment of describing subsequently with reference to the accompanying drawings, the persons of ordinary skill in the technical field of the present invention just can understand other purpose of the present invention, and technological means of the present invention and embodiment.
Description of drawings
Figure 1A is the MSHD driving circuit figure of known technology;
Figure 1B is the MSHD gate drive signal frequency plot of known technology;
Fig. 1 C is the synoptic diagram that the sub-pixel of the MSHD of known technology is influenced by feed-trough voltage;
Fig. 2 is according to first embodiment of the present invention synoptic diagram;
Fig. 2 A is the pulse-wave adjusting circuit synoptic diagram according to the first embodiment of the present invention;
Fig. 2 B is the unjustified single gate drive signal frequency plot according to the first embodiment of the present invention;
Fig. 2 C is a plurality of adjustment back pulse-wave adjusting circuit signal gate drive signal frequency plot according to the first embodiment of the present invention;
Fig. 2 D is a plurality of adjustment back gate drive signal frequency plot according to another embodiment of the first embodiment of the present invention;
Fig. 2 E is a plurality of adjustment back pulse-wave adjusting circuit signal gate drive signal frequency plot according to the another embodiment of the first embodiment of the present invention;
Fig. 3 A is a pulse-wave adjusting circuit synoptic diagram according to a second embodiment of the present invention;
Fig. 3 B is a gate drive signal frequency plot according to a second embodiment of the present invention;
Fig. 4 A is the pulse-wave adjusting circuit synoptic diagram of a third embodiment in accordance with the invention;
Fig. 4 B is the gate drive signal frequency plot of a third embodiment in accordance with the invention;
Fig. 5 A is the pulse-wave adjusting circuit synoptic diagram of a fourth embodiment in accordance with the invention; And
Fig. 5 B is the gate drive signal frequency plot of a fourth embodiment in accordance with the invention.
Wherein, Reference numeral:
Pulse in 11: the first
Pulse in 13: the second
Pulse in 15: the three
117: thin film transistor (TFT)
A: sub-pixel
B: sub-pixel
C: sub-pixel
D: sub-pixel
E: sub-pixel
C
LC: liquid crystal capacitance
Gn-1: sweep trace
Gn: sweep trace
Gn+1: sweep trace
T1, T2, T3, T4: time
2: liquid crystal indicator
20: power supply
202: power supply signal
204: pulse wave
204a: first pulse
204b: second pulse
204c: the 3rd pulse
21: pulse-wave adjusting circuit
211: the first switches
213: discharge assembly
215: resistance
217: second switch
22: grid drive chip
23: source driving chip
24: display panels
S
1: first control signal
S
2: second control signal
302: power supply signal
311: signal generator
313: selector switch
320: the input pulse wave signal
402: power supply signal
411: signal generator
413: selector switch
420: the input pulse wave signal
502: power supply signal
511: signal generator
513: selector switch
520: the input pulse wave signal
V1: the first positive accurate position voltage signal
V2: the second positive accurate position voltage signal
V3: the first negative accurate position voltage signal
V4: the second negative accurate position voltage signal
V5: the 3rd negative accurate position voltage signal
S-
C1, S
C2: control signal
Embodiment
Feed-trough voltage is determined by formula as follows:
Wherein, C
GDBe the stray capacitance between film crystal tube grid and the drain electrode, C
LCBe liquid crystal capacitance, C
StFor keeping electric capacity, Δ V=(V-V
GL), V
GLBe the low level of enabling signal waveform, the pressure reduction the when voltage when V finishes for the enabling signal waveform, Δ V finish for the enabling signal waveform.When Δ V reduces, V
FeedthroughAlso can and then reduce, therefore, just can reduce the influence of feed-trough voltage sub-pixel by reducing Δ V to reduce feed-trough voltage.Therefore, the present invention is convenient proposes embodiment as described below with this principle.
Wherein the thin portion connecting structure of power supply 20, a pulse-wave adjusting circuit 21 and a grid drive chip 22 is shown in Fig. 2 A.Pulse-wave adjusting circuit 21 is connected in 22 of a power supply 20 and grid drive chip, and grid drive chip 22 other ends then are connected to the wherein sweep trace in the active matrix driving circuit.Power supply 20 provides a power supply signal 202, and in this embodiment, power supply signal 202 can be a direct current voltage signal.Pulse-wave adjusting circuit 21 comprises one first switch 211 and a discharge assembly 213.Discharge assembly 213 is a second switch 217 of resistance 215 and series connection with it, and an end of second switch 217 is connected with resistance 215, and the other end is ground connection then.Pulse-wave adjusting circuit 21 forms pulse waves 204 with adjusted power supply signal 202 via grid drive chip 22 after adjusting the accurate position of power supply signals 202, and is sent to the sweep trace with active matrix driving circuit.
The pulse wave 204 of input scan line is repeated to form by the order of one first pulse 204a, one second pulse 204b and one the 3rd pulse 204c shown in Fig. 2 B figure.Wherein, the first pulse 204a has big work period, and the second pulse 204b and the 3rd pulse 204c then all have a less work period.
First switch, 211 responses, one first control signal S
1, to determine power supply signal 202 is sent to the time of grid drive chip 22, as the first control signal S
1During for high levle, first switch 211 is the state of conducting, and power supply signal 202 just can be sent to grid drive chip 22, to form pulse wave 204.Second switch 217 responses one second control signal S
2, be sent to the discharge time of the power supply signal 202 of grid drive chip 22 to determine discharge.As the second control signal S
2During for high levle (this moment the first control signal S
1Be low level), second switch 217 just can conducting, the power supply signal 202 that originally was sent to grid drive chip 22 just can be via resistance 215 discharges of ground connection, the accurate position that changes power supply signal 202 is a top rake signal, and the pulse wave 204 that grid drive chip 22 is formed is adjusted into the pulse wave with top rake.In this embodiment, the first control signal S
1With the second control signal S
2For anti-phase, make first switch 211 and second switch 217 alternate conduction, and the first control signal S
1Work period much larger than the second control signal S
2Work period.
At each bar sweep trace of driving circuit, each bar sweep trace front end all is connected with a power supply 20, a pulse-wave adjusting circuit 21 and a grid drive chip 22.Fig. 2 C is the sequential chart of the pulse wave 204 of input scan line Gn, sweep trace Gn+1 and sweep trace Gn+2, as seen from the figure, and the second control signal S
2High levle correspond to the first pulse 204a of pulse wave 204 of each bar sweep trace of input and the end of the second pulse 204b, because the first pulse 204a and the second pulse 204b desire to charge into the data voltage of even number bar sub-pixel in order to activation, so make the final charging voltage of even number bar sub-pixel be subjected to the second control signal S of pulse-wave adjusting circuit 21
2The influence and reduce, that is discharge process changes the accurate position of power supply signal 202, the pulse wave 204 that grid drive chip 22 is formed becomes a top rake pulse wave, so just obtains required being reduced to Δ V ' time as Δ V, and the feed-trough voltage of even number bar sub-pixel also can be along with the effect of minimizing.In addition, by adjusting resistance value, just can adjust the minimizing degree of feed-trough voltage.
Among first embodiment, control the mode that first switch 211 and second switch 217 conductings close and to have another embodiment, in order to improve the feed-trough voltage of odd number bar sub-pixel, the sequential chart of the pulse wave 204 of its input scan line Gn, sweep trace Gn+1 and sweep trace Gn+2 is shown in Fig. 2 D.In this embodiment, the second control signal S
2High levle correspond to the end of the 3rd pulse 204c of each pulse wave 204 of each bar sweep trace of input, because the 3rd pulse 204c desires to charge into the data voltage of odd number bar sub-pixel in order to activation, so make the final charging voltage of odd number bar sub-pixel be subjected to the second control signal S of pulse-wave adjusting circuit 21
2The influence and reduce, that is discharge process changes the accurate position of power supply signal 202, the pulse wave 204 that grid drive chip 22 is formed becomes a top rake pulse wave, so just obtains required being reduced to Δ V ' time as Δ V, and the feed-trough voltage of odd number bar sub-pixel also can be along with the effect of minimizing.
Among first embodiment, control the mode that first switch 211 and second switch 217 conductings close and to have another embodiment, in order to improve the feed-trough voltage of odd number bar sub-pixel and even number bar sub-pixel simultaneously, the sequential chart of pulse wave is shown in Fig. 2 E after the adjustment of its input scan line Gn, sweep trace Gn+1 and sweep trace Gn+2.In this embodiment, the second control signal S
2High levle correspond to charging latter stage of even number bar sub-pixel and odd number bar sub-pixel, that is correspond to the first pulse 204a, the second pulse 204b of each pulse wave 204 of each bar sweep trace of input and the end of the 3rd pulse 204c, because data voltage, the 3rd pulse 204c that the first pulse 204a and the second pulse 204b desire to charge into even number bar sub-pixel in order to activation desire to charge into the data voltage of odd number bar sub-pixel in order to activation, so make the final charging voltage of even number bar sub-pixel and odd number bar sub-pixel all be subjected to the second control signal S
2The influence and reduce, that is discharge process changes the accurate position of power supply signal 202, the pulse wave 204 that grid drive chip 22 is formed becomes a top rake pulse wave, so just obtain required being reduced to Δ V ' time as Δ V, the feed-trough voltage of even number bar sub-pixel and odd number bar sub-pixel also can be along with the effect of minimizing.
By aforementioned formula as can be known, when Δ V increases, V
FeedthroughThen can increase thereupon.In addition, because odd number bar sub-pixel only just can be opened by a thin film transistor (TFT), and even number bar sub-pixel needs two thin film transistor (TFT)s to open, make that the display performance of even number bar sub-pixel is poor than the display performance of odd number bar sub-pixel, therefore if the Δ V that passes through to reduce first pulse and second pulse to reduce the feed-trough voltage of even number bar sub-pixel, just can improve the display performance of even number bar sub-pixel; Or the Δ V by increasing by the 3rd pulse reduces the display performance of odd number bar sub-pixel to improve the feed-trough voltage of odd number bar sub-pixel, reducing the gap of adjacent subpixels feed-trough voltage, and then improves the image quality of LCD.
The second embodiment of the present invention also is a liquid crystal indicator 2 shown in Figure 2, and wherein the thin portion connecting structure of power supply 20, a pulse-wave adjusting circuit 21 and a grid drive chip 22 as shown in Figure 3A.In this embodiment, pulse-wave adjusting circuit 21 is connected in 22 of power supply 20 and grid drive chip, and grid drive chip 22 other ends then are connected to and use reduce by half wherein sweep trace in the active matrix driving circuit of technology of multi-breal switch source drive.Power supply 20 provides a plurality of power supply signals 302, these power supply signals 302 have different voltage quasi positions, with present embodiment, one first positive accurate position voltage signal V1, one second positive accurate position voltage signal V2 and three kinds of direct current quasi-position signals of the first negative accurate position voltage signal V3 are provided altogether, V1=25 volt wherein, the V2=18 volt, the V3=-6 volt.
Pulse-wave adjusting circuit 21 comprises a signal generator 311 and a selector switch 313.Signal generator 311 produces one group of control signal S
C1And S
C2This group control signal of selector switch 313 responses, to determine which power supply signal 302 is sent to the time of grid drive chip 22, wherein, control signal S
C1In order to the time that determines that positive voltage accurate position signal V1 in which power supply signal 302 and V2 are sent to grid drive chip 22, control signal S
C2Be sent to the time of grid drive chip 22 in order to decision negative voltage accurate position signal V3.
Be sent to grid drive chip 22 via these power supply signals 302 after selector switch 313 selections, to form an input pulse wave signal 320, the positive accurate position voltage of input pulse wave signal 320 is selected from the first positive accurate position voltage signal V1 and one second positive accurate position voltage signal V2, and the negative accurate position voltage of input pulse wave signal 320 is the first negative accurate position voltage signal V3.The input pulse wave signal 320 of importing each sweep trace all has one first pulse, one second pulse and one the 3rd pulse, and the amplitude of the 3rd pulse is greater than the amplitude of first pulse and second pulse.Input pulse wave signal 320 is sent to the sweep trace of active matrix driving circuit again via grid drive chip 22.
Fig. 3 B is the sequential chart of the input pulse wave signal 320 of input scan line Gn and sweep trace Gn+1, as seen from the figure, the voltage quasi position of the first positive standard position voltage signal V1 is higher than the voltage quasi position of the second positive accurate position voltage signal V2, so when producing first pulse and second pulse, control signal S
C1Control selector switch 313 transmits the second positive accurate position voltage signal V2 to grid drive chip 22; When producing the 3rd pulse, control signal S
C1Control selector switch 313 transmits the first positive accurate position voltage signal V1 to grid drive chip 22, makes the amplitude of the amplitude of the 3rd pulse greater than first pulse and second pulse.So just can make the Δ V (25-(6)=31) of the Δ V (18-(6)=24) of first pulse and second pulse less than the 3rd pulse.Because the 3rd pulse desires to charge into the data voltage of odd number bar sub-pixel in order to activation, and first pulse and second pulse desire to charge into the data voltage of even number bar sub-pixel in order to activation, so it is poor and then to reduce the feed-trough voltage of even number bar sub-pixel and odd number bar sub-pixel, makes the display performance of even number bar sub-pixel and odd number bar sub-pixel close.
The third embodiment of the present invention also is a liquid crystal indicator 2 shown in Figure 2, and wherein the thin portion connecting structure of power supply 20, a pulse-wave adjusting circuit 21 and a grid drive chip 22 is shown in Fig. 4 A.In this embodiment, power supply 20 provides a positive accurate position voltage signal V2, the first negative accurate position voltage signal V3 and one second negative accurate three kinds of direct current quasi-position signals of voltage signal V4, V2=18 volt wherein, V3=-6 volt, V4=-10 volt.
Pulse-wave adjusting circuit 21 comprises a signal generator 411 and a selector switch 413 equally.Signal generator 411 produces one group of control signal S
C1And S
C2This group control signal of selector switch 413 responses is to determine these power supply signals 402 are sent to the time of grid drive chip 22.Wherein, control signal S
C1In order to determine the accurate position of positive voltage signal V2 to be sent to the time of grid drive chip 22, control signal S
C2In order to the time that determines that negative voltage accurate position signal V3 in those power supply signals 402 and V4 are sent to grid drive chip 22.
Be sent to grid drive chip 22 via the power supply signal 402 after selector switch 413 selections, to form an input pulse wave signal 420, the positive accurate position voltage of input pulse wave signal 420 is positive accurate position voltage signal V2, and the negative accurate position voltage of input pulse wave signal 420 is selected from the first negative accurate position voltage signal V3 and one second negative accurate position voltage signal V4.The input pulse wave signal 420 of importing each sweep trace all has one first pulse, one second pulse and one the 3rd pulse, and the amplitude of the 3rd pulse is greater than the amplitude of first pulse and second pulse.Input pulse wave signal 420 is sent to the sweep trace of active matrix driving circuit again via grid drive chip 22.
Fig. 4 B is the sequential chart of the input pulse wave signal 420 of input scan line Gn and sweep trace Gn+1, as seen from the figure, the voltage quasi position of the first negative accurate position voltage signal V3 is higher than the voltage quasi position of the second negative accurate position voltage signal V4, so when producing first pulse and second pulse, control signal S
C2Control selector switch 413 transmits the first negative accurate position voltage signal V3 to grid drive chip 22; When producing the 3rd pulse, control signal S
C2Control selector switch 413 transmits the second negative accurate position voltage signal V4 to grid drive chip 22, makes the amplitude of the amplitude of the 3rd pulse greater than first pulse and second pulse.So just can make (18-(10)=28) of the Δ V (18-(6)=24) of first pulse and second pulse less than the 3rd pulse.Because the 3rd pulse desires to charge into the data voltage of odd number bar sub-pixel in order to activation, and first pulse and second pulse desire to charge into the data voltage of even number bar sub-pixel in order to activation, so it is poor and then to reduce the feed-trough voltage of even number bar sub-pixel and odd number bar sub-pixel, makes the display performance of even number bar sub-pixel and odd number bar sub-pixel close.
The fourth embodiment of the present invention also is a liquid crystal indicator 2 shown in Figure 2, and wherein the thin portion connecting structure of power supply 20, a pulse-wave adjusting circuit 21 and a grid drive chip 22 is shown in Fig. 5 A.In this embodiment, power supply 20 provides one first positive accurate position voltage signal V1, one second positive accurate position voltage signal V2, the first negative accurate position voltage signal V3, one second negative accurate position voltage signal V4 and five kinds of direct current quasi-position signals of one the 3rd negative accurate position voltage signal V5, V1=25 volt wherein, the V2=18 volt, the V3=-6 volt, the V4=-10 volt, the V5=0 volt.
Pulse-wave adjusting circuit 21 comprises a signal generator 511 and a selector switch 513 equally.Signal generator 511 produces one group of control signal S
C1And S
C2This group control signal of selector switch 513 responses, to determine these power supply signals 502 are sent to the time of grid drive chip 22, wherein, control signal S
C1In order to determine positive voltage accurate position signal V1 and V2 to be sent to the time of grid drive chip 22, control signal S
C2In order to decision negative voltage accurate position signal V3, V4 and V5) be sent to time of grid drive chip 22.
Be sent to grid drive chip 22 via those power supply signals 502 after selector switch 513 selections, to form an input pulse wave signal 520, the positive accurate position voltage of input pulse wave signal 520 is selected from the first positive accurate position voltage signal V1 and the second positive accurate position voltage signal V2, and the negative accurate position voltage of input pulse wave signal 520 is selected from the first negative accurate position voltage signal V3, one second negative accurate position voltage signal V4 and the 3rd negative accurate position voltage signal V5.The input pulse wave signal 520 of importing each sweep trace all has one first pulse, one second pulse and one the 3rd pulse, and the amplitude of the 3rd pulse is greater than the amplitude of first pulse and second pulse.Input pulse wave signal 520 is sent to the sweep trace of active matrix driving circuit again via grid drive chip 22.
Fig. 5 B is the sequential chart of the input pulse wave signal 520 of input scan line Gn and sweep trace Gn+1, as seen from the figure, the voltage quasi position of the first positive standard position voltage signal V1 is higher than the voltage quasi position of the second positive accurate position voltage signal V2, so when producing first pulse and second pulse, control signal S
C1Control selector switch 513 transmits the second positive accurate position voltage signal V2 to grid drive chip 22; When producing the 3rd pulse, control signal S
C1Control selector switch 513 transmits the first positive accurate position voltage signal V1 to grid drive chip 22.The voltage quasi position of the second negative accurate position voltage signal V4 is lower than the voltage quasi position of the 3rd negative accurate position voltage signal V5, so when producing first pulse and second pulse, control signal S
C2Control selector switch 513 transmits the 3rd negative accurate position voltage signal V5 to grid drive chip 22; When producing the 3rd pulse, control signal S
C2Control selector switch 513 transmits the second negative accurate position voltage signal V4 to grid drive chip 22.Make the amplitude of the amplitude of the 3rd pulse by this, so just can allow the Δ V (18-0=18) of first pulse and second pulse less than the Δ V (25-(10)=35) of the 3rd pulse greater than first pulse and second pulse.Because the 3rd pulse desires to charge into the data voltage of odd number bar sub-pixel in order to activation, and first pulse and second pulse desire to charge into the data voltage of even number bar sub-pixel in order to activation, so it is poor and then to reduce the feed-trough voltage of even number bar sub-pixel and odd number bar sub-pixel, makes the display performance of even number bar sub-pixel and odd number bar sub-pixel close.
The present invention can offer the pulse wave adjustment in advance of grid drive chip at power supply, so it is poor to reduce the feed-trough voltage of even number bar sub-pixel and odd number bar sub-pixel, and then improves liquid crystal indicator picture display quality.
The above embodiments are only in order to exemplifying embodiments of the present invention, and explain technical characterictic of the present invention, are not to be used for limiting the scope of the invention.Any those of ordinary skill in the art can unlabored change or the equivalent scope that all belongs to the present invention and advocated, and interest field of the present invention should be as the criterion with claims.
Claims (9)
1. a pulse-wave adjusting circuit is connected between a power supply and a grid drive chip, and this power supply provides a power supply signal, it is characterized in that, this pulse-wave adjusting circuit comprises:
One first switch responds one first control signal, this power supply signal is sent to the time of this grid drive chip with decision; And
One discharge assembly responds one second control signal, has been sent to the time of this power supply signal of this grid drive chip with the decision discharge;
Wherein, this first switch and this discharge assembly alternate conduction.
2. pulse-wave adjusting circuit according to claim 1 is characterized in that, this power supply signal becomes a top rake signal.
3. pulse-wave adjusting circuit according to claim 1 is characterized in that, this discharge assembly comprises the resistance second switch of connecting, and this second control signal is in order to control this second switch.
4. pulse-wave adjusting circuit according to claim 1 is characterized in that, this first control signal and this second control signal are complementary signal.
5. a pulse-wave adjusting circuit is connected between a power supply and a grid drive chip, and this power supply provides a plurality of power supply signals, and those power supply signals have different voltage quasi positions, it is characterized in that, this pulse-wave adjusting circuit comprises:
One signal generator produces one group of control signal; And
One selector switch responds this group control signal, this power supply signal is sent to the time of this grid drive chip with decision;
Wherein, this power supply signal that has been sent to this grid drive chip determines the amplitude size of an input pulse wave signal, this input pulse wave signal has first pulse, second pulse and the 3rd pulse, this first pulse and the 3rd pulse at least one of them amplitude greater than the amplitude of this second pulse.
6. pulse-wave adjusting circuit according to claim 5, it is characterized in that, this power supply signal comprises one first negative power signal and one second negative power signal, the voltage quasi position of this first negative power signal is lower than the voltage quasi position of this second negative power signal, when producing this first pulse, this group control signal is controlled this selector switch and is transmitted this first negative power signal to this grid drive chip, when producing this second pulse, this group control signal is controlled this selector switch and is transmitted this second negative power signal to this grid drive chip, makes the amplitude of the amplitude of this first pulse greater than this second pulse.
7. pulse-wave adjusting circuit according to claim 5, it is characterized in that, this power supply signal comprises one first negative power signal and one second negative power signal, the voltage quasi position of this first negative power signal is higher than the voltage quasi position of this second negative power signal, when producing this second pulse, this group control signal is controlled this selector switch and is transmitted this first negative power signal to this grid drive chip, when producing the 3rd pulse, this group control signal is controlled this selector switch and is transmitted this second negative power signal to this grid drive chip, makes the amplitude of the amplitude of the 3rd pulse greater than this second pulse.
8. pulse-wave adjusting circuit according to claim 5, it is characterized in that, those power supply signals comprise one first positive power signal and one second positive power signal, the voltage quasi position of this first positive power signal is lower than the voltage quasi position of this second positive power signal, when producing this second pulse, this group control signal is controlled this selector switch and is transmitted this first positive power signal to this grid drive chip, when producing the 3rd pulse, this group control signal is controlled this selector switch and is transmitted this second positive power signal to this grid drive chip, makes the amplitude of the amplitude of the 3rd pulse greater than this second pulse.
9. a liquid crystal indicator is characterized in that, comprises according to each described pulse-wave adjusting circuit of claim 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007100794951A CN100460939C (en) | 2007-04-11 | 2007-04-11 | Crystal-liquid display device and its pulse-wave adjusting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007100794951A CN100460939C (en) | 2007-04-11 | 2007-04-11 | Crystal-liquid display device and its pulse-wave adjusting circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101029984A true CN101029984A (en) | 2007-09-05 |
| CN100460939C CN100460939C (en) | 2009-02-11 |
Family
ID=38715426
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2007100794951A Active CN100460939C (en) | 2007-04-11 | 2007-04-11 | Crystal-liquid display device and its pulse-wave adjusting circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100460939C (en) |
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101369409B (en) * | 2008-10-15 | 2010-06-02 | 上海广电光电子有限公司 | Method for driving liquid crystal display panel |
| CN102280094A (en) * | 2011-08-16 | 2011-12-14 | 深圳市华星光电技术有限公司 | Liquid crystal panel driving circuit and liquid crystal display device using same |
| CN102314846A (en) * | 2011-09-06 | 2012-01-11 | 深圳市华星光电技术有限公司 | Corner-cutting circuit in LCD (Liquid Crystal Display) driving system |
| CN101699550B (en) * | 2009-07-20 | 2012-05-23 | 友达光电股份有限公司 | Grid pulse modulation circuit and liquid crystal display device thereof |
| CN101739974B (en) * | 2008-11-14 | 2012-07-04 | 群康科技(深圳)有限公司 | Pulse regulating circuit and driving circuit using same |
| CN102034440B (en) * | 2009-09-24 | 2012-12-19 | 瑞鼎科技股份有限公司 | Gate driver and operating method thereof |
| US20130044085A1 (en) * | 2011-08-16 | 2013-02-21 | Poshen Lin | Liquid crystal panel driving circuit and liquid crystal display Device Using the Same |
| CN102945654A (en) * | 2012-10-11 | 2013-02-27 | 友达光电股份有限公司 | Organic light emitting display, driving circuit thereof and method of driving the same |
| WO2013033926A1 (en) * | 2011-09-06 | 2013-03-14 | 深圳市华星光电技术有限公司 | Cutaway circuit in lcd driver system and lcd driver system |
| CN101593496B (en) * | 2009-06-26 | 2013-08-14 | 友达光电股份有限公司 | Grid output control method |
| TWI415098B (en) * | 2009-09-10 | 2013-11-11 | Raydium Semiconductor Corp | Gate driver and operating method thereof |
| TWI417859B (en) * | 2009-11-05 | 2013-12-01 | Raydium Semiconductor Corp | Gate driver and operating method thereof |
| CN101533611B (en) * | 2008-03-10 | 2014-03-12 | 群创光电股份有限公司 | Liquid crystal display panel, liquid crystal display device and control method thereof |
| CN104123922A (en) * | 2014-07-21 | 2014-10-29 | 昆山龙腾光电有限公司 | Grid driving circuit and driving system and display device utilizing grid driving circuit |
| CN105070243A (en) * | 2015-09-15 | 2015-11-18 | 重庆京东方光电科技有限公司 | Grid turn-on voltage compensation circuit, display panel, driving method and display device |
| CN106940980A (en) * | 2017-05-23 | 2017-07-11 | 京东方科技集团股份有限公司 | A kind of square wave top rake circuit, its driving method and display panel |
| CN109192170A (en) * | 2018-10-23 | 2019-01-11 | 惠科股份有限公司 | The feedthrough compensation method of display panel and device, display device |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2739821B2 (en) * | 1994-03-30 | 1998-04-15 | 日本電気株式会社 | Liquid crystal display |
| JPH1078592A (en) * | 1996-09-03 | 1998-03-24 | Semiconductor Energy Lab Co Ltd | Active matrix display device |
| KR100218375B1 (en) * | 1997-05-31 | 1999-09-01 | 구본준 | Low power gate driver circuit of tft-lcd using charge reuse |
| KR100430095B1 (en) * | 1998-09-15 | 2004-07-27 | 엘지.필립스 엘시디 주식회사 | Apparatus For Eliminating Afterimage in Liquid Crystal Display and Method Thereof |
| JP2000221474A (en) * | 1999-01-29 | 2000-08-11 | Matsushita Electric Ind Co Ltd | Method for driving liquid crystal display device |
| KR100857378B1 (en) * | 2002-12-31 | 2008-09-05 | 비오이 하이디스 테크놀로지 주식회사 | Method for driving gate pulse |
| CN1755783A (en) * | 2004-09-27 | 2006-04-05 | 中华映管股份有限公司 | Electric charge neutralization control circuit for liquid crystal display device and control method thereof |
-
2007
- 2007-04-11 CN CNB2007100794951A patent/CN100460939C/en active Active
Cited By (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101533611B (en) * | 2008-03-10 | 2014-03-12 | 群创光电股份有限公司 | Liquid crystal display panel, liquid crystal display device and control method thereof |
| CN101369409B (en) * | 2008-10-15 | 2010-06-02 | 上海广电光电子有限公司 | Method for driving liquid crystal display panel |
| CN101739974B (en) * | 2008-11-14 | 2012-07-04 | 群康科技(深圳)有限公司 | Pulse regulating circuit and driving circuit using same |
| CN101593496B (en) * | 2009-06-26 | 2013-08-14 | 友达光电股份有限公司 | Grid output control method |
| CN101699550B (en) * | 2009-07-20 | 2012-05-23 | 友达光电股份有限公司 | Grid pulse modulation circuit and liquid crystal display device thereof |
| TWI415098B (en) * | 2009-09-10 | 2013-11-11 | Raydium Semiconductor Corp | Gate driver and operating method thereof |
| CN102034440B (en) * | 2009-09-24 | 2012-12-19 | 瑞鼎科技股份有限公司 | Gate driver and operating method thereof |
| TWI417859B (en) * | 2009-11-05 | 2013-12-01 | Raydium Semiconductor Corp | Gate driver and operating method thereof |
| WO2013023392A1 (en) * | 2011-08-16 | 2013-02-21 | 深圳市华星光电技术有限公司 | A liquid crystal panel drive circuit and a liquid crystal display device using the said circuit |
| CN102280094A (en) * | 2011-08-16 | 2011-12-14 | 深圳市华星光电技术有限公司 | Liquid crystal panel driving circuit and liquid crystal display device using same |
| US20130044085A1 (en) * | 2011-08-16 | 2013-02-21 | Poshen Lin | Liquid crystal panel driving circuit and liquid crystal display Device Using the Same |
| WO2013033926A1 (en) * | 2011-09-06 | 2013-03-14 | 深圳市华星光电技术有限公司 | Cutaway circuit in lcd driver system and lcd driver system |
| WO2013033929A1 (en) * | 2011-09-06 | 2013-03-14 | 深圳市华星光电技术有限公司 | Shaping circuit in lcd driver system and lcd driver system |
| CN102314846A (en) * | 2011-09-06 | 2012-01-11 | 深圳市华星光电技术有限公司 | Corner-cutting circuit in LCD (Liquid Crystal Display) driving system |
| CN102945654B (en) * | 2012-10-11 | 2016-05-11 | 友达光电股份有限公司 | Organic light emitting display, driving circuit thereof and method of driving the same |
| CN102945654A (en) * | 2012-10-11 | 2013-02-27 | 友达光电股份有限公司 | Organic light emitting display, driving circuit thereof and method of driving the same |
| CN104123922A (en) * | 2014-07-21 | 2014-10-29 | 昆山龙腾光电有限公司 | Grid driving circuit and driving system and display device utilizing grid driving circuit |
| CN104123922B (en) * | 2014-07-21 | 2016-06-08 | 昆山龙腾光电有限公司 | Gate driver circuit, the drive system using it and display device |
| CN105070243A (en) * | 2015-09-15 | 2015-11-18 | 重庆京东方光电科技有限公司 | Grid turn-on voltage compensation circuit, display panel, driving method and display device |
| CN105070243B (en) * | 2015-09-15 | 2017-10-31 | 重庆京东方光电科技有限公司 | Gate turn-on voltage compensation circuit, display panel, driving method and display device |
| US10121403B2 (en) | 2015-09-15 | 2018-11-06 | Boe Technology Group Co., Ltd. | Gate turn on voltage compensating circuit, display panel, driving method and display apparatus |
| CN106940980A (en) * | 2017-05-23 | 2017-07-11 | 京东方科技集团股份有限公司 | A kind of square wave top rake circuit, its driving method and display panel |
| CN106940980B (en) * | 2017-05-23 | 2019-01-25 | 京东方科技集团股份有限公司 | A kind of square wave top rake circuit, its driving method and display panel |
| CN109192170A (en) * | 2018-10-23 | 2019-01-11 | 惠科股份有限公司 | The feedthrough compensation method of display panel and device, display device |
| CN109192170B (en) * | 2018-10-23 | 2021-07-06 | 惠科股份有限公司 | Feed-through compensation method and device of display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100460939C (en) | 2009-02-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101029984A (en) | Crystal-liquid display device and its pulse-wave adjusting circuit | |
| CN1268978C (en) | Liquid crystal display device | |
| CN1287198C (en) | Photoelectrical apparatus, driving method of photoelectric apparatus and electronic equipment | |
| TWI336461B (en) | Liquid crystal display and pulse adjustment circuit thereof | |
| CN1825414A (en) | LCD and its driving method | |
| CN1181464C (en) | Liquid crystal display device and drive control thereof | |
| CN1547730A (en) | Liquid crystal display device, method thereof, and mobile terminal | |
| CN1804988A (en) | Liquid crystal driving device, liquid crystal display device, and liquid crystal driving method | |
| CN1629925A (en) | Gate driving apparatus and method for liquid crystal display | |
| CN1904992A (en) | Display device, method of driving the same and driving device for driving the same | |
| CN1603902A (en) | Modifying gray voltage signals in a display device | |
| CN101075417A (en) | Displaying apparatus using data line driving circuit and data line driving method | |
| CN1530723A (en) | Displaying device and driving method thereof | |
| CN103268759B (en) | Data processing equipment, liquid crystal indicator, television receiver and data processing method | |
| CN1749835A (en) | Lcd | |
| CN1804984A (en) | Liquid crystal display device and data signal driving apparatus | |
| CN1881474A (en) | Shift register and a display device including the shift register | |
| CN1519805A (en) | Displaying driver, displaying device and displaying drive method | |
| CN1532601A (en) | Liquid crystal display device and its driving method | |
| CN1315720A (en) | Liquid crystal display portable telephone and portable information terminal equipment | |
| CN1841488A (en) | Method of driving liquid crystal display device, liquid crystal display device,and electronic apparatus | |
| CN1645465A (en) | Grid driving method and circuit of liquid crystal displaying device | |
| CN1924651A (en) | Driving method for display apparatus | |
| CN1705006A (en) | Liquid crystal display device and driving method thereof | |
| CN1928980A (en) | Display driver |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |