CN102945654B - Organic light emitting display, driving circuit thereof and method of driving the same - Google Patents

Abstract

The present invention provides a method for driving a driving circuit of an organic light-emitting display. Each pixel of the driving circuit includes three transistors, a capacitor and an organic light-emitting diode. First, a reference voltage is provided to charge the first end of the capacitor, and a reset voltage is provided to discharge the second end of the capacitor. Then, the discharge of the second end of the capacitor is stopped, and a driving voltage signal is provided to one end of one of the transistors using a control element to charge the second end of the capacitor. Subsequently, the first end of the capacitor is charged using a data voltage, and the provision of the driving voltage signal is stopped. Next, the first end of the capacitor is floated, and the organic light-emitting diode is driven.

Description

Organic light-emitting display, its driving circuit and its driving method

【Technical field】

The present invention relates to an organic light emitting display, its driving circuit and its driving method, especially to an organic light emitting display with three transistors in each pixel, its driving circuit and its driving method.

【Background technique】

In recent years, organic light-emitting diode (OLED) display has gradually become a popular emerging flat-panel display. Due to its self-illumination, wide viewing angle, fast response time, high luminous efficiency, low operating voltage, and thin panel thickness, it can be made into Due to the advantages of flexible panel and simple manufacturing process, it has been widely used in various flat display products.

A pixel of a conventional organic light emitting display uses a switch transistor and a driving transistor to control and drive an organic light emitting diode as a display unit. However, the threshold voltage of the driving transistor will shift after being used for a long time. Moreover, when the organic light-emitting display displays images, the positions and operation times of the driving transistors are different, so that the offset of the threshold voltage of each driving transistor will also be different. Furthermore, the driving current of the organic light emitting diode is proportional to the square of the voltage difference between the gate and the source of the driving transistor and the threshold voltage. In this way, when pixels in different regions receive pixel data with the same voltage, due to differences in the threshold voltages of the driving transistors, the value of the driving current supplied to the organic light emitting diodes in these pixels is inconsistent, resulting in organic light emitting diodes. When the diodes receive voltages of the same pixel data, the luminances produced are different, thus making the picture displayed by the organic light-emitting display uneven.

Therefore, it has been developed to add a compensation circuit to each pixel to use four transistors and two capacitors to drive the OLED and compensate the error of the threshold voltage. However, as the size of the organic light-emitting display panel shrinks, the aperture ratio of the pixels will decrease, and the increase of the compensation circuit will greatly limit the aperture ratio of each pixel. In view of this, increasing the aperture ratio of the pixel of the organic light emitting display and maintaining the uniformity of the displayed image is the goal of the industry.

【Content of invention】

One of the main objectives of the present invention is to provide an organic light emitting display, a driving circuit thereof and a method for driving the driving circuit thereof, so as to increase the aperture ratio of pixels of the organic light emitting display.

To achieve the above objectives, the present invention provides a method for driving a driving circuit of an organic light emitting display. The drive circuit includes a plurality of pixels and a control element, and each pixel includes a first transistor, a second transistor, a third transistor, a capacitor and an organic light emitting diode, wherein the control element is electrically connected to the second transistor first end. Firstly, a reference voltage is respectively provided to charge the first terminals of the capacitors electrically connected to the control terminals of the second transistors, and a reset voltage is provided to the second terminals electrically connected to the second transistors and the organic light emitting diodes. The anode discharges the second terminal of each capacitor. Then, stop the discharge of the second terminals of each capacitor, and use the control element to provide a driving voltage signal to the first terminal of each second transistor, so as to electrically connect the second terminals of each capacitor to the second terminal of each second transistor. Charge. Subsequently, a data voltage is used to charge the first end of each capacitor respectively, and the supply of the driving voltage signal is stopped. Next, the first end of each capacitor is floated, and the organic light emitting diode is driven.

To achieve the above purpose, the present invention provides an organic light emitting display, which includes a substrate, multiple data lines, multiple reset voltage lines, multiple scan lines, multiple drive voltage lines, multiple reset signal lines and multiple pixels. The data lines are sequentially arranged on the substrate along a first direction, and each data line is used to transmit a reference voltage or a data voltage. The reset voltage lines are sequentially arranged on the substrate along the first direction, and each reset voltage line is used to transmit a reset voltage. The scan lines are arranged on the substrate along a second direction different from the first direction for transmitting a scan signal. The driving voltage lines are arranged on the substrate along the second direction for transmitting a driving voltage signal. The reset signal line is arranged on the substrate along the second direction for transmitting a reset signal. The pixels are arranged in an array on the substrate, and each data line, each reset voltage line, each scan line and each driving voltage line surrounds each pixel. Each pixel includes a first transistor, a second transistor, a third transistor, a capacitor and an organic light emitting diode. The first transistor is disposed on the substrate, and has a first end electrically connected to the corresponding data line, a second end, and a control end electrically connected to the corresponding scan line. The second transistor is disposed on the substrate, and has a first end electrically connected to the corresponding driving voltage line, a second end, and a control end electrically connected to the second end of the first transistor. The third transistor is disposed on the substrate, and has a first end electrically connected to the corresponding reset voltage line, a second end electrically connected to the second end of the second transistor, and a control end electrically connected to the second transistor. Correspondingly reset the signal line. The capacitor is disposed on the substrate, and has a first end electrically connected to the second end of the first transistor and a second end electrically connected to the second end of the third transistor. The OLED is disposed on the substrate, and has an anode electrically connected to the second end of the second transistor and a cathode electrically connected to a low-voltage power supply.

To achieve the above objectives, the present invention provides a driving circuit for an organic light emitting display, which includes a plurality of pixels and a control element. Each pixel includes a first transistor, a second transistor, a third transistor, a capacitor and an organic light emitting diode. The first transistor has a first terminal for receiving a data voltage or a reference voltage, a second terminal, and a control terminal for receiving a scan signal. The second transistor has a first terminal for receiving a driving voltage signal, a second terminal, and a control terminal electrically connected to the second terminal of the first transistor. The third transistor has a first terminal for receiving a reset voltage, a second terminal electrically connected to the second terminal of the second transistor, and a control terminal for receiving a reset signal. The capacitor has a first end electrically connected to the second end of the first transistor, and a second end electrically connected to the second end of the third transistor and the second end of the second transistor. The OLED has an anode electrically connected to the second end of the second transistor and a cathode electrically connected to a low voltage power supply. The control element is electrically connected to the first end of the second transistor for providing a driving voltage signal.

Each pixel of the organic light emitting display of the present invention can drive the organic light emitting diode 130 by only using three transistors and one capacitor, and compensate the shift of the threshold voltage generated by the second transistor, thereby effectively reducing the number of transistors, and The area occupied by the transistor can be reduced, so the aperture ratio of each pixel can be effectively improved.

【Description of drawings】

FIG. 1 is a schematic top view of an organic light emitting display according to a first embodiment of the present invention.

FIG. 2 is an enlarged schematic view of area A in FIG. 1 .

FIG. 3 is a schematic top view of each pixel region of the organic light emitting display according to the first embodiment of the present invention.

FIG. 4 is a schematic diagram of a driving circuit of pixels located in the same column of the organic light emitting display according to the first embodiment of the present invention.

FIG. 5 is a flowchart of a driving method of a driving circuit of an organic light emitting display according to a first embodiment of the present invention.

FIG. 6 is a schematic diagram of the operation timing of the data signal, scan signal, driving voltage signal and reset signal of the present invention.

FIG. 7 is a schematic top view of an organic light emitting display according to a second embodiment of the present invention.

[Description of main component symbols]

100 organic light emitting display 102 substrate

102a display area 102b peripheral area

102c pixel area 102d fan-out area

104 data line 106 reset voltage line

108 scan lines 110 reset signal lines

112 driving voltage lines 114 pixels

116a first control element 116b second control element

118 First Direction 120 Second Direction

122 first transistor 122a first gate

122b first source 122c first drain

122d first semiconductor layer 124 second transistor

124a second gate 124b second source

124c second drain 124d second semiconductor layer

126 The third gate of the third transistor 126a

126b third source 126c third drain

126d third semiconductor layer 128 capacitance

130 organic light emitting diode 130a anode

130b cathode 130c light emitting layer

132 low voltage power supply 134 first perforation

136 second perforation 200 organic light emitting display

202 scan lines 202a odd scan lines

202b even scan lines 204 reset signal lines

204a odd number reset signal line 204b even number reset signal line

206 driving voltage lines 206a odd-numbered driving voltage lines

206b The first end of the even-numbered driving voltage line C1

C2 second end D1 second end

D2 second end D3 second end

EM driving voltage signal G1 control terminal

G2 control terminal G3 control terminal

S1 first end S2 first end

S3 first end Sscan scanning signal

Sdata data signal Sreset reset signal

Vsus reset voltage

【detailed description】

Please refer to FIG. 1 . FIG. 1 is a schematic top view of an organic light emitting display according to a first embodiment of the present invention, and FIG. 2 is an enlarged schematic view of area A in FIG. 1 . As shown in FIG. 1 , an organic light emitting display 100 includes a substrate 102 , such as a transparent substrate such as glass, plastic or quartz, and the substrate 102 has a display area 102 a and a peripheral area 102 b surrounding the display area 102 a. The display area 102a is used for displaying images, and the substrate 102 of the display area 102a has a plurality of pixel areas 102c arranged in an array, but is not limited thereto. Moreover, the peripheral area 102b is used for setting peripheral circuits and control elements, and the substrate 102 of the peripheral area 102b has a plurality of fanout regions 102d for setting lines extending from the display area 102a to the peripheral area 102b. In addition, the organic light emitting display 100 further includes a plurality of data lines 104, a plurality of reset voltage lines 106, a plurality of scan lines 108, a plurality of reset signal lines 110, a plurality of driving voltage lines 112, a plurality of pixels 114, a plurality of A first control element 116a and a plurality of second control elements 116b. Wherein, each first control element 116a is disposed on the substrate 102 of the peripheral area 102b, and is electrically connected to the corresponding data line 104 and the reset voltage line 106, and each first control element 116a can be a data driving chip respectively. , for example: a driving chip integrated with a data driving circuit and a reset voltage driving circuit, for respectively providing a data signal, such as a reference voltage or a data voltage, to each data line 104, and respectively providing a reset voltage to Each resets the voltage line 106, but is not limited thereto. Each second control element 116b is disposed on the substrate 102 of the peripheral area 102b, and is electrically connected to the corresponding scanning line 108, driving voltage line 112 and reset signal line 110, and each second control element 116b can be one A driving chip, such as a gate driving chip integrating a scanning driving circuit, a driving voltage circuit and a reset signal driving circuit, is used to respectively provide a scanning signal to each scanning line 108 and a driving voltage signal to each driving voltage line 112 and provide a reset signal to each reset signal line 110 respectively, but the present invention is not limited thereto. Moreover, each data line is used to transmit data signals to each pixel 114 . Each reset voltage line 106 is used to transmit a reset voltage to each pixel 114 . Each scan line 108 is used to transmit a scan signal to each pixel 114 . Each driving voltage line is used to transmit a driving voltage signal to each pixel 114 . Each reset signal line 110 transmits a reset signal to each pixel 114 . The first control element and the second control element of the present invention are not limited to the above-mentioned driving chips, but may also be other control chips. In other embodiments of the present invention, the driving voltage signals of the driving voltage lines may also be provided by other driving chips different from the gate driving chips.

In this embodiment, each data line 104 and each reset voltage line 106 are alternately arranged on the substrate 102 along a first direction 118 in sequence, and extend from the display area 102a to the fan-out area 102d on the substrate 102, so as to It is electrically connected with the first control element 116a. Each scanning line 108, each driving voltage line 112 and each reset signal line 110 are alternately arranged on the substrate 102 along a second direction 120 different from the first direction 118, and each data line 104 and each reset signal line are alternately arranged on the substrate 102. The voltage lines 106 cross each other and extend from the display area 102a to the fan-out area 102d on the substrate 102 to be electrically connected to the second control element 116b. Moreover, each pixel 114 is respectively disposed on the substrate 102 in each pixel region 102 c and surrounded by each data line 104 , each reset voltage line 106 , each scan line 108 and each driving voltage line 112 .

As shown in FIG. 2 , each second control element 116b has a plurality of pads 116c, respectively corresponding to each scanning line 108, each driving voltage line 112 and each reset signal line 110 extending below the second control element 116b, and each The pads 116c are electrically connected to the scan lines 108 , the driving voltage lines 112 and the reset signal lines 110 respectively by soldering.

The pixel of this embodiment will be further described below. Please refer to FIG. 3 and FIG. 4. FIG. 3 is a schematic top view of each pixel region of the organic light emitting display according to the first embodiment of the present invention, and FIG. Schematic diagram of the drive circuit. As shown in FIGS. 3 and 4 , each pixel 114 includes a first transistor 122 , a second transistor 124 , a third transistor 126 , a capacitor 128 and an organic light emitting diode 130 . The first transistor 122 has a first gate 122a as a control terminal G1, a first source 122b as a first terminal S1, a first drain 122c as a second terminal D1, and a first semiconductor layer 122d. The second transistor 124 has a second gate 124a as a control terminal G2, a second source 124b as a first terminal S2, a second drain 124c as a second terminal D2, and a second semiconductor layer 124d. The third transistor 126 has a third gate 126a as a control terminal G3, a third source 126b as a first terminal S3, a third drain 126c as a second terminal D3, and a third semiconductor layer 126d. Moreover, the capacitor 128 has two electrodes, respectively serving as a first terminal C1 and a second terminal C2. Moreover, the organic light emitting diode 130 has an anode 130a, a cathode 130b and a light emitting layer 130c.

In each first transistor 122, the control terminal G1 is electrically connected to the corresponding scanning line 108 for receiving the scanning signal, and the first terminal S1 is electrically connected to the corresponding data line 104 for receiving the data signal , and the second terminal D1 is electrically connected to the control terminal G2 of the second transistor 124 and the first terminal C1 of the capacitor 128 . In each second transistor 124, the first terminal S2 is electrically connected to the corresponding driving voltage line 112 for receiving the driving voltage signal, and the second terminal D2 is connected to the anode 130a of each organic light emitting diode 130 and the capacitor 128. The second terminal C2 is electrically connected to the second terminal D3 of the third transistor 126 . In the third transistor 126 , the control terminal G3 is electrically connected to the reset signal line 110 for receiving the reset signal, and the first terminal S3 is electrically connected to the reset voltage line 106 for receiving the reset voltage. Moreover, the cathode 130b of the organic light emitting diode 130 is electrically connected to a low voltage power supply 132 for providing a low voltage, and the organic light emitting diode 130 has a parasitic capacitor 130d, which is electrically connected to the anode 130a and the cathode of the organic light emitting diode 130 Between 130b.

In this embodiment, the scan line 108, the first gate 122a, the second gate 124a, the reset signal line 110, the third gate 126a and the driving voltage line 112 are formed by a first metal layer, wherein, The scan line 108 is connected to the first gate 122a, and the reset signal line 110 is connected to the third gate 126a. Moreover, a part of the second gate 124 a serves as an electrode of the first end C1 of the capacitor 128 . In addition, the data line 104, the first source 122b, the first drain 122c, the second drain 124c, the third drain 126c, the second source 124b, the reset voltage line 106, and the third source 126b are connected by a The second metal layer is formed. Wherein, the data line 104 is connected to the first source electrode 122b. The second drain 124c is connected to the third drain 126c, and a part of the second drain 124c serves as an electrode of the second terminal C2 of the capacitor 128 . The reset voltage line 106 is connected to the third source 126b. Moreover, the first drain 122c is electrically connected to the second gate 124a through a first through hole 134 , and the second drain 124b is electrically connected to the driving voltage line 112 through a second through hole 136 . The first semiconductor layer 122d is disposed between the first gate 122a and the first source 122b and the first drain 122c. The second semiconductor layer 124d is disposed between the second gate 124a, the second source 124b and the second drain 124c. The third semiconductor layer 126d is disposed between the third gate 126a, the third source 126b and the third drain 126c. In addition, the anode 130a, the light emitting layer 130c and the cathode 130b of the OLED 130 are sequentially stacked on the second drain 124c. It is worth noting that the organic light emitting display 100 of this embodiment does not include a high-voltage power supply line, and each pixel uses only three transistors to achieve the functions of driving the organic light emitting diode 130 and compensating for the offset of the transistor threshold voltage, thereby maintaining The uniformity of the displayed picture.

The driving method of the driving circuit of the organic light emitting display of this embodiment will be further described in detail below, so as to achieve the effect of driving the organic light emitting diodes by using only three transistors. In addition, in order to clearly illustrate the driving method of the driving circuit of each column of pixels, the following description is made by taking the same column of pixels as an example, but the present invention is not limited thereto, and the driving circuits of different columns of pixels in the present invention can be driven in the same manner. Please refer to FIG. 5 and FIG. 6 , and refer to FIG. 4 together. FIG. 5 is a flowchart of a driving method of a driving circuit of an organic light emitting display according to the first embodiment of the present invention, and FIG. 6 is a schematic diagram of the operation timing of data signals, scanning signals, driving voltage signals and reset signals of the present invention. As shown in FIG. 4 to FIG. 6, the driving method of the driving circuit of the organic light-emitting display in this embodiment includes:

Step S10: providing the reference voltage Vref to charge the first terminal C1 of each capacitor 128 electrically connected to the control terminal G2 of each second transistor 124, and providing the reset voltage Vreset to charge the first terminal C1 of each capacitor 128 electrically connected to the control terminal G2 of each second transistor 124 The second terminal D2 is discharged with the second terminal C2 of each capacitor 128 of each anode 130a of each organic light emitting diode 130;

Step S12: stop the discharge of the second terminal C2 of each capacitor 128, and use the second control element 116b to provide a driving voltage signal EM to the first terminal S2 of each second transistor 124 to electrically connect to each second transistor 124 The second terminal C2 of each capacitor 128 of the second terminal D2 is charged;

Step S14: charging the first terminal C1 of each capacitor 128 with the data voltage Vdata respectively, and stopping providing the driving voltage signal EM; and

Step S16 : Float the first terminal C1 of each capacitor 128 and drive the OLED 130 . Moreover, the scanning signal Sscan, data signal Sdata, reset signal Sreset and driving voltage signal EM provided to the driving circuit of the organic light emitting display 100 mainly include a reset period TD1, a threshold voltage compensation period TD2, and a data writing period TD3. and a light-emitting period TD4, and the reset voltage Vsus is a DC voltage.

In step S10, the driving circuit of the organic light emitting display 100 is operated in the reset period TD1, and the scan signal Sscan and the data signal Sdata are complementary signals, that is, the scan signal Sscan and the data signal Sdata have the same frequency, but have 180 Degree of phase difference, so that when the scan signal is logic high level, the data signal is the reference voltage, and when the scan signal is logic low level, the data signal is the data voltage used to display the picture, and the data voltage is greater than the reference voltage Voltage. Therefore, in the reset period TD1, when the scan signal is at a logic high level, each first transistor 122 of the same row of pixels is turned on, and since the first terminal S1 of each first transistor 122 is electrically connected to each data line , so that the reference voltage Vref of each data signal Sdata provided to the first end S1 of each first transistor 122 will charge the second end D1 of each first transistor 122 through each first transistor 122, that is, charge the second end D1 of each capacitor 128 The first terminal C1 is charged. At the same time, in the reset period TD1, the reset signal Sreset is at a logic high level, and the driving voltage signal EM is at a logic low level, so each third transistor 126 of the same row of pixels is turned on, and since each third transistor The first terminal S3 of the 126 is electrically connected to each reset voltage line, so that each reset voltage Vsus provided to the first terminal S3 of each third transistor 126 will discharge the second terminal D3 of each third transistor 126, and also That is, the second terminal C2 of each capacitor 128 is discharged. It can be seen that, in the reset period TD1, each capacitor 128 uses the reference voltage Vref and the reset voltage Vsus to reset (reset) the voltages of the first terminal C1 and the second terminal C2. The data voltage Vdata driving the new picture can be correctly written. At this moment, the voltage of the first terminal C1 of each capacitor 128 is the reference voltage Vref, and the voltage of the second terminal C2 is the reset voltage Vsus. In addition, the cathodes of each OLED are electrically connected to the low voltage, and the reset voltage Vsus is smaller than the low voltage, so that the reset voltage Vsus can discharge the second terminal C2 of the capacitor 128 in the reset period TD1 . In this embodiment, the scan signal Sscan has a plurality of logic high level periods and a plurality of logic low level periods in the reset period TD1, and the data signal Sdata has a plurality of reference voltage periods and a plurality of logic low level periods in the reset period TD1. data voltage periods, but the present invention is not limited thereto. In other embodiments of the present invention, the scan signal may only have a single logic high level during the reset period, and the data signal may only have a single reference voltage period.

In step S12, the driving circuit of the organic light emitting display 100 is operated in the threshold voltage compensation period TD2. At this time, the scan signal Sscan and the data signal Sdata are the same as the reset period TD1, so the reference voltage Vref still charges the first terminal C1 of each capacitor 128, so that the voltage of the control terminal G2 of each second transistor 124 can be the reference voltage. Vref, and each second transistor 124 is turned on by the reference voltage Vref. At the same time, the reset signal Sreset is converted to a logic low level, so that the second terminals C2 of the capacitors 128 are in a floating state because the third transistors 126 are turned off, thereby stopping discharging the second terminals C2 of the capacitors 128 . However, the driving voltage signal EM is converted from a logic low level to a logic high level, and because each second transistor 124 is in an open state, the voltage of the second terminal C2 of each capacitor 128 is determined by the driving voltage signal EM, And the driving voltage signal EM charges the second terminal C2 of each capacitor 128 electrically connected to the second terminal D2 of each second transistor 124 . Since the critical voltage of the control terminal G2 and the second terminal D2 of each second transistor 124 is Vt, when the voltage of the second terminal D2 of each second transistor 124 is charged to Vref-Vt by the driving voltage signal EM, each second The transistor 124 is turned off, and the current I OLED driving the _OLED drops to zero. At this time, the voltage of the second terminal D2 of each second transistor 124 can be determined according to the following equation:

Vs=Vref-Vt;

in:

Vs is the voltage of the second terminal C2 of each second transistor 124;

Vref is the reference voltage; and

Vt is a threshold voltage (threshold voltage) of each second transistor 124 .

In step S14, the driving circuit of the organic light emitting display 100 operates in the data writing period TD3. At this time, the scan signal Sscan is not complementary to the data signal Sdata, and when the scan signal Sscan is at a logic high level, the data signal Sdata can be the data voltage Vdata, and each first transistor 122 can be in an open state, so that the voltage provided to each Each data voltage Vdata at the first terminal S1 of the first transistor 122 can charge the first terminal C1 of each capacitor 128 respectively. Accordingly, the voltages of the control terminals G2 of the second transistors 124 can be respectively the data voltages Vdata. Moreover, in the data writing period TD3 , the reset signal Sreset is still at a logic low level, and the driving voltage signal EM is converted to a logic low level, so as to stop providing the driving voltage signal to each second transistor 124 . It is worth mentioning that the data voltage Vdata controls the magnitude of the current I _OLED driving the OLED 130 through the control terminal G2 of the second transistor 122 , and the magnitude of the current I _OLED corresponds to the grayscale value of the OLED 130 . Therefore, when the data signal _Sdata is converted from the reference voltage Vref to the data voltage Vdata, and the second terminal C2 of the capacitor 128 is in a floating state, the voltage VS of the second terminal D2 of the second transistor 124 can be determined according to the following equation:

V _S =Vref-Vt+a(Vdara-Vref),

in:

Vdata is the data voltage;

C1 is the capacitance value of the capacitor 128; and

C2 is the equivalent capacitance of the OLED 130, that is, the capacitance of the parasitic capacitor 130c.

In step S16, the driving circuit of the organic light emitting display 100 operates in the light emitting period TD4. At this time, the scan signal Sscan is converted to a logic low level, so that each first transistor 124 is turned off, and the first terminal C1 of each capacitor 128 is floated. Therefore, the voltage of the first terminal C1 of each capacitor 128 is still the data voltage Vdata, so that the second transistor 124 is still turned on. At the same time, the driving voltage signal EM is converted to a logic high level, and since the first terminal S2 of each second transistor 124 is electrically connected to the driving voltage line, the first terminal S2 of each second transistor 124 is provided from the second control element 116b. The driving voltage signal EM of the terminal S2 drives each organic light emitting diode 130 through each second transistor 124 . At this time, the voltage V _G of the control terminal G2 of each second transistor 124 and the voltage V _S of the second terminal S2 of each second transistor 124 can be determined according to the following equation:

V _G =Vdata+Vt-Vref-a(Vdata-Vref)+OVSS+VOLED,

$\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; ;</span>$

V _s =OVSS+VOLED;

in:

V _G is the voltage of the control terminal G1 of each second transistor 124;

OVSS is the voltage of the cathode 130b of each organic light emitting diode 130, that is, the low voltage; and

VOLED is the voltage across each OLED 130 .

Since the voltage VG of the control terminal G2 of each second transistor 124 and the voltage VS of the second terminal S2 are known, the voltage difference VGS between the control terminal G2 and the second terminal S2 of each second transistor 124 can be determined according to the following equation:

V _GS =V _G -V _S

=Vdata+Vt-Vref-a(Vdata-Vref)+OVSS+VOLED

-OVSS-VOLED

=(1-a)(Vdata-Vref)+Vt

Therefore, the current IOLED driving the OLED can be determined according to the following equation:

I _OLED =k(V _GS -Vt) ² =k[(1-a)(Vdata-Vref)] ²

It can be known that the current IOLED passing through each organic light emitting diode and the threshold voltage Vt of the second transistor 124 have nothing to do with the low voltage OVSS.

It can be seen from the above that the organic light emitting display 100 of this embodiment can use the above driving method, and can drive the organic light emitting diode 130 with three transistors and a capacitor, and compensate the shift of the threshold voltage generated by the second transistor. Thereby, each pixel of the organic light emitting display 100 in this embodiment only needs to be equipped with three transistors and one capacitor, which can effectively reduce the number of transistors and the area occupied by the transistors, so that the aperture ratio of each pixel can be effectively increased. Moreover, the organic light emitting display 100 of this embodiment does not include a high-voltage power supply line, which can more effectively reduce the configuration lines, and thus also increase the aperture ratio of each pixel.

The organic light emitting display of the present invention is not limited to the above-mentioned embodiments. The following will continue to disclose other embodiments or variants of the present invention. However, in order to simplify the description and highlight the differences between the embodiments or variants, the same reference numerals are used to mark the same components, and the repetitive parts will not be repeated.

Please refer to FIG. 7 , which is a schematic top view of an organic light emitting display according to a second embodiment of the present invention. As shown in FIG. 7 , the arrangement order of the scan lines, the reset signal lines and the driving voltage lines of this embodiment is different from that of the first embodiment. In this embodiment, the scan lines 202 of the organic light emitting display 200 can be divided into odd scan lines 202a and even scan lines 202b, and the odd scan lines 202a and the even scan lines 202b are arranged alternately along the second direction 120 in sequence. The reset signal lines 204 can be divided into odd reset signal lines 204 a and even reset signal lines 204 b , and the odd reset signal lines 204 a and the even reset signal lines 204 b are arranged alternately along the second direction 120 in sequence. The driving voltage lines 206 can be divided into odd driving voltage lines 206 a and even driving voltage lines 206 b, and the odd driving voltage lines 206 a and the even driving voltage lines 206 b are arranged alternately along the second direction 120 in sequence. In addition, each odd scan line 202a, each odd reset signal line 204a, each odd drive voltage line 206a, each even drive voltage line 206b, each even reset signal line 204b, and each even scan line 202b are sequentially along the second direction 120 are arranged alternately. Thereby, the structures in the pixel regions 102 c of two adjacent columns are mirror-symmetrical with respect to the first direction 118 .

To sum up, each pixel of the organic light emitting display of the present invention can drive the organic light emitting diode 130 using only three transistors and one capacitor, and compensate the shift of the threshold voltage generated by the second transistor, thereby effectively The number of transistors is reduced, and the area occupied by the transistors can be reduced, so the aperture ratio of each pixel can be effectively increased. Moreover, the organic light-emitting display of the present invention does not include a high-voltage power supply line, which can more effectively reduce the layout of lines, so that the aperture ratio of each pixel can also be increased.

The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

Claims (15)

1. A method for driving a driving circuit of an organic light emitting display, the driving circuit includes a plurality of pixels and a control element, and each pixel includes a first transistor, a second transistor, a third transistor, a capacitor and An organic light emitting diode, wherein the control element is electrically connected to the first terminal of the second transistor, the method includes: Provide a reference voltage to charge the first end of each capacitor electrically connected to the control end of each second transistor, and provide a reset voltage to charge the second end electrically connected to each second transistor and each organic Discharging the second end of each capacitor of the anode of the light-emitting diode to correctly write a data voltage for driving a new frame; stop the discharge of the second end of each of the capacitors, and use the control element to provide a driving voltage signal to the first end of each of the second transistors, so as to electrically connect to the second ends of the second transistors of each of the capacitors Charging at the second end; respectively using the data voltage to charge the first ends of the respective capacitors, and stopping providing the driving voltage signal; and floating the first end of each of the capacitors, and driving the organic light emitting diode; Wherein, the driving voltage signal includes a reset period, a critical voltage compensation period, a data writing period and a light emitting period. During the reset period, the driving voltage signal is logic low level. The voltage signal is converted from a logic low level to a logic high level, the driving voltage signal is converted to a logic low level during the data writing period, and the driving voltage signal is converted from a logic low level to a logic high level during the light emitting period. 2. The method for driving a driving circuit of an organic light emitting display according to claim 1, wherein the step of providing each of the reference voltages to charge the first terminals of each of the capacitors includes: turning on the first transistor; and The reference voltages are respectively provided to the first terminals of the first transistors to charge the first terminals of the capacitors electrically connected to the second terminals of the first transistors. 3. The method for driving a driving circuit of an organic light emitting display according to claim 1, wherein the step of providing the reset voltage to discharge the second end of each capacitor comprises: turning on each of the third transistors; and The reset voltage is provided to the first terminal of each third transistor to discharge the second terminal of each capacitor electrically connected to the second terminal of each third transistor. 4 . The method for driving a driving circuit of an organic light emitting display according to claim 1 , wherein the step of stopping the discharge of the second terminals of each of the capacitors includes turning off each of the third transistors. 5. The method for driving a driving circuit of an organic light emitting display according to claim 1, wherein the step of charging the first end of each capacitor with each of the data voltages respectively comprises: turning on the first transistor; and The data voltages are respectively provided to the first terminals of the first transistors to charge the first terminals of the capacitors electrically connected to the second terminals of the first transistors. 6 . The method for driving a driving circuit of an organic light emitting display according to claim 1 , wherein the step of floating the first terminals of each of the capacitors includes turning off the first transistors. 7. The method for driving a driving circuit of an organic light-emitting display according to claim 1, wherein the step of driving the organic light-emitting diode includes using the control element to provide the driving voltage signal to the second transistor of each of the second transistors. One terminal is used to drive each of the organic light emitting diodes through each of the second transistors. 8. The method for driving a driving circuit of an organic light emitting display according to claim 1, wherein each of the data voltages is greater than each of the reference voltages. 9 . The method for driving a driving circuit of an organic light emitting display according to claim 1 , wherein the cathode of the organic light emitting diode is electrically connected to a low voltage, and the reset voltage is lower than the low voltage. 10. An organic light-emitting display, comprising: a substrate; A plurality of data lines are sequentially arranged on the substrate along a first direction, and each of the data lines is used to transmit a reference voltage or a data voltage, and the data voltage is used to correctly write and drive a new picture; A plurality of reset voltage lines are sequentially arranged on the substrate along the first direction, and each of the reset voltage lines is used to transmit a reset voltage; a plurality of scanning lines arranged on the substrate along a second direction different from the first direction for transmitting a scanning signal; a plurality of driving voltage lines arranged on the substrate along the second direction for transmitting a driving voltage signal; a plurality of reset signal lines arranged on the substrate along the second direction for transmitting a reset signal; and A plurality of pixels are arranged in an array on the substrate, and each of the data lines, each of the reset voltage lines, each of the scan lines and each of the driving voltage lines surrounds each pixel, and each of the pixels includes: a first transistor, disposed on the substrate, and having a first end electrically connected to the corresponding data line, a second end, and a control end electrically connected to the corresponding scan line; A second transistor is arranged on the substrate, and has a first end electrically connected to the corresponding driving voltage line, a second end, and a control end electrically connected to the second end of the first transistor ; A third transistor is arranged on the substrate, and has a first end electrically connected to the corresponding reset voltage line, a second end electrically connected to the second end of the second transistor, and a control The terminal is electrically connected to the corresponding reset signal line; A capacitor is disposed on the substrate and has a first terminal electrically connected to the second terminal of the first transistor and a second terminal electrically connected to the second terminal of the third transistor; and an organic light emitting diode, disposed on the substrate, and has an anode electrically connected to the second end of the second transistor and a cathode electrically connected to a low-voltage power supply; Wherein, the driving voltage signal includes a reset period, a critical voltage compensation period, a data writing period and a light emitting period. During the reset period, the driving voltage signal is logic low level. The voltage signal is converted from a logic low level to a logic high level, the driving voltage signal is converted to a logic low level during the data writing period, and the driving voltage signal is converted from a logic low level to a logic high level during the light emitting period. 11. The organic light emitting display according to claim 10, wherein the organic light emitting display does not include a high voltage power line. 12. The organic light emitting display according to claim 10, further comprising a plurality of driving chips electrically connected to the driving voltage lines, and the driving chips provide the driving voltage signal to the driving voltage Wire. 13. The organic light emitting display according to claim 10, further comprising a plurality of gate driving chips, the gate driving chips are electrically connected to the scanning lines for providing the scanning signals to the The scanning line, and the gate driver chip is electrically connected to the reset signal line for providing the reset signal to the reset signal line. 14. A driving circuit for an organic light-emitting display, comprising: A plurality of pixels, each of which contains: A first transistor has a first end for receiving a data voltage or a reference voltage, a second end, and a control end for receiving a scan signal, and the data voltage is used to correctly write and drive a new picture; A second transistor having a first terminal for receiving a driving voltage signal, a second terminal, and a control terminal electrically connected to the second terminal of the first transistor; a third transistor having a first terminal for receiving a reset voltage, a second terminal electrically connected to the second terminal of the second transistor, and a control terminal for receiving a reset signal; A capacitor having a first terminal electrically connected to the second terminal of the first transistor, and a second terminal electrically connected to the second terminal of the third transistor and the second terminal of the second transistor ;as well as an organic light emitting diode having an anode electrically connected to the second terminal of the second transistor and a cathode electrically connected to a low voltage power supply; and a control element electrically connected to the first terminal of the second transistor for providing the driving voltage signal; Wherein, the driving voltage signal includes a reset period, a critical voltage compensation period, a data writing period and a light emitting period. During the reset period, the driving voltage signal is logic low level. The voltage signal is converted from a logic low level to a logic high level, the driving voltage signal is converted to a logic low level during the data writing period, and the driving voltage signal is converted from a logic low level to a logic high level during the light emitting period. 15. The driving circuit of an organic light emitting display according to claim 14, wherein the control element is a gate driving chip.