CN101026125A - Wafer cutting method - Google Patents

Wafer cutting method Download PDF

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Publication number
CN101026125A
CN101026125A CN 200610004129 CN200610004129A CN101026125A CN 101026125 A CN101026125 A CN 101026125A CN 200610004129 CN200610004129 CN 200610004129 CN 200610004129 A CN200610004129 A CN 200610004129A CN 101026125 A CN101026125 A CN 101026125A
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China
Prior art keywords
back side
wafer
pattern
cutting road
described wafer
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CN 200610004129
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Chinese (zh)
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CN100477162C (en
Inventor
杨辰雄
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Touch Micro System Technology Inc
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Touch Micro System Technology Inc
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Publication of CN101026125A publication Critical patent/CN101026125A/en
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Publication of CN100477162C publication Critical patent/CN100477162C/en
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Abstract

This invention provides a wafer and forms a cutting channel pattern on the positive of the wafer and forms a cutting channel pattern on the back corresponding to the positive then to paste said wafer to an extensible film and split it to form multiple tube cores by spreading said film.

Description

The method of cut crystal
Technical field
The present invention relates to a kind of method of cut crystal, refer to a kind of method that increases productive rate and can avoid the impaired cut crystal of the structure sheaf of front wafer surface especially.
Background technology
Microcomputer electric component, for example pressure responsive element (pressure sensor) or mini microphone element (microphone), owing to relatively have more complicated mechanical project organization with the conventional semiconductors element, therefore for example outstanding membrane structure often must utilize double-side technology to be made.Yet the double-side technology step is numerous and diverse, therefore often faces many difficulties when making.For instance, with semiconductor element relatively, the outstanding membrane structure of microcomputer electric component is because fragile structure, therefore is easy to generate problem such as break carrying out cutting technique.In addition, the Facad structure of wafer is also impaired easily when carrying out back process.
Generally speaking, the cutting technique of microcomputer electric component is after positive technology and back process are all finished, and utilizes cutting tool that wafer is cut off and is a plurality of tube cores, can produce following point yet utilize cutting tool to carry out cutting technique:
(1) the cutting width limit of cutting tool is about 100 microns, and the Cutting Road size can become the main cause that the wafer integrated level can't promote when component size is dwindled;
(2) when the wafer integrated level promoted, the process time of cutting technique also can increase thereupon, and influences production efficiency;
(3) use cutting tool can produce a large amount of chips, thus need utilize clean solution that wafer is carried out cleaning, and this measure easily makes fragile outstanding membrane structure break.
Except utilizing cutting tool to carry out the cutting technique, utilize etching mode to carry out the method for cutting technique in addition in the prior art.Please refer to Fig. 1 to Fig. 3, Fig. 1 to Fig. 3 is the known method schematic diagram that utilizes etching mode to carry out cutting technique.As shown in Figure 1, provide wafer 10, and form sacrifice layer 12 and structure sheaf 14 in the front of wafer 10.Then form photoresist pattern 16, and utilize photoresist pattern 16 to carry out etch process, define front Cutting Road 18 with front at wafer 10 as hard mask on the surface of structure sheaf 14.
As shown in Figure 2, remove photoresist pattern 16, and upset wafer 10, utilize adhesion coating 20 that structure sheaf 14 is engaged on the bearing wafer 22 again.Form another photoresist pattern 24 subsequently at the back side of wafer 10, and utilize photoresist pattern 24 to carry out the cavity 28 that dry etch process defines back side Cutting Road 26 and microcomputer electric component as hard mask.As shown in Figure 3, remove photoresist pattern 24, and carry out wet etch process, remove sacrifice layer 12 to form outstanding membrane structure 30.
Because prior art is to utilize Wet-type etching to remove sacrifice layer 12, therefore etching solution causes outstanding membrane structure 30 impaired via the front of back side Cutting Road 26 eating texture layers 14 easily in etching process.On the other hand, hang the problem that the also possible stress that be produced because of the adhesion coating 20 that is stacked in the top of membrane structure 30 breaks.
Summary of the invention
One of purpose of the present invention is to provide a kind of method of cut crystal, to avoid injuring the structure sheaf of front wafer surface.
For reaching above-mentioned purpose, the invention provides a kind of method of cut crystal.Wafer at first is provided, and forms front Cutting Road pattern in the front of this wafer.Then form back side Cutting Road pattern corresponding to this front Cutting Road pattern at the back side of this wafer.Subsequently this wafer is attached on the expansible film, and carries out sliver technology, utilize this expansible film of stay bolt so that this wafer ruptures and forms a plurality of tube cores.
In order a nearlyer step to understand feature of the present invention and technology contents, see also following about detailed description of the present invention and accompanying drawing.Yet accompanying drawing is only for reference and aid illustration usefulness, is not to be used for the present invention is limited.
Description of drawings
Fig. 1 to Fig. 3 is the known method schematic diagram that utilizes etching mode to carry out cutting technique.
Fig. 4 to Figure 10 is the method schematic diagram of the preferred embodiments of the present invention cut crystal.Description of reference numerals
10 wafers, 12 sacrifice layers
14 structure sheafs, 16 photoresist patterns
18 front Cutting Roads, 20 adhesion coatings
22 bearing wafers, 24 photoresist patterns
26 back side Cutting Roads, 28 cavitys
30 outstanding membrane structure 50 wafers
54 mask patterns of 52 structure sheafs
56 front Cutting Road patterns, 58 back side masks patterns
60 back side Cutting Road pattern 62 cavitys
64 outstanding membrane structure 66 expansible films
68 tube cores
Embodiment
Please refer to Fig. 4 to Figure 10.Fig. 4 to Figure 10 is the method schematic diagram of the preferred embodiments of the present invention cut crystal.As shown in Figure 4, at first provide wafer 50, and the front of wafer 50 includes structure sheaf 52.Structure sheaf 52 has different structures according to the difference of making element, and present embodiment is that the element that has an outstanding membrane structure with making is an example, also can include sacrifice layer (scheming not show) between structure sheaf 52 and the wafer 50 simultaneously.What deserves to be explained is that structure sheaf 52 of the present invention is not limited to therefore also can be various micro electromechanical structure layers or semiconductor element layer etc. as making outstanding membrane structure.Subsequently, surface at structure sheaf 52 forms front mask pattern 54, and front mask pattern 54 also has a plurality of openings, define the position of front Cutting Road pattern thus, wherein the material of front mask pattern 54 can be various dielectric materials such as silicon dioxide or silicon nitride, organic material or photo anti-corrosion agent material etc.
As shown in Figure 5, then via the opening etch structures layer 52 of front mask pattern 54, to form front Cutting Road pattern 56 in structure sheaf 52, wherein the etching mode visual effect uses dry-etching or Wet-type etching.What deserves to be explained is front Cutting Road pattern 56 also dark and wafer 50 except that running through structure sheaf 52 in addition, but through-wafer 50 not, the front degree of depth of Cutting Road pattern 56 in wafer 50 then decided on the thickness of wafer 50.
As shown in Figure 6, remove front mask pattern 54 subsequently, and, form back side masks pattern 58 in the back side of wafer 50 again wafer 50 upsets.The part opening of back side masks pattern 58 is corresponding with the opening of front mask pattern 54, define position thus corresponding to the back side Cutting Road pattern of front Cutting Road pattern 56, and back side masks pattern 58 also includes in order to define the opening of cavity, so that can expose structure sheaf 52 after subsequent etch technology.The material of above-mentioned back side masks pattern 54 can be various dielectric materials such as silicon dioxide or silicon nitride, organic material or photo anti-corrosion agent material etc.
As shown in Figure 7, then carry out etch process, form back side Cutting Road pattern 60 via the opening etched wafer 50 of back side masks pattern 58 with the back side corresponding to front Cutting Road pattern 56 at wafer 50, and form the cavity 62 that exposes structure sheaf 52 at the back side of wafer 50 in the lump, form outstanding membrane structure 64 thus.What deserves to be explained is that present embodiment is to utilize anisotropy wet type etch process, for example utilize potassium hydroxide (potassium hydroxide, KOH) solution, ethylene diamine pyrocatechol (ethylenediamine-pyrocatechol-water, EDP) solution or tetramethyl ammonium hydroxide (tetramethylammonium hydroxide, TMAH) therefore the wafer 50 that is made of silicon materials of etching such as solution can form back side Cutting Road pattern 60 and cavity 62 with sloped sidewall.Yet application of the present invention is not limited to this, that is forms back side Cutting Road pattern 60 and also can utilize dry-etching with cavity 62, and for example plasma etching is reached.As shown in Figure 8, then can make back side Cutting Road pattern 60 and cavity 62 have vertical sidewall if use dry-etching to carry out this step, can make the more shallow and eating thrown wafer 50 not of the degree of depth of back side Cutting Road pattern 62 by the practice of adjusting depth-to-width ratio simultaneously, the degree of depth of cavity 62 is then dark and arrive structure sheaf 52.
As shown in Figure 9, remove back side masks pattern 58 subsequently, and wafer 50 is attached on the expansible film 66, wherein present embodiment is the practice that the front of wafer 50 is attached at expansible film 66, but method of the present invention is not limited thereto and also can selects the back side of wafer 50 is attached at expansible film 66.As shown in figure 10, soon carry out sliver technology, utilize the expansible film 66 of stay bolt to make wafer 50, form a plurality of tube cores 68 thus, finish the method for cut crystal of the present invention along the position fracture of front Cutting Road pattern 56 with back side Cutting Road pattern 60.
From the above, method of the present invention is to carry out etching respectively at the front of wafer and the back side, utilize sliver technology to carry out the wafer cutting again, therefore the wafer cutting of high density and automation not only can be provided, increase the die yield of single wafer thus, simultaneously front Cutting Road pattern and back side Cutting Road pattern and non-through before carrying out sliver technology, so can effectively avoid the structure sheaf of front wafer surface to be subjected to the erosion of etching solution of back side wet etching process and impaired.Moreover the step that defines back side Cutting Road pattern is integrated in the step that defines cavity, does not therefore need to increase separately cost.In addition, cover, therefore also can not produce the problem that stress causes structure sheaf to damage because the structure sheaf of front wafer surface there is no other protective layers.
The above only is the preferred embodiments of the present invention, and all equivalent variations and modifications of doing according to claim of the present invention all should belong to covering scope of the present invention.

Claims (12)

1, a kind of method of cut crystal includes:
Wafer is provided;
Front at described wafer forms front Cutting Road pattern;
At the back side Cutting Road pattern of the back side of described wafer formation corresponding to described front Cutting Road pattern; And
Described wafer is attached on the expansible film, and carries out sliver technology, utilize the described expansible film of stay bolt so that described wafer ruptures and forms a plurality of tube cores.
2, the method for claim 1, the step that wherein forms described front Cutting Road pattern includes:
Front at described wafer forms the front mask pattern, and described front mask pattern includes a plurality of openings;
Via the front of the described wafer of described opening etching to form described front Cutting Road pattern; And
Remove described front mask pattern.
3, the method for claim 1, the step that wherein forms described back side Cutting Road pattern includes:
The back side at described wafer forms the back side masks pattern, and described back side masks pattern includes a plurality of openings;
Via the back side of the described wafer of described opening etching to form described back side Cutting Road pattern; And
Remove described back side masks pattern.
4, method as claimed in claim 3, wherein the back side of the described wafer of etching is to utilize dry etch process to reach.
5, method as claimed in claim 3, wherein the back side of the described wafer of etching is to utilize wet etch process to reach.
6, the method for claim 1, wherein when carrying out described sliver technology, the front of described wafer is attached on the described expansible film.
7, a kind of method of cut crystal includes:
Provide wafer, and the front of described wafer includes structure sheaf;
On described structure sheaf, form front Cutting Road pattern, and described front Cutting Road pattern deeply and described wafer but do not run through described wafer;
Carry out etch process forming back side Cutting Road pattern at the back side of described wafer, and form a plurality of cavitys that expose described structure sheaf in the lump at the back side of described wafer, form a plurality of outstanding membrane structures thus corresponding to described front Cutting Road pattern; And
Described wafer is attached on the expansible film, and carries out sliver technology, utilize the described expansible film of stay bolt so that described wafer ruptures and forms a plurality of tube cores.
8, method as claimed in claim 7, the step that wherein forms described front Cutting Road pattern includes:
On described structure sheaf, form the front mask pattern, and described front mask pattern includes a plurality of openings;
Via the front of described structure sheaf of described opening etching and described wafer to form described front Cutting Road pattern; And
Remove described front mask pattern.
9, method as claimed in claim 7, the step that wherein forms described back side Cutting Road pattern and outstanding membrane structure such as described includes:
The back side at described wafer forms the back side masks pattern, and described back side masks pattern includes a plurality of openings;
Via the back side of the described wafer of described opening etching to form described back side Cutting Road pattern and described outstanding membrane structure; And
Remove described back side masks pattern.
10, method as claimed in claim 9, wherein the back side of the described wafer of etching is to utilize dry etch process to reach.
11, method as claimed in claim 9, wherein the back side of the described wafer of etching is to utilize wet etch process to reach.
12, method as claimed in claim 9, wherein when carrying out described sliver technology, the front of described wafer is attached on the described expansible film.
CNB2006100041295A 2006-02-21 2006-02-21 Wafer cutting method Expired - Fee Related CN100477162C (en)

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CN100477162C CN100477162C (en) 2009-04-08

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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101840965A (en) * 2009-05-08 2010-09-22 晶能光电(江西)有限公司 Method for cutting substrate of light emitting diode manufactured on metallic substrate
CN101734613B (en) * 2009-12-03 2011-08-24 西北工业大学 SOI wafer-based MEMS structure manufacturing and dicing method
CN104637877A (en) * 2013-11-13 2015-05-20 株式会社东芝 Method of manufacturing semiconductor chip, semiconductor chip, and semiconductor device
CN104752346A (en) * 2013-12-26 2015-07-01 株式会社迪思科 Wafer processing method
CN105917460A (en) * 2013-10-29 2016-08-31 皇家飞利浦有限公司 Scribing a wafer of semiconductor devices
CN105984832A (en) * 2015-02-02 2016-10-05 中芯国际集成电路制造(上海)有限公司 MEMS device and preparation method thereof and electronic device
CN107188111A (en) * 2017-05-27 2017-09-22 龙微科技无锡有限公司 The splinter method of MEMS sensor wafer, MEMS sensor wafer
CN107464777A (en) * 2016-06-02 2017-12-12 苏州能讯高能半导体有限公司 Semiconductor crystal wafer and its manufacture method
CN108328570A (en) * 2018-01-31 2018-07-27 北京航天控制仪器研究所 A kind of MEMS chip splinter method and supporting tool with film back cavity structure
CN108529554A (en) * 2017-03-02 2018-09-14 中芯国际集成电路制造(上海)有限公司 A kind of MEMS device and preparation method thereof
US10410976B2 (en) 2013-11-13 2019-09-10 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor chip, semiconductor chip, and semiconductor device
CN111470471A (en) * 2019-01-23 2020-07-31 上海新微技术研发中心有限公司 Substrate cutting method

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101840965A (en) * 2009-05-08 2010-09-22 晶能光电(江西)有限公司 Method for cutting substrate of light emitting diode manufactured on metallic substrate
CN101734613B (en) * 2009-12-03 2011-08-24 西北工业大学 SOI wafer-based MEMS structure manufacturing and dicing method
CN105917460A (en) * 2013-10-29 2016-08-31 皇家飞利浦有限公司 Scribing a wafer of semiconductor devices
CN104637877A (en) * 2013-11-13 2015-05-20 株式会社东芝 Method of manufacturing semiconductor chip, semiconductor chip, and semiconductor device
US10410976B2 (en) 2013-11-13 2019-09-10 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor chip, semiconductor chip, and semiconductor device
CN104752346B (en) * 2013-12-26 2019-04-23 株式会社迪思科 The processing method of chip
CN104752346A (en) * 2013-12-26 2015-07-01 株式会社迪思科 Wafer processing method
CN105984832A (en) * 2015-02-02 2016-10-05 中芯国际集成电路制造(上海)有限公司 MEMS device and preparation method thereof and electronic device
CN105984832B (en) * 2015-02-02 2017-12-19 中芯国际集成电路制造(上海)有限公司 A kind of MEMS and preparation method thereof, electronic installation
CN107464777A (en) * 2016-06-02 2017-12-12 苏州能讯高能半导体有限公司 Semiconductor crystal wafer and its manufacture method
CN108529554A (en) * 2017-03-02 2018-09-14 中芯国际集成电路制造(上海)有限公司 A kind of MEMS device and preparation method thereof
CN107188111A (en) * 2017-05-27 2017-09-22 龙微科技无锡有限公司 The splinter method of MEMS sensor wafer, MEMS sensor wafer
CN108328570A (en) * 2018-01-31 2018-07-27 北京航天控制仪器研究所 A kind of MEMS chip splinter method and supporting tool with film back cavity structure
CN111470471A (en) * 2019-01-23 2020-07-31 上海新微技术研发中心有限公司 Substrate cutting method

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