CN101009623A - A wireless sensor network node and its implementation method - Google Patents

A wireless sensor network node and its implementation method Download PDF

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CN101009623A
CN101009623A CNA2007100194986A CN200710019498A CN101009623A CN 101009623 A CN101009623 A CN 101009623A CN A2007100194986 A CNA2007100194986 A CN A2007100194986A CN 200710019498 A CN200710019498 A CN 200710019498A CN 101009623 A CN101009623 A CN 101009623A
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module
design
frequency
software
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王汝传
沙超
孙力娟
黄海平
陈志�
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Nanjing Post and Telecommunication University
Nanjing University of Posts and Telecommunications
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Nanjing Post and Telecommunication University
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Abstract

The related wireless sensor network node for short-distance low-consumption wireless communication system comprises: a central master process module (1) as the center, both the output ports of an external information sense module (3) and bottom energy supply module (4) connected with the inlet of module (1), a short-distance HF wireless communication module (2) bidirectional connected with (1); wherein, the module (2) includes a RF chip (2-1) and an external antenna (2-2), the module (3) includes a light intensity sensor (3-1) and a temperature sensor (3-2), and the module (4) includes a JTAG power (4-1) and an external power (4-2). This invention reduces power consumption.

Description

A kind of wireless sensor network node and its implementation
Technical field
The present invention relates to a kind of design of wireless communication system of short distance low-power consumption, mainly solved the wireless sensing problem under the HF communication condition, belonged to the crossing domain of embedded system and radio communication.
Background technology
Wireless sensor network (Wireless Sensor Network, abbreviation WSN) combines multiple advanced technologies such as microelectric technique, embedded computing technique, modern computer network technologies and wireless communication technology, distributed information processing, node in the network can be monitored mutually collaboratively in real time, the information of various environment or monitoring target in perception and the collection network overlay area, and it is handled, information after the processing is sent out by wireless mode, and sends the observer to the network mode of organizing multi-hop certainly.Wireless sensor network will be in logic information world merge into one with objectively physical world, thereby realize physical world, the connection of calculating the world and the human society ternary world.
Wireless sensor network combines multi-disciplinary cutting edge technology as a brand-new research direction of current information and computer realm, has been subjected to the extensive concern of academia and industrial quarters now.The a lot of scientific research institutions and the university research mechanism that comprise U.S. Department of Defense have all dropped into the research that a large amount of research and development strengths and energy are engaged in the wireless sensor network software and hardware system one after another.Aspect the realization of wireless sensor network hardware platform, the development of Smart Dust (SMART DUST) laboratory of the most representative is exactly Berkeley (Berkeley) university and the Mica series node of Crossbow company.
As the hardware carrier of wireless sensor network platform, the design of wireless sensor node need be followed microminiaturization, low-power consumption, numerous factors such as autgmentability is strong, and stability is high, and fail safe is good, and cost is low.Yet, as a kind of technology of emerging appearance, set up one run well, wireless sensor network that robustness is good still is faced with many challenges.And because its some unique properties, the method for designing of wireless sensor network and the method for designing of prior wireless network have a great difference.For example, because the sensor node in the sensor network is densely distributed, so need large-scale data management and treatment technology.Secondly, wireless sensor network node generally is deployed in the mankind and is difficult to arrive and the zone that contacts, and this is faced with very big challenge with regard to the maintenance that makes sensor network nodes.In addition, electrical source consumption also is a very important problem, and wireless sensor node can only be equipped with limited power supply as micro devices, and under some application scenario, it is almost impossible changing power supply.This makes the life-span of sensor node depend on the life-span of battery to a great extent, is the problem that the wireless sensor network design needs overriding concern so reduce power consumption with the life-span that prolongs system.
Because the hardware system of wireless sensor network mainly comprises transducer, processor and three parts of radio communication, cross over a plurality of fields, and in the world the research in radio sensing network field also had only short several years, existing overwhelming majority research and design all are that the plate level of mature modules in each field is integrated, do not use special-purpose process chip, all be greatly limited at aspects such as system power dissipation, chip area, node area, disposal ability, the program space, data spaces.Present work is necessary from the actual demand of radio sensing network application, develop special-purpose core on-chip system chip, and further integrated sensor, radio communication, power managed and other special functions, thereby satisfy the various application demands of radio sensing network.The design of a kind of wireless sensor network node that arrives involved in the present invention and realization are carried out carrying out based on this just.Purpose is by the scrutiny to various wireless sensor networks and node, designs wireless sensor network microprocessor chip and node with independent intellectual property right, further sets up wireless sensor network.
Summary of the invention
Technical problem: the purpose of this invention is to provide a kind of wireless sensor network node and its implementation.This method makes up a kind of wireless sensor network hardware carrier of high-performance low-power-consumption, the general transfer of data of sensor network has not only been satisfied in the design of node and realization on function, State Control, monitoring in real time, a series of functions such as autonomous location, simultaneously, aspect level of integrated system, large increase has been arranged, further reduce the energy consumption of node, strengthened the autonomous stationkeeping ability of node, improved the mode and the method for the self-performance monitoring and the self of node.Final purpose is to develop high-performance, than the strongly-adaptive ability, and the SOC (system on a chip) of high integrated level.
Technical scheme: as UbiCell (name of the node of the present invention) node of wireless sensor network platform carrier, integrated Multifunction Sensor parts, high-performance microprocessor parts, multiple embedded chips such as high frequency wireless receiving and dispatching parts.Have the transmission of multifunctional sensing information, high-speed data information gathering, signal processing, wireless data transmission, multiple functions such as high-precision independent location and monitoring in real time.Practical, have wide range of applications.The amount of information that node need be observed by the peripheral sensing module perception of multifunctional comprehensiveization, and import inner main control module automatically into, carry out signal analysis and processing, and the information after will handling is delivered to wireless sending module.Radio-frequency module according to predefined data transmission rate and coded system, carries out the transmission of information in certain frequency range, thereby realizes the radio communication of transducing signal.
The present invention proposes a kind of real-time perception external sense information and also can carry out the implementation method of the wireless sensor network node of sensing data transmission and control.The whole node device has comprised the central primary control processing module, short distance high-frequency wireless communication module, external information sensing module and bottom energy supply module.Above-mentioned four modules are called by SOC (system on a chip) software is organic, carry out the collection of sensing data, data passes, information processing, condition monitoring, a series of activities such as control in real time.The module composition diagram of whole system as shown in Figure 1.
The central primary control processing module is the core of whole wireless sensor node, be responsible for the Equipment Control of whole UbiCell node, Task Distribution and scheduling, a plurality of mission criticals such as the integration of data and dump, comprise the transmitting-receiving operation of Control Node data and information and to transmitting-receiving speed, coded format, transmitting-receiving frequencies etc. control effectively; Every data (temperature, humidity, luminous intensity, sound etc.) that outside information sensing module collects are filtered and handled; Data encryption and safety guarantee; The management of power consumption and control and mode switch etc.Among the present invention, adopted high integrated, low-power consumption, the 8-bit microprocessor of reduced instruction set computer has adopted advanced Harvard bussing technique, makes the processing speed of whole node and accuracy greatly improve.Simultaneously, whole system also has very strong extensibility, but a plurality of I/O interfaces and expansion slot are provided, and promptly helps the function expansion of node, also lays the first stone for the exploitation of subsequent product.
Short distance high-frequency wireless communication module mainly is responsible for the transmitting-receiving of wireless signal, promptly carries out radio communication with other UbiCell nodes, and this node related data that collects and the relevant information and other nodes that receive are exchanged.In order to realize the high reliability of high-frequency transmission, low error rate, the radio frequency chip that meets the IEEE802.15.4 standard major part as communication module has been adopted in the requirement of high real-time and transmission range, the present invention.Working frequency range is between the 300MHZ-1GHZ, and can pass through its inner register setting, adjusts working frequency range flexibly, and adaptability is strong.The working frequency range of UbiCell design of node is 900MHZ, and can adjust accordingly according to actual conditions.Adopt the FSK modulation system, NRZ, Manchester, the optional coded system of UART is with the optional data transfer rate of 0.6Kbaud/s-76.8Kbaud/s.Module-external uses the SPI interface to link to each other with the central primary control processing module.
The external information sensing module is mainly used to carry out the collection of corresponding data and the conversion of information, and is responsible for that the information that collects is sent into the central primary control processing module exactly and handles.Because the diversity of using, the heat transfer agent design that requires node develops towards the direction of diversification.Of the present invention be to use once big characteristics revocable, pluggable sensor assembly.Consider the volume and the requirement of actual application of node, UbiCell does not have integrated all sensor assemblies, still, but provides general sensor assembly interface, can carry out the switching and the selection of heat transfer agent comparatively easily.Expand the purposes of whole node well, increased the versatility of node.
Bottom energy supply module provides operation needed whole energy for the UbiCell node.In the present invention, both can use outside JTAG or ISP to power, and also can use node self power supply and external stabilized power to carry out power supply and supply with.
Wireless sensor network node of the present invention is the center with the central primary control processing module, the output of external information sensing module, bottom energy supply module connects the input of central primary control processing module respectively, short distance high-frequency wireless communication module and the two-way UNICOM of central primary control processing module; Wherein, short distance high-frequency wireless communication module comprises radio frequency chip, exterior antenna, and the external information sensing module comprises light intensity sensor, temperature sensor, and bottom energy supply module comprises JTAG power supply, external power source.
The step that implementation method comprised of wireless sensor network node is:
Required general function of finishing of step 1) programming wireless sensing device network node and key property index: node need be finished real-time data acquisition, monitoring in real time, signal processing, transfer of data, information fusion, early warning control, independently locate multiple function, requirement has high system reliability and high integration, real-time analysis preferably and disposal ability, the transfer of data accuracy, and possess the condition of work of long-time low energy consumption;
Step 2) determine the input and output of wireless sensor network node: node with user appointed information image data and other node sends in the network data as input, with the sensing result in user terminal displays as output;
Clear and definite node signal type of step 3) and data characteristic: node signal is transmitted in the general high band of variable-frequency 300MHZ-1000MHZ, has a plurality of fixing frequencies.Frequency modulation(FM) can realize that adopt the adjustable data transmission rate of 0.6KBaud/s-76.8KBaud/s, internal data adopts parallel transmission pattern, Manchester's code by the value of programming change frequency word register;
The executive mode of step 4) node and function realize: adopt the JTAG programmable device to carry out the in-circuit emulation and the debugging of node procedure, serial ports is provided simultaneously, the parallel port, and USB downloading mode, node has been downloaded after the application program, get final product executable operations, and under the control and supervision of terminal controlling platform, finish application task;
Step 5) is carried out the basic boom design of node: the node basic boom is made up of four levels, is respectively from bottom to top: functional part layer, device drive layer, embedded system kernel, application system level;
The description of step 6) design of node scheme: system adopts top-down method that the functional part of this node is carried out Module Division, mainly comprises: central primary control processing module, user interface, high-frequency wireless communication module, information sensing module and energy supply module;
Step 7) design central primary control processing module: the central primary control processing module is by SPI communicator module, carry out data communication and signal transmission with the high-frequency wireless communication module, simultaneously, utilize A/D conversion submodule, the various heat transfer agents that the information sensing module is collected are converted into the form of the signal of telecommunication, and be transferred to the user interface of handling as master control, thereby realize the demonstration of quantitative and qualitative heat transfer agent by the asynchronous serial submodule;
Step 8) design high-frequency wireless communication module: the high-frequency wireless communication module of node has comprised low noise amplifier, frequency mixer, filter circuit, frequency divider, modulator-demodulator, phase discriminator, low pass filter, module is with heat transfer agent, mode with wireless frequency spectrum, on the frequency range of 300MHZ-1000MHZ, transmit, simultaneously, reception is from the heat transfer agent transmission of other node in the ad-hoc network, and in real time and base-station node link up;
Step 9) design information sensing module: this module adopts pluggable Component Design technology, various Application in Sensing is designed to sensing module capable of being combined, the transducing signal line links to each other with the mould/number conversion pin of central primary control processing module by the fixed slot interface, in system's running, the sensing module of corresponding application-specific can be realized the collection and the processing of corresponding information;
Step 10) design energy supply module: the energy supply module provides energy resource supply for above-mentioned each module, and the four kinds of different working methods of transmission, reception, dormancy, standby at system provide corresponding energy resource supply mode;
Choosing of step 11) node peripheral components: according to the oneself requirement of node own characteristic and wireless sensor network, the peripheral components of node, realized as the function of organizing the node in the wireless network certainly, but these devices comprise digitlization I/O device, external memory device, A/D converter spare, external crystal-controlled oscillation system, active antenna;
The circuit design of step 12) node and realization: node circuit adopts the digitlization standard design, and element all adopts the SMD encapsulation of 0603 type, has realized the conversion between TTL signal and the RS-232 signal between being connected of node and PC serial ports; Main controlled node has been set up the buffering between high speed signal and the low speed signal, and node adopts the strategy of six laminates wiring, is undertaken by the mode that hand wired and self routing combine;
Interface design between the step 13) node module: node interface mainly is made up of three parts, is respectively series arrangement bus coupling part, bi-directional synchronization data-signal coupling part, and optional part of detecting;
The power supply design of step 14) node: node provides 4 kinds of variable mode of operations, is respectively sleep pattern, sending mode, receiving mode, battery saving mode, simultaneously, designed a kind of comparatively accurate power supply early warning mechanism, can finish real-time monitoring for self supply power voltage;
The power managed design of step 15) node: the power managed of node has mainly comprised the system level power consumption management, and the software code level is optimized, and register transfer optimization and rear end comprehensive wiring are optimized;
Step 16) extensibility of node design: node has been reserved sufficient interface in design process, comprises surpassing 30 main control module input/output interfaces, so that calling and expand from now on, simultaneously, node adopts the hot swappable sensing element, is convenient to the continuity exploitation of subsequent product;
Step 17) reliability of nodes and anti-interference design: node loads filter capacitor in HFS design, on IC and connect high frequency capacitance, adopts intensive wiring to reduce the high-frequency noise emission; Aspect the propagation path inhibition, design of node goes out to have the stabilized power supply of filter circuit, is isolated between I/O mouth and noise source, simultaneously, interference source is separated with Sensitive Apparatus;
Step 18) Design of System Software of node: the harmonious operation of all real-time tasks of the system software controls of node, system is according to mission requirements, carry out resource management, Message Processing, task scheduling, abnormality processing, and distribute priority, system is according to the priority of each task, dynamically switches and dispatches;
Step 19) software reliability of node design: adopt digital filtering that suppresses superposition noise on signal path and the method that reduces redundant instruction in the design of node, adopt reduced instruction set;
Step 20) software debugging of node: node uses AVR Studio to carry out software debugging, allows the user to carry out emulation of AVR online in real time or simulation, simultaneously, node is supported the wireless senser operating system platform of main flow, supports .hex .elf, .cof .ihex, many kinds of file formats of .srec;
Step 21) the system-Level software emulation of node: node adopts VMLAB to carry out system-Level software emulation, in the software emulation stage, by building of hardware and software platform, the virtual simulated environment of a node actual motion, by simulated environment, function that can clear and definite node realizes;
Step 22) the system-level simulation hardware of node: node uses the JTAG in-circuit emulator to finish simulation hardware, by firing platform, application program is fired in the node, finishes application function;
Step 23) download of node application program and execution: design of node 4 kinds of downloading modes, be respectively that parallel port ISP downloads, USBISP downloads that serial ports ISP downloads and JTAG downloads, ISP can be undertaken by the download line that node attaches; JTAG downloads and is mainly undertaken by JTAGICE.
Beneficial effect: as the supplier of wireless sensor network platform, the UbiCell node has been born most control, transmission and monitoring work.Have following advantages and useful achievement:
Higher system integrated level: be subjected to the restriction of overall dimension as the wireless sensor network node of practical application, adopted high as far as possible integration layout strategy.Node has adopted the high-performance of 8 risc architectures, the microprocessor of low-power consumption, and integrated most of critical component of node comprises sound attitude memory, the ADC transducer, timer conter etc., real-time clock, asynchronous serial modules etc. have very strong extensibility.The system integration situation tabulation of node is as shown in table 1.Simultaneously, at system and application software design aspect, all modules of intranodal have all accomplished to simplify as far as possible, do not have redundant code substantially.Adopted unified device drives strategy, the data acquisition information of multiple sensing element has been carried out effectively comprehensive, the data acquisition of node and information processing are efficiently carried out.
Lower system capacity consumption: as the critical component of whole node, the power consumption of processor is generally very big.And in wireless network, not having lasting energy resource supply, this just requires the design of node to consider as a key factor energy-conservation.The energy of UbiCell node is supplied with the mode that has adopted external power source and base station power supply to combine, and provides to comprise idle pulley ADC noise reduction mode, power-down mode, battery saving mode, multiple power management such as standby mode.And can make node in the whole service process, carry out the conversion of state on one's own initiative, thereby very reduce the energy consumption of node effectively, prolong the useful life of node.Simultaneously, node has extensively adopted the hardware resource of low-power consumption in the process of design and realization.Atmega128L with low-power consumption is a microprocessor, and the optional CC1000 of multiple energy saver mode is the method for designing of communication equipment.When guaranteeing the node operate as normal, energy consumption is dropped to minimum.At the characteristics of wireless sensor network data forwarding and the implementation of exchanges data, the present invention has made full use of the reiving/transmitting state of node, has reached purpose of energy saving.The UbiCell node utilizes the intelligent radio receive-transmit system, and the message that needs to transmit can directly identify and transmit in communication subsystem, also can operate as normal when computing subsystem is in sleep state.Owing to do not need the participation of CPU (central processing unit), greatly reduce energy consumption.The energy consumption situation of each module of UbiCell as shown in Figure 2.
The speed of service faster: because that wireless sensor network requires for node real time performance is very high, this ability that just needs processor real-time to handle is powerful.The bus structures that comprise processor inside, addressing system, the design of instruction pipeline etc. all need be as target.The processor adopting of UbiCell program storage and data storage use the different memory spaces and the Harvard structure of ACCESS bus, instruction fetch and program are carried out and are carried out simultaneously, have saved expense greatly.Simultaneously, hardware multiplier only needs two clock cycle, and when working in 16MHz, performance can be up to 16 MIPS.System ALU directly is connected with 32 general purpose working registers, and in a system clock cycle, ALU can finish the once-through operation operation.
Stronger extensibility: the product sensor function on the existing market is general more single, and multi-functional product is the trend of development.Yet in the design in early stage, can not include all functions, this just requires system that very strong extensibility is arranged.For the ease of the upgrading and the Application Expansion of system, node of the present invention has been considered extensibility more.The extensibility that has comprised external interface, the extensibility of storage medium, the extensibility of Application in Sensing and the extensibility of functional mode.
Because node is to carry out transfer of data and information gathering at one in the multi-hop sensor network of group, and relate to flow control, Route Selection, safety management, a series of inter-related tasks such as fault-tolerant detection need storage and handle mass data, therefore, for sensing node, base-station node especially, the memory capacity of system all is a considerable factor.Memory unit of the present invention has mainly comprised the RAM that microprocessor internal carries, EEPOM, FLASH etc. and outside extension storage parts.For the limited memory of internal capacity, but outside extension storage parts have tangible flexibility, can expand as required, satisfy various application demands.Node has been reserved simultaneously can be for the external memory interface of expansion.
For diversity and the flexibility that reaches application, the present invention has adopted modular sensing element layout strategy when design and realization.The Application in Sensing of each type is encapsulated as unified sensing element, finishes the sensing function of node with the form of assembly.On sensing element and node, having designed can be for the expansion slot of plug, and the sensing element that needs are used is directly connected on the node, can finish the collection and the transmission of corresponding information.Simultaneously, compare clear and definite function and divide, data acquisition modes and interface is unitized, made things convenient for the function expansion.
Stronger Anti-interference Design: node of the present invention, owing to be operated in the various complex environments, when superior performance requires, also the antijamming capability to system has proposed more and more higher requirement, particularly is applied to for higher fields of real-time such as non-destructive testing transducer with real-time monitoring capacity and spectrographic detections.Node is from suppressing interference source, and many-sided reductions the such as antijamming capability of cutting off propagation path and raising sensitive components disturb, and improve the reliability of platform.The measure of the inhibition interference source that node adopted has: HFS loads filter capacitor; IC is last and connect high frequency capacitance, and it is intensive short and small smoothly to reduce high-frequency noise emission etc. to connect up.Aspect the propagation path inhibition, considered the noise effect of power supply for SOC (system on a chip), design the stabilized power supply that has filter circuit, between I/O mouth and noise source, isolated equally, simultaneously, noted crystal oscillator wiring and ground connection, the circuit board rationalization partition separates interference source with Sensitive Apparatus.System has carried out many-sided improvement for improving the antijamming capability of sensitive components, has comprised the area that reduces return rings, reduces the coupling noise, and the idle port of configuration uses Power Supply Monitoring and watchdog circuit, reduces crystal oscillator and uses low speed propagation etc.
Lower hardware cost of manufacture: as the wireless device of networking, sensor node should be dispersed throughout network everywhere, if the individual node cost is too high, will inevitably influence the layout of whole networking.The major part of UbiCell node of the present invention adopts six laminate routing strategies, and overall routing is reasonable, and inner member has higher performance, makes the cost of manufacture of node integral body reduce.
Description of drawings
Fig. 1 is the integral module composition diagram of UbiCell node.Expression whole node system basic module is formed.
Fig. 2 is the energy consumption situation comparison diagram of each module of UbiCell.Power consumption situation and the contrast of forming each energy consumption part of the present invention have been shown.
Fig. 3 is circuit design principle figure of the present invention.Have among the figure: central primary control processing module 1, short distance high-frequency wireless communication module 2, radio frequency chip 2-1, exterior antenna 2-2, external information sensing module 3, light intensity sensor 3-1, temperature sensor 3-2, bottom energy supply module 4, JTAG power 4-1, external power source 4-2.
Fig. 4 is the schematic diagram of JTAG and destination node connected mode.The mutual situation and the mode that have reflected JTAG and node.
Fig. 5 is the interface connection layout between processor module of the present invention and the wireless communication module, the clear and definite mutual situation of node two big intermodules.
Fig. 6 is the overview flow chart of program.Reflected the self check from power on of UbiCell node among the figure to initialization,, clearly illustrated that the operational process of system to a series of processes of state exchange.
Fig. 7 is the detailed structure division figure of the present invention.Modular structure that this node is detailed and the conspiracy relation between the various piece have been represented.
Fig. 8 is basic boom design of the present invention, has reflected the basic layer structure of node.
Embodiment
Wireless sensor network node of the present invention is the center with central primary control processing module 1, the output of external information sensing module 3, bottom energy supply module 4 connects the input of central primary control processing module 1 respectively, short distance high-frequency wireless communication module 2 and central primary control processing module 1 two-way UNICOM; Wherein, short distance high-frequency wireless communication module 2 comprises radio frequency chip 2-1, exterior antenna 2-2, external information sensing module 3 comprises light intensity sensor 3-1, temperature sensor 3-2, and bottom energy supply module 4 comprises JTAG power supply 4-1, external power source 4-2.
UbiCell wireless sensor network node specific implementation and exploitation performing step are:
(1) on the basis of the wireless sensor network field being carried out deeply concrete research, required general function of finishing of clear and definite sensor node and basic performance index.At the demand of practical application, the UbiCell node need be finished real-time data acquisition, monitoring in real time, signal processing, transfer of data, information fusion, early warning control, multiple functions such as the autonomous location of node.In order to reach above-mentioned every basic function, the UbiCell node has had higher system reliability and integrated level, real-time analysis preferably and disposal ability, and accurate data is transmitted accuracy, and possesses the condition of work of long-time low energy consumption.
(2) clear and definite system applies the technical indicator that must reach.
A) input and output of system:
Node is user's input and output controlled function flexibly of providing convenience, and the input of node comprises that program fires, function selecting and terminal control, and the output of node comprises data acquisition, information shows.
B) node signal type and data characteristic:
Node signal is transmitted in the general high band of variable-frequency 300MHZ-1000MHZ, and concrete working frequency points can realize by software.Adopt the adjustable data transmission rate of 0.6KBaud/s-76.8KBaud/s.Internal data adopts parallel transmission pattern, Manchester's code.
C) executive mode of node and function realize:
Node adopts the JTAG programmable device to carry out the in-circuit emulation and the debugging of program, provides serial ports simultaneously, the programming mode of parallel port and USB mouth.Node has been downloaded after the related application, can carry out associative operation, and under the control and supervision of terminal controlling platform, finishes application task.
(3) basic boom of node design.
The basic boom of node has been followed the fundamental mode of general embedded product, simultaneously, based on the needs of practical application, all expansions to some extent on each aspect.The node basic boom is made up of four levels, is respectively from bottom to top: functional part layer, device drive layer, embedded system kernel, application system level.
A) functional part layer:
The functional part layer is the underlying platform and the hardware foundation of whole node.Comprised the set that all hardware modules of node are formed and system bottom calls.Each composition module of node is carried out comprehensive and co-ordination.Simultaneously, defined the bus unit of node, interrupt system.
B) device drive layer:
Device drive layer provides device driver functionality and strategy for the bottom physical unit.Sensor node in the practical application need work under the various modes, and state exchange is frequent, and energy consumption control requires high.This layer effect is exactly the form with device driver module, and comprehensive scheduling is done in the parts operation of node.
C) embedded system kernel
The embedded system kernel connects at equipment and between using, and the methods that provide software and hardware system to call provide the function service for upper layer application simultaneously.System kernel at the special requirement of sensor node, has improved the interruption controls strategy, process scheduling strategy and memory management policy simultaneously based on the management and dispatching strategy of real time operating system.
D) application system level
Application system level provides application oriented system control mode and method of work for the terminal use.Finish the startup of node, operation, state transition, data acquisition, information processing, signal transmission, energy consumption early warning, a series of application functions such as program download.
The basic boom design of node as shown in Figure 8.
(4) carry out the description of design of node scheme.
System adopts top-down method, and the functional part of node is carried out Module Division.Mainly comprise: central primary control processing module, user interface, high-frequency wireless communication module, information sensing module and energy supply module.
A) central primary control processing module:
The central primary control processing module of node is the nucleus module of whole node, carries out system's overall scheduling and carries out alternately with the user.Module is carried out data communication and signal transmission by SPI communicator module with the high-frequency wireless communication module.Simultaneously, utilize A/D conversion submodule, the various heat transfer agents that the information sensing module is collected are converted into the form of the signal of telecommunication, and are transferred to the user interface of handling as master control by the asynchronous serial submodule, thereby realize the demonstration of quantitative and qualitative heat transfer agent.
B) user interface
User interface provides selection for the user, control, heat transfer agent collection and signal transmission form many services such as choose.Mutual by with the central primary control module realizes that user's multiple function needs.And can display at user terminal with the sensing Information Monitoring in the graphical interfaces mode.
C) high-frequency wireless communication module
The high-frequency wireless communication module has comprised the low noise amplification, mixing, filtering, a plurality of operating procedures such as modulation are with heat transfer agent, in the mode of wireless frequency spectrum, on corresponding frequency range, transmit, simultaneously, receive heat transfer agent transmission from other node in the ad-hoc network, and the communication of real-time and base-station node.
D) information sensing module
The information sensing module has adopted hot swappable Component Design technology, but various Application in Sensing is designed to the sensing module of flexible combination.In system's running, the sensing module of corresponding application-specific can be realized the collection and the processing of corresponding information.
E) energy supply module
The energy supply module provides energy resource supply for above-mentioned all modules, and four kinds of working methods at system provide corresponding energy resource supply mode.When the operating state of user's switching node, system will call corresponding energy supply mode automatically, and node is operated under the corresponding pattern.
The level division of each module of intranodal and mutual call relation are as shown in Figure 7.
(5) general structure design of enforcement UbiCell.According to the scale of system and the complexity of hardware platform, adopted the structural design mode of sectional type.Entire system is divided according to function.Comprised microprocessor module, radio frequency transceiving module, heat transfer agent acquisition module and power supply supplying module.In actual design process, corresponding integrated circuit (IC) system that each module is all corresponding, and finally be connected by system bus, finish the realization of the allomeric function of UbiCell node.
(6) following step is to carry out the design of the hardware configuration of system.In practical operation, adopted the collaborative design technology of software and hardware concurrent development.Comprised several like this aspects and step in the hardware configuration design:
A) selection of microprocessor:
Microprocessor is the system core parts of whole wireless sensor network node, has directly determined the function and the performance of whole system.Simultaneously, the processor chips of different packing forms also can directly have influence on the physical size and the weight of system.Therefore, in the selection of microprocessor, the present invention has mainly considered the factor of performance and two aspects of encapsulation.The UbiCell node adopted Atmel the advanced person 8 risc microcontrollers---ATmega128L is as the processor chips of node.On the basis of AT90 series processors, increased the hardware multiplier of 2 clocks, and can be by the online programming certainly of the BOOT district realization program on the chip, have the IC interface of 2 lines and 8 tunnel 10 A/D converter, and increased JTAG emulation, download interface has improved the development efficiency of system.
B) selection of peripheral components:
The oneself requirement of the characteristics of node self and wireless sensor network according to the present invention, the selection of peripheral components of the present invention has realized substantially as all functions of organizing the node in the wireless network certainly.But these devices comprise digitlization I/O device, external memory device, A/D converter spare and other functional parts.
C) high integrated, high efficiency circuit design
In the circuit design of UbiCell, demonstrated fully the viewpoint of soft or hard combination.Prepare for the reliability that improves system and for subsequent development, the function that many use hardware can be finished in the node also can be finished by software.The function that realizes hardware with software can reduce the hardware development circuit effectively, but the response time is longer than using the realization of hardware separately, and takies the execution of CPU, and the realization of algorithm is more complicated often.In node development process of the present invention, taken into full account the comprehensive of software and hardware and be connected situation.
The present invention from integration module, to primary element, adopts typical device as far as possible in circuit design, promoted the standardization and the modularization of hardware system.Simultaneously, comprehensive planning the software and hardware resources of system, in the process of developing, taken into full account the extensibility of system, thereby helped the secondary development of system.
Because the interface that has related between a series of different units circuit such as communication between base-station node and the PC is connected and transfer of data, the present invention taken into full account the compatibility of signal in these areas.Realized the conversion between TTL signal and the RS-232 signal between being connected of node and PC serial ports; Therefore main controlled node has also set up the buffering between high speed signal and the low speed signal owing to need to handle in real time and analyze from information that is distributed in each node in the network and data.
D) Interface design of intermodule
Of the present invention two big basic module---the Interface design of wireless communication module and central primary control module mainly is made up of three parts.Be respectively series arrangement bus coupling part (being mainly used to be provided with and the mode of operation and the parameter setting that change wireless communication chips), bi-directional synchronization data-signal coupling part (being mainly used in data communication and message transmission), and optional part of detecting (being mainly used in monitoring node operating state and test signal intensity).Concrete connection situation as shown in Figure 5.
E) computer-aided design of hardware platform
The present invention has adopted a series of comparatively advanced circuit CAD softwares to carry out the design of system configuration and fairly large integrated circuit.Highly versatile, the development efficiency height.The main modular of system has all adopted ProtelDXP to finish the design and the drafting of hardware circuit.In view of the high-end components and parts of the part of this product do not have predefined packing forms, on stream, added definition, and be bundled to the higher field of real-time of its encapsulation communicating requirement for the encapsulation of these devices.The present invention is from suppressing interference source, and many-sided reductions the such as antijamming capability of cutting off propagation path and raising sensitive components disturb, and improve the reliability of platform.The measure of the inhibition interference source that node adopted has: HFS loads filter capacitor; IC is last and connect high frequency capacitance, and it is intensive short and small smoothly to reduce high-frequency noise emission etc. to connect up.Aspect the propagation path inhibition, the present invention has taken into full account the noise effect of power supply for SOC (system on a chip), design the stabilized power supply that has filter circuit, between I/O mouth and noise source, isolated equally, simultaneously, noted crystal oscillator wiring and ground connection, the circuit board rationalization partition separates interference source with Sensitive Apparatus.The present invention has carried out many-sided improvement for improving the antijamming capability of sensitive components, has comprised the area that reduces return rings, reduces the coupling noise, and the idle port of configuration uses Power Supply Monitoring and watchdog circuit, reduces crystal oscillator and uses low speed propagation etc.
What (7) carry out simultaneously with the hardware designs of system is the software function design of system.For the UbiCell development platform, software design has mainly comprised the design of first floor system software and the design of upper application software.
A) functional definition of system
The present invention need finish from the heat transfer agent collection, information translation, signal processing, data dissemination and reception, control desk monitoring, a series of tasks such as real-time early warning.The inputoutput data complexity, transmission means is various.
B) structural design of systems soft ware
Systems soft ware of the present invention is based on RTOS (Real-Time Operation System real time operating system), timely response external event request, and finish processing at the appointed time.System controls the harmonious operation of all real-time tasks, has independence, reliability and real-time characteristics.System carries out resource management according to mission requirements, Message Processing, and task scheduling, work such as abnormality processing, and distribute priority, system can be according to the priority of each task, dynamically switches and dispatch.
C) program circuit of system
Because systems soft ware of the present invention is the embedded software based on SOC (system on a chip), therefore, not only will consider functional integrity and accuracy aspect program circuit, also to guarantee the normal of hardware initialization and running.In view of real-time of the present invention is had relatively high expectations, therefore occupy crucial status in the control of interrupt system and the design that is created in system, system provides and has comprised soft interruption, hardware interrupts and nested interrupt are in interior multiple interrupt mode, adopted the dynamic real-time dispatching algorithm (to comprise the dull algorithm of speed simultaneously, the earliest deadline priority algorithm, minimum slack time priority algorithm).The general procedure flow chart of system as shown in Figure 6
D) modular design of system
Function according to UbiCell realizes requirement, whole system is divided into following several module: central primary control processing module, short distance high-frequency wireless communication module, external information sensing module and bottom energy supply module.Also segment out functional module more specifically in each module.The detailed modular design figure of system as shown in Figure 7.
E) software reliability design
In order to make stable operation of the present invention, on the basis of improving hardware performance and reliability, also need to guarantee the reliability of software, so that whole node stable operation is in operational environment.Software reliability design among the present invention has mainly comprised Anti-interference Design and fault-tolerant design.Design of Software Anti-interference is the householder method of hardware anti-interference design.Among the present invention, digital filtering that suppresses superposition noise on signal path and the method that reduces redundant instruction have been used.Digital filtering has multiple mode, and system has used the weighted average filter method, promptly to target parameter sampling N time, and each sampled value be multiply by one less than 1 weight coefficient, the sampled value after the weighting is added up as this sampled value again.The weight coefficient of each sampled value is all inequality, and with outstanding several times sample effect after this, strengthening system is to the recognition capability of parameter variation tendency.
(8) after the collaborative design of having finished software and hardware, need utilize existing hardware and software development instrument, carry out functional part level and system-level emulation and debugging.So both helped finding out the problem that system exists, the also further clear and definite operational process and the textural association of system.The present invention has mainly adopted software debugging in this stage, three processes of software systems emulation and hardware system emulation.
A) software debugging:
This product uses AVR Studio to carry out software debugging.This is the project management of a collection, program compilation, and program debugging, program is downloaded, function Integrated Development Environment such as JTAG emulation.Allow the user to carry out emulation of AVR online in real time or simulation.Before carrying out emulation, but need to use third party's compiler source file to be compiled as the .cof file or the .hex file of emulation.
B) system-Level software emulation
The present invention adopts VMLAB to carry out system-Level software emulation.In the software emulation stage, by building of hardware and software platform, the virtual simulated environment of a node actual motion.By simulated environment, function that can clear and definite node of the present invention realizes.
C) system-level simulation hardware
The present invention uses JTAG (Joint Test Action Group) in-circuit emulator to finish simulation hardware.By firing platform, application program of the present invention is fired in the node, finish the application corresponding function.JTAG is connected as shown in Figure 4 with destination node.
(9) finished the artificial debugging of software and hardware after, just system program can have been downloaded among the UbiCell.The present invention is mainly the user two kinds of method for down loading is provided, and is respectively that ISP downloads and JTAG downloads.The AVR series of products are all supported ISP, and in actual applications, the special download line that can attach by the present invention carries out the programming of ISP, has both saved special programmable device, also helps from now on system upgrade and subsequent development.JTAG downloads and is mainly undertaken by JTAGICE.Do not need extra device promptly can realize the download execution of file destination.

Claims (2)

1. wireless sensor network node, it is characterized in that this network node is the center with central primary control processing module (1), the output of external information sensing module (3), bottom energy supply module (4) connects the input of central primary control processing module (1) respectively, short distance high-frequency wireless communication module (2) and the two-way UNICOM of central primary control processing module (1); Wherein, short distance high-frequency wireless communication module (2) comprises radio frequency chip (2-1), exterior antenna (2-2), external information sensing module (3) comprises light intensity sensor (3-1), temperature sensor (3-2), and bottom energy supply module (4) comprises JTAG power supply (4-1), external power source (4-2).
2. the implementation method of a wireless sensor network node as claimed in claim 1 is characterized in that realizing that the step that is comprised is:
Required general function of finishing of step 1) programming wireless sensing device network node and key property index: node need be finished real-time data acquisition, monitoring in real time, signal processing, transfer of data, information fusion, early warning control, independently locate multiple function, requirement has higher system reliability and integrated level, real-time analysis preferably and disposal ability, accurate data is transmitted accuracy, and possesses the condition of work of long-time low energy consumption;
Step 2) determine the input and output of wireless sensor network node: node with user appointed information image data and other node sends in the network data as input, with the sensing result in user terminal displays as output;
Clear and definite node signal type of step 3) and data characteristic: based on the needs of HF communication, node signal is transmitted in the general high band of variable-frequency 300MHZ-1000MHZ, concrete modulator approach can realize by the value of programming change frequency word register, adopt the adjustable data transmission rate of 0.6KBaud/s-76.8KBaud/s, internal data adopts parallel transmission pattern, Manchester's code;
The executive mode of step 4) node and function realize: adopt the JTAG programmable device to carry out the in-circuit emulation and the debugging of node procedure, serial ports programming mode is provided simultaneously, parallel port ISP downloading mode and USB downloading mode, node has been downloaded after the application program, get final product executable operations, and under the control and supervision of terminal controlling platform, finish application task;
Step 5) is carried out the basic boom design of node: the node basic boom is made up of four levels, is respectively from bottom to top: functional part layer, device drive layer, embedded system kernel, application system level;
The description of step 6) expanding node design: system adopts top-down method that the functional part of this node is carried out Module Division, mainly comprises: central primary control processing module, user interface, high-frequency wireless communication module, information sensing module and energy supply module;
Step 7) design central primary control processing module: the central primary control processing module is by SPI communicator module, carry out data communication and signal transmission with the high-frequency wireless communication module, simultaneously, utilize A/D conversion submodule, the various heat transfer agents that the information sensing module is collected are converted into the form of the signal of telecommunication, and be transferred to the user interface of handling as master control, thereby realize the demonstration of quantitative and qualitative heat transfer agent by the asynchronous serial submodule;
Step 8) design high-frequency wireless communication module: the high-frequency wireless communication module of node has comprised low noise amplifier, frequency mixer, filter circuit, frequency divider, modulator-demodulator, phase discriminator, low pass filter, module is with heat transfer agent, mode with wireless frequency spectrum, on the frequency range of 300MHZ-1000MHZ, transmit, simultaneously, reception is from the heat transfer agent transmission of other node in the ad-hoc network, and in real time and base-station node link up;
Step 9) design information sensing module: the information sensing module adopts pluggable Component Design technology, various Application in Sensing is designed to sensing module capable of being combined, the transducing signal line links to each other with the mould/number conversion pin of central primary control processing module by the fixed slot interface, in system's running, the sensing module of corresponding application-specific can be realized the collection and the processing of corresponding information;
Step 10) design energy supply module: the energy supply module provides energy resource supply for above-mentioned each module, four kinds of different working methods of transmission, reception, dormancy, standby at system, corresponding energy resource supply mode is provided, when the operating state of user's switching node, system will call corresponding energy supply mode automatically, and node is operated under the corresponding pattern;
Choosing of step 11) node peripheral components: according to the characteristics of node self and the oneself requirement of wireless sensor network, the selection of the peripheral components of node, substantially realized as all functions of organizing the node in the wireless network certainly, but these devices comprise digitlization I/O device, external memory device, A/D converter spare, external crystal-controlled oscillation system, active antenna;
The circuit design of step 12) node and realization: node circuit adopts the digitlization standard design, and element all adopts the SMD encapsulation of 0805 type, has realized the conversion between TTL signal and the RS-232 signal between being connected of node and PC serial ports; Main controlled node has been set up the buffering between high speed signal and the low speed signal, and node adopts the strategy of doubling plate wiring, is undertaken by the mode that hand wired and self routing combine;
Interface design between the step 13) node module: node interface mainly is made up of three parts, is respectively series arrangement bus coupling part, bi-directional synchronization data-signal coupling part, and optional part of detecting;
The power supply design of step 14) node: node provides 4 kinds of variable mode of operations, is respectively sleep pattern, sending mode, receiving mode, battery saving mode, simultaneously, designed a kind of comparatively accurate power supply early warning mechanism, can finish real-time monitoring for self supply power voltage;
The power managed design of step 15) node: the power managed of node has mainly comprised the system level power consumption management, and the software code level is optimized, and register transfer optimization and rear end comprehensive wiring are optimized;
Step 16) extensibility of node design: node has been reserved sufficient interface in design process, comprises surpassing 30 main control module input/output interfaces, so that calling and expand from now on, simultaneously, node adopts the hot swappable sensing element, is convenient to the continuity exploitation of subsequent product;
Step 17) reliability of nodes and anti-interference design: the high-frequency suppressing aspect, node loads filter capacitor in HFS design, on IC and connect high frequency capacitance, adopts intensive wiring to reduce the high-frequency noise emission; Aspect the propagation path inhibition, design of node goes out to have the stabilized power supply of filter circuit, is isolated between I/O mouth and noise source, simultaneously, interference source is separated with Sensitive Apparatus;
Step 18) Design of System Software of node: the harmonious operation of all real-time tasks of the system software controls of node, system is according to mission requirements, carry out resource management, Message Processing, task scheduling, abnormality processing, and distribute priority, system is according to the priority of each task, dynamically switches and dispatches;
Step 19) software reliability of node design: adopt digital filtering that suppresses superposition noise on signal path and the method that reduces redundant instruction in the design of node, adopt reduced instruction set;
Step 20) software debugging of node: node uses AVR Studio to carry out software debugging, allow the user to carry out emulation of AVR online in real time or simulation, before carrying out emulation, but use third party's compiler that source file is compiled as the .cof file of emulation .elf file or .hex file;
Step 21) the system-Level software emulation of node: node adopts VMLAB to carry out system-Level software emulation, in the software emulation stage, by building of hardware and software platform, the virtual simulated environment of a node actual motion, by simulated environment, function that can clear and definite node realizes;
Step 22) the system-level simulation hardware of node: node uses the JTAG in-circuit emulator to finish simulation hardware, by firing platform, application program is fired in the node, finishes application function:
Step 23) download of node application program and execution: design of node 3 kinds of downloading modes, be respectively that parallel port ISP downloads, USBISP downloads and JTAG downloads, ISP can be undertaken by the download line that node attaches; JTAG downloads and is mainly undertaken by JTAGICE.
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