CN102595655A - Physical development platform for wireless sensing network - Google Patents
Physical development platform for wireless sensing network Download PDFInfo
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- CN102595655A CN102595655A CN2012100193293A CN201210019329A CN102595655A CN 102595655 A CN102595655 A CN 102595655A CN 2012100193293 A CN2012100193293 A CN 2012100193293A CN 201210019329 A CN201210019329 A CN 201210019329A CN 102595655 A CN102595655 A CN 102595655A
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Abstract
The invention relates to a physical development platform for a wireless sensing network. The physical development platform comprises a mother board, a main control and information processing module, a radio-frequency module, a sensing information acquiring module and a power supply management module, wherein bus interfaces are arranged on the mother board; the main control and information processing module, the radio-frequency module, the sensing information acquiring module and the power supply management module are respectively arranged on the mother board through the bus interfaces; the main control and information processing module is respectively connected with the radio-frequency module, the sensing information acquiring module and the power supply management module and is used for controlling the modules on the mother board; the sensing information acquiring module is used for acquiring information through each sensor; the radio-frequency module is used for finishing direct transmission of sensing information; and the power supply management module is used for supplying power for each module on the mother board. The physical development platform for the wireless sensing network is standardized and modularized.
Description
Technical field
The present invention relates to the technology of Internet of things field, particularly relate to a kind of wireless sense network physics development platform.
Background technology
Wireless sensor network (Wireless Sensor Network; Be called for short " WSN ") be by having radio communication; " intelligence " network that the microsensor node of perception and computing capability is formed; It relates to, and multidisciplinary height intersects, the integrated hot research field, forward position of knowledge height, has been widely used in various fields such as military affairs, agricultural, environment measuring, health care, industry, intelligent transportation at present.
The sensor network market demand is wide, and application surface is compared more horn of plenty with the traditional communication industry.The greatest problem that the transducer industrialization faces promptly is how under applied environment diversity precondition, extracts the relative commonality key element, realizes that in the equipment aspect general characterization manufactures and designs, and the application scenarios of horn of plenty provides device level support efficiently.
The application of sensor network is extremely extensive; Different application has proposed the great requirement of difference to equipment; To obviously increase equipment development cycle, system research and development and the lower deployment cost of sensing network undoubtedly to the sensor network appliance of every kind of each self application of specific application development, be difficult to use fast up-to-date technological achievement to improve systematic function.Simultaneously,, keep synchronous, upgrade, must adopt standardization, modular open platform design philosophy to design with current advanced technology for making platform owing to the sensor network correlation technique is maked rapid progress.
Summary of the invention
Technical problem to be solved by this invention provides a kind of wireless sense network physics development platform, realizes the standardization and the modularization of wireless sense network physics development platform.
The technical solution adopted for the present invention to solve the technical problems is: a kind of wireless sense network physics development platform is provided, comprises motherboard, said motherboard is provided with EBI; Said wireless sense network physics development platform also comprises respectively and is installed in master control and message processing module, radio-frequency module, perception information acquisition module and power management module on the motherboard through EBI on the motherboard; Said master control and message processing module link to each other with power management module with radio-frequency module, perception information acquisition module respectively; Said master control and message processing module are used to control each module on the motherboard; Said perception information acquisition module is used for obtaining information through various transducers; Said radio-frequency module is used to accomplish perception information directly to be transmitted; Said power management module is used to each module for power supply on the motherboard.
Wireless sense network physics development platform also comprises through EBI on the motherboard and is installed in the perception information processing module on the motherboard; Said perception information processing module also links to each other with said perception information acquisition module with master control and message processing module respectively, is used for the information that the perception information acquisition module obtains is handled.
Wireless sense network physics development platform also comprises through EBI on the motherboard and is installed in the Peripheral Interface module on the motherboard; Said Peripheral Interface module also links to each other with said master control and message processing module.
Said EBI comprises interconnected bus interface, global bus's interface and the reconfigurable EBI of FPGA; Said interconnected bus interface is used to realize link to each other between each module; Said global bus interface comprises overall parallel bus interface, overall serial bus interface and overall GPIO EBI; Said overall parallel bus interface is used to realize that the big data quantity between each module reads, and said overall serial bus interface is used for each module status is configured; The reconfigurable EBI of said FPGA is used for undefined function and expanded function.
The mode that said EBI adopts interconnected bus interface priority principle and bus to isolate the principle combination is carried out work.
Adopt the mode of connector to link to each other between said motherboard and each module.
Said radio-frequency module is the circuit that RF transceiver is formed.
Said radio-frequency module comprises baseband chip and radio-frequency front-end; Said baseband chip directly is connected with main control module as first daughter board, and radio-frequency front-end directly is buckled on first daughter board as two daughter boards.
Beneficial effect
Owing to adopted above-mentioned technical scheme; The present invention compared with prior art; Have following advantage and good effect: the present invention takes the modular design method that disperses; The each several part functional module at first realizes independent debugging typing, and tentatively accomplishes the system integration, time and the cost risk of avoiding conceptual phase to take integrated design to bring; Design risk and construction cycle all are reduced or shorten, and satisfy the diversified demand characteristic and its quick reaction capability to different demands of sensor network industry simultaneously.Each functional module function is independent among the present invention, can verify separately, and the bus through three types of different levels realizes interconnection between each functional module, accomplishes functional verification and reconfigurable design between each functional part.This type general character equipment and module through simple assembling, can be various Application Design specific aim application products through carrying out secondary development with IDE.
Description of drawings
Fig. 1 is a physical platform functional block diagram of the present invention.
Embodiment
Below in conjunction with specific embodiment, further set forth the present invention.Should be understood that these embodiment only to be used to the present invention is described and be not used in the restriction scope of the present invention.Should be understood that in addition those skilled in the art can do various changes or modification to the present invention after the content of having read the present invention's instruction, these equivalent form of values fall within the application's appended claims institute restricted portion equally.
Execution mode of the present invention relates to a kind of wireless sense network physics development platform; As shown in Figure 1; The physics development platform realizes idea of modular according to the sensor network appliance hardware structure; Sensor device is divided into the motherboard based on EBI, and master control and information processing, obtains several sub-systems such as interface, radio frequency, base band, agreement, storage and Peripheral Interface, power management and Clock management.Its technical thought has fully satisfied the diversified demand characteristic and its quick reaction capability to different demands of sensor network industry.
The parts integrated level of module, degree of specialization are higher, can realize and the docking of motherboard through simply plugging device.Always class is more and perception information interface and Peripheral Interface are owing to relate to transducer, peripheral hardware, and removing on the motherboard provides external components commonly used as far as possible, and most function is with the embodied of expansion interface.
Realize on the motherboard that the intermodule interconnection comprises three types of buses, intermodule dedicated interconnection bus, global bus, the reconfigurable bus of FPGA.Intermodule dedicated interconnection bus only realizes the direct interconnection between two generic modules; For example master control and message processing module and Peripheral Interface, perception information processing module, perception information obtain the dedicated interconnection interface between the interface; Dedicated interconnection interface between perception information processing module and the perception information acquisition module, this type interconnect interface generally have clear and definite semiotic function definition.Global bus is meant overall parallel bus, universal serial bus and overall GPIO; Parallel bus is used to realize that the big data quantity between a plurality of modules reads; Universal serial bus is used for a plurality of module status are configured; Generally be not used in transfer of data, this type interconnect interface generally has clear and definite semiotic function definition.The reconfigurable bus of FPGA is mainly used in undefined function and expanded function; Master control and message processing module are expanded through the FPGA bus functionality; Global bus realizes the expansion of associated bus lines function through connecting FPGA, and master control and message processing module are through the undefined function expansion of FPGA special purpose interface implementation part.This type interconnect interface does not generally have clear and definite semiotic function definition, can be according to the practical situation reconfigurable design.
The design principle of three types of buses on physics development platform motherboard comprises two principles.One of which is a dedicated interconnection trunk priority principle, and promptly each module uses bus to be principle with the dedicated interconnection trunk priority in design process, is global bus and the reconfigurable bus of FPGA secondly, and both priority of back are according to circumstances decided.It two is that bus isolates principle; Promptly for ease of power consumption test and function expansion, the parts and the 2G in the Peripheral Interface, 3G, the serial ports that more than are defined as module change network interface, GPS; Modules such as SD card all can realize the bus isolation through plugging; Directly be placed on the parts on the motherboard for part, used buses isolator spare (for example 7416245 chips) and realize isolating, the FPGA interconnect equipment does not need to isolate.
The design principle of power source path on the physics development platform comprises two principles.To be power module can realize independent can the measurement to the power source path of each module to one of which on motherboard.Its two on the motherboard fixedly components and parts and Peripheral Interface device power source provide one the tunnel to design specially from power module, this road power supply need not carry out power consumption test.
Concrete, the physics development platform comprises following module:
A, motherboard
Adopt the mode of connector, accomplishing needs interconnecting of mutual signal between each functional module.Because each intermodule needs mutual signal many, and has uncertainty,, " the soft line " that can change at any time to be provided also so not only fixing hardwired will be provided on the motherboard." soft line " realizes that via a slice large-scale F PGA on the mainboard FPGA program loads through the special-purpose JTAG mouth that is arranged on the motherboard.For the convenience of debugging, be provided with reset key on the motherboard corresponding to each module.FPGA on the motherboard is also external smaller screen is used for some configuration result of display master blank, and is very directly perceived.
Because identical peripheral hardware will mate different CPU, on motherboard, also be provided with the level shifter interface of voltage controlled, this voltage is realized through the software-controllable voltage of power supply daughter board.
B, main control module
Master control and message processing module are the cores of whole flat; Because adopted modularized design; Peripheral hardware separates with master control borad, and this master control borad can insert multiple CPU master control borad as required, like i.MX27 master control borad, AT9263 master control borad, ST107 master control borad, MSP430 master control borad and PIC128 master control borad etc.; Feature richness is selected various.
This module is accomplished the controlled function to all modules on the platform as required, and the external interface of the overwhelming majority is provided simultaneously.This module is necessary in most cases.When perception information does not need complex process, take following path: perceptual signal--＞analog signal conditioner plate--＞association disposable plates--＞master control borad---＞wireless device, accomplish the work that perception information obtains and transmits.When perception information needs complex process, take following path: perceptual signal--＞analog signal conditioner plate--＞master control borad---＞wireless device, accomplish the work that perception information obtains and transmits.
The CPU of main control module selects corresponding processor (low performance single-chip microcomputer MSP430 series, middle performance processor Cortex according to applied environment
TM-M3, high-performance processor ARM926EJ-S
TM); Connect with radio-frequency module through serial line interface (low-power consumption RF) or parallel interface (high speed RF); Connect (analog signal conditioner plate) through serial or parallel interface with perception information acquisition module; Connect with power panel through serial line interface, connect with Co-processor Module DSP through serial or parallel interface.This module carries debugging interface, and simultaneously the bus via self expands various interface, like serial ports, 485 mouthfuls, storage card slot, network interface, USB mouth etc.
C, Co-processor Module
The perception information processing module also is the pith of this platform, takes modularized design, inserts and handle various perceptual signals, and information processing board has multiple choices as required, like DM365 disposable plates, C6467 disposable plates etc.
Need do that information synergism is handled or the big especially Co-processor Module (DSP/RISC) that needs of amount of calculation of sensing amount when handling when perceptual signal, then adopt the following path of handling: perceptual signal--＞perceptual signal conditioning plate--＞association disposable plates--＞master control borad---＞wireless device.When the processing of perceptual signal is simple relatively, also can take following path: perceptual signal--＞association disposable plates--＞master control borad---＞wireless device.This module is connected with main control module through parallel interface or serial line interface, connects (signal regulating panel) through parallel interface or serial line interface with perception information acquisition module.This module carries debug port, when main control module does not exist, can accomplish the work of main control module.
D, radio-frequency module
Wireless device district, right side integrates high speed wireless device and various low-consumption wireless equipment, and the 2G/3G wireless device, accomplishes the transfer function of the various perception informations after physical platform is handled.
This module can be the circuit that RF transceiver is formed according to the difference of using, and also can be radio-frequency front-end+baseband chip.When this module is RF transceiver, simple relatively, only need be according to the interface requirements of rf chip, the direct connection with main control module gets final product.When this module comprised baseband chip+radio-frequency front-end, baseband chip and peripheral circuit thereof were made a daughtercard board, directly are connected with main control module, and radio-frequency front-end is also made a daughtercard board, directly is buckled on the baseband board.
E, power management module
Power management module is accomplished the function of supplying power of whole plate, and it adopts simple processor (MSP430), can control the output voltage of power panel, to make things convenient for the use of motherboard and each module.Power panel also links to each other with master control borad through serial ports, accepts the control of master control borad.
F, perception information acquisition module
This module is obtained information through various transducers, and the analog signal of obtaining is sent to Co-processor Module or main control module and carries out information processing after signal regulating panel carries out some necessary processing.
Table 1 typical case development general character module declaration table
Be not difficult to find; The present invention takes the modular design method that disperses; The each several part functional module at first realizes independent debugging typing, and tentatively accomplishes the system integration, time and the cost risk of avoiding conceptual phase to take integrated design to bring; Design risk and construction cycle all are reduced or shorten, and satisfy the diversified demand characteristic and its quick reaction capability to different demands of sensor network industry simultaneously.Each functional module function is independent among the present invention, can verify separately, and the bus through three types of different levels realizes interconnection between each functional module, accomplishes functional verification and reconfigurable design between each functional part.This type general character equipment and module through simple assembling, can be various Application Design specific aim application products through carrying out secondary development with IDE.
Claims (8)
1. a wireless sense network physics development platform comprises motherboard, it is characterized in that said motherboard is provided with EBI; Said wireless sense network physics development platform also comprises respectively and is installed in master control and message processing module, radio-frequency module, perception information acquisition module and power management module on the motherboard through EBI on the motherboard; Said master control and message processing module link to each other with power management module with radio-frequency module, perception information acquisition module respectively; Said master control and message processing module are used to control each module on the motherboard; Said perception information acquisition module is used for obtaining information through various transducers; Said radio-frequency module is used to accomplish perception information directly to be transmitted; Said power management module is used to each module for power supply on the motherboard.
2. wireless sense network physics development platform according to claim 1 is characterized in that, also comprises through EBI on the motherboard being installed in the perception information processing module on the motherboard; Said perception information processing module also links to each other with said perception information acquisition module with master control and message processing module respectively, is used for the information that the perception information acquisition module obtains is handled.
3. wireless sense network physics development platform according to claim 1 is characterized in that, also comprises through EBI on the motherboard being installed in the Peripheral Interface module on the motherboard; Said Peripheral Interface module also links to each other with said master control and message processing module.
4. according to the described wireless sense network physics of arbitrary claim development platform among the claim 1-3, it is characterized in that said EBI comprises interconnected bus interface, global bus's interface and the reconfigurable EBI of FPGA; Said interconnected bus interface is used to realize link to each other between each module; Said global bus interface comprises overall parallel bus interface, overall serial bus interface and overall GPIO EBI; Said overall parallel bus interface is used to realize that the big data quantity between each module reads, and said overall serial bus interface is used for each module status is configured; The reconfigurable EBI of said FPGA is used for undefined function and expanded function.
5. wireless sense network physics development platform according to claim 4 is characterized in that, the mode that said EBI adopts interconnected bus interface priority principle and bus to isolate the principle combination is carried out work.
6. according to the described wireless sense network physics of arbitrary claim development platform among the claim 1-3, it is characterized in that, adopt the mode of connector to link to each other between said motherboard and each module.
7. wireless sense network physics development platform according to claim 1 is characterized in that, said radio-frequency module is the circuit that RF transceiver is formed.
8. wireless sense network physics development platform according to claim 1 is characterized in that said radio-frequency module comprises baseband chip and radio-frequency front-end; Said baseband chip directly is connected with main control module as first daughter board, and radio-frequency front-end directly is buckled on first daughter board as two daughter boards.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105764160A (en) * | 2014-12-15 | 2016-07-13 | 镇江市星禾物联科技有限公司 | General internet-of-thing device |
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| CN101009623A (en) * | 2007-01-29 | 2007-08-01 | 南京邮电大学 | A wireless sensor network node and its implementation method |
| CN101102242A (en) * | 2007-07-27 | 2008-01-09 | 浙江大学 | Modular wireless sensor network node based on ZigBee |
| KR20090116531A (en) * | 2008-05-07 | 2009-11-11 | 세종대학교산학협력단 | Sensor node and ncap system structure, method for controlling a data thereof |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101009623A (en) * | 2007-01-29 | 2007-08-01 | 南京邮电大学 | A wireless sensor network node and its implementation method |
| CN101102242A (en) * | 2007-07-27 | 2008-01-09 | 浙江大学 | Modular wireless sensor network node based on ZigBee |
| KR20090116531A (en) * | 2008-05-07 | 2009-11-11 | 세종대학교산학협력단 | Sensor node and ncap system structure, method for controlling a data thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105764160A (en) * | 2014-12-15 | 2016-07-13 | 镇江市星禾物联科技有限公司 | General internet-of-thing device |
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Application publication date: 20120718 |