CN101001378A - Method of quick discrete cosine transform and quick reverse discrete cosine transform and its device - Google Patents

Method of quick discrete cosine transform and quick reverse discrete cosine transform and its device Download PDF

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CN101001378A
CN101001378A CN 200610006529 CN200610006529A CN101001378A CN 101001378 A CN101001378 A CN 101001378A CN 200610006529 CN200610006529 CN 200610006529 CN 200610006529 A CN200610006529 A CN 200610006529A CN 101001378 A CN101001378 A CN 101001378A
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values
output valve
mapping relations
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刘建国
汪国有
戴声奎
叶登攀
孟新建
郑建铧
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Huawei Technologies Co Ltd
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Abstract

This invention discloses a quick scattered cosine transforming method including: localizing transformation sub-processes of the output values of different input values Xa and Xb from the XaWa+XbWb operation, and Wa and Wb are different constant values based on the cosine operation, to each localized transformation sub-process, the XaWa+XbWb operation is turned to the operation of n-sigma-i=0 (aiWa + biWb)2n-I, and both ai and bi are zero or 1 by resolving the input value Xa and Xb to the form of binary, setting up a mapping relation set between the value combination of ai and bi based on different numbers and its corresponding aiWa+biWb in advance during the process, when requiring output values of the n-sigma-i=0 (aiWa+ biWb)2n-I operation later, it can get the corresponding aiWa +BiWb value from index in the corresponding mapping relation set based on the number combination and gets the output value of each sub-process combined with an offset accumulated process.

Description

Fast discrete cosine transform and quick reverse discrete cosine transform method and device thereof
Technical field
The present invention relates to the discrete cosine transform (DCT in the communications field, Discrete Cosine Transform) technology and reverse discrete cosine transform (IDCT, Inverse Discrete Cosine Transform) technology especially relates to a kind of fast discrete cosine transform and quick reverse discrete cosine transform method and device thereof.
Background technology
Since Ahmed and Rao have proposed discrete cosine transform (DCT in 1974, Discrete CosineTransform) since the definition, the important technology that discrete cosine transform just becomes the signal processing that is widely used in the communications field, image processing, handles especially for compress speech and image compression encoding and decoding, so the dct transform technology all is the research focus of international academic community and high-tech industry circle all the time.
Because the demand of real-time communication characteristic, be used for (the JPEG of rest image panel of expert that the rest image compression coding and decoding is handled, Joint Picture Expert Group) in the standard, and be used for (the MPEG of dynamic image panel of expert that the dynamic image compression coding and decoding is handled, Motion Pictures Expert Group) all adopted dct transform in the standard, the feasible thus research to the DCT fast algorithm more seems significant.
Because conventional DCT algorithm has been used more multiplying and add operation, because multiplying is unusual consume system resources in calculating process, as to the consumption of computer software and hardware resource etc., multiplying simultaneously is also more consuming time, makes the DCT calculating process show slowly slightly.Therefore the DCT fast algorithm of follow-up proposition all is to reduce multiplying number of times in the calculating process and add operation number of times as main purpose, to refer in particular to the operation times that reduces multiplication.In recent years, various DCT fast algorithms emerge in an endless stream, but mostly are based on dish-shaped computational methods, reduce redundancy in the computational process with the periodicity that makes full use of trigonometric function, thereby reach the quick computation purpose of DCT.
At present, proposed a kind of fast algorithm (particular content sees this book P420-424 for details) of correspondence in " (fast algorithm " book of being write by people such as Jiang Zengrong, Ceng Yonghong and Yu Pinneng at discrete cosine transform Type II (the following DCT-II of abbreviating as), the concise and to the point derivation principle and the derivation result of the DCT-II fast algorithm of putting down in writing in this book are as follows:
If x (n) is real sequence, N=2 t(t>0), then the quick computational process of DCT-II is as follows:
C II ( k ) = α k 2 N Σ n = 0 N - 1 x ( n ) cos k ( 2 n + 1 ) π 2 N , (k=0,1,…,N-1)
Note X ( k ) = Σ n = 0 N - 1 x ( n ) cos k ( 2 n + 1 ) π 2 N , . . . ( 1 )
Then have C II ( k ) = α k 2 N X ( k ) . (k=0,1,…,N-1)
At first consider the even number item of X (k):
X ( 2 k ) = Σ n = 0 N - 1 x ( n ) cos k ( 2 n + 1 ) π N
= Σ n = 0 N / 2 - 1 x ( n ) cos k ( 2 n + 1 ) π N + Σ n = N / 2 N - 1 x ( n ) cos k ( 2 n + 1 ) π N
= Σ n = 0 N / 2 - 1 [ x ( n ) + x ( N - n - 1 ) ] cos k ( 2 n + 1 ) π N , (k=0,1,…,N/2-1) (2)
Consider the odd term of X (k) once more:
X ( 2 k + 1 ) = Σ n = 0 N - 1 x ( n ) cos ( 2 k + 1 ) ( 2 n + 1 ) π 2 N , (k=0,1,…,N/2-1)
So X ( 2 k + 1 ) + X ( 2 k - 1 ) = Σ n = 0 N - 1 x ( n ) [ cos ( 2 k + 1 ) ( 2 n + 1 ) π 2 N + cos ( 2 k - 1 ) ( 2 n + 1 ) π 2 N ]
= Σ n = 0 N - 1 2 x ( n ) cos ( 2 n + 1 ) π 2 N cos k ( 2 n + 1 ) π N
= Σ n = 0 N / 2 - 1 2 [ x ( n ) - x ( N - n - 1 ) ] cos ( 2 n + 1 ) π 2 N cos k ( 2 n + 1 π ) N ,
(k=1,2,…,N/2-1) (3a)
Wherein:
X ( 1 ) = Σ n = 0 N - 1 x ( n ) cos ( 2 n + 1 ) π 2 N
= Σ n = 0 N / 2 - 1 [ x ( n ) - x ( N - n - 1 ) ] cos ( 2 n + 1 ) π 2 N . . . ( 3 b )
Like this, just can obtain following recursive algorithm by following formula (2), (3a) with (3b):
Step1. remember g (n)=x (n)+x (N-n-1),
h ( n ) = 2 cos ( 2 n + 1 ) π 2 N [ x ( n ) - x ( N - n - 1 ) ] ,
(n=0,1,…,N/2-1) (4)
Step2. the quick computational process of the DCT-II of then N being ordered just can be decomposed into two parts that even number item and odd term among 0~N-1 are calculated respectively, and every part is the quick computational process of DCT-II that N/2 is ordered:
G ( k ) = Σ n = 0 N / 2 - 1 g ( n ) cos k ( 2 n + 1 ) π N The even number item
H ( k ) = Σ n = 0 N / 2 - 1 h ( n ) cos k ( 2 n + 1 ) π N . Odd term
(k=0,1,…,N/2-1) (5)
Step3. then can be designated as following expression to the quick computational process of DCT-II of even number item and odd term among 0~N-1:
X(2k)=G(k), (k=0,1,…,N/2-1),
X(2k+1)=H(k)-X(2k-1),(k=1,2,…,N/2-1)
X ( 1 ) = 1 2 H ( 0 ) . . . ( 6 )
As above process, so just the quick computational process of DCT-II that a N is ordered is decomposed into the DCT-II that two N/2 order and calculates subprocess fast, so have:
M ( N ) = 2 M ( N 2 ) + N 2 , Multiplying number of times criterion during N point DCT-II calculates fast
A ( N ) = 2 A ( N 2 ) + 3 2 N - 1 . Add operation number of times criterion during N point DCT-II calculates fast
Recycle the aforementioned calculation process, till calculating 2 points (being N=2) conversion, M (2)=1 wherein, A (2)=2 so just obtains:
M ( N ) = 1 2 N log 2 N , Multiplying number of times computing formula during N point DCT-II calculates fast
A ( N ) = 3 2 N log 2 N - N + 1 . Add operation number of times computing formula during N point DCT-II calculates fast
(7)
Owing to normally 8 * 8 two-dimensional digital image is carried out discrete cosine transform in the world at present and the inverse discrete cosine transform encoding and decoding are handled, the encoding and decoding of two-dimensional digital image processing often just can be dissolved the digital picture that becomes several row and column one dimensions and carries out like this.
Below in conjunction with the derivation result that the above-mentioned DCT-II that provides calculates fast, enumerate the quick computational process of DCT-II of N=8:
C II ( k ) = 1 2 α k X ( k ) , (k=0,1,…,7)
X ( k ) = Σ x = 0 7 x ( n ) cos k ( 2 n + 1 ) π 16 , (k=0,1,…,7)
So have:
Step1. calculate
g(n)=x(n)+x(7-n),
h ( n ) = 2 cos ( 2 n + 1 ) π 16 [ x ( n ) - x ( 7 - n ) ] , (n=0,1,2,3);
Step2. carrying out 4 DCT-II respectively calculates fast:
G ( k ) = Σ n = 0 3 g ( n ) cos k ( 2 n + 1 ) π 8 ,
H ( k ) Σ n = 0 3 h ( n ) cos k ( 2 n + 1 ) π 8 , (k=0,1,2,3)
Step3. and then calculate
X(2k)=G(k),(k=0,1,2,3),
X ( 1 ) = 1 2 H ( 0 ) ,
X(2k+1)=H(k)-X(2k-1),(k=1,2,3).
Please refer to Fig. 1, this figure uses present DCT-II to calculate principle fast to 8 input and output result schematic diagrams of carrying out transform operation, wherein left side numerical value is input value, rightmost side intersection point for each row oblique line and straight line is an output valve, then according to the aforementioned calculation process, the output result of the first row intersection point is:
x(0)+x(7),x(1)+x(6),x(3)+x(4),x(2)+x(5),2C 16 1[x(0)-x(7)],2C 16 3[x(1)-x(6)],2C 16 7[x(3)-x(4)],2C 16 5[x(2)-x(5)];
The output result of the output result of the output result of the output result of secondary series intersection point, the 3rd row intersection point, the 4th row intersection point and the 5th row intersection point and the like, the output result's of next column intersection point input value is asked in the output result of previous column intersection point and then conduct.
The C among Fig. 1 wherein m nExpression
Figure A20061000652900101
This shows, calculate principle fast based on present DCT-II and will finish 12 multiplyings and 29 sub-addition computings 8 processes of carrying out transformation calculations.Though it is the quick account form of present a kind of more common DCT that DCT-II calculates fast, but carry out the rapid DCT conversion process for each N=8 point and all need to carry out cosine function value floating-point multiplication 12 times, like this one 8 * 8 image is carried out just need finishing 192 times when the dct transform encoding and decoding are handled cosine function value floating-point multiplication, because multiplying is unusual consumption of natural resource, wherein the resource of Xiao Haoing comprises to the consumption of operation time with to consumption of system hardware and software resource etc., so the quick account form of this DCT is the requirement that is difficult to satisfy the modern communications business.
In like manner, give DCT-III Fast transforms calculating process in the prior art, detailed process is as follows:
Work as N=2 tWhen (t>0), establishing X ' is real sequence (n),
x ( k ) = 2 N Σ n = 0 N - 1 α n X ′ ( n ) cos n ( 2 k + 1 ) π 2 N , (k=0,1 ... N-1); Calculate for convenient, establish
X ( n ) = 2 N α n X ′ ( n ) , (n=0,1,...N-1) (8)
So, x ( k ) = Σ n = 0 N - 1 X ( n ) cos n ( 2 k + 1 ) π 2 N , (k=0,1,...N-1) (9)
Because N=2 t, have x ( k ) = Σ n = 0 N / 2 - 1 X ( 2 n ) cos n ( 2 k + 1 ) π N + Σ n = 0 N / 2 - 1 X ( 2 n + 1 ) cos ( 2 k + 1 ) ( 2 n + 1 ) π 2 N
□g′(k)+h′(k), (k=0,1,...N-1)
Consider the first half and half output of back, have
x(k)=g′(k)+h′(k),(k=0,1,…N/2-1)
x ( N - k - 1 ) = g ′ ( N - k - 1 ) + h ′ ( N - k - 1 )
= Σ n = 0 N / 2 - 1 X ( 2 n ) cos n ( 2 k + 1 ) π N - Σ n = 0 N / 2 - 1 X ( 2 n + 1 ) cos ( 2 k + 1 ) ( 2 n + 1 ) π 2 N
= g ′ ( k ) - h ′ ( k ) , ( k = 0,1 , . . . N / 2 - 1 )
Therefore have x (k)=g ' (k)+h ' (k), (k=0,1 ... N/2-1) (k=0,1 ... N/2-1) (10a)
x(N-k-1)=g′(k)-h′(k),(k=0,1,…N/2-1) (k=0,1,…N/2-1) (10b)
Find out that easily g ' is the DCT-III (only differing from an invariant) that a N/2 is ordered (k), and
2 cos ( 2 k + 1 ) π 2 N h ′ ( k )
= Σ n = 0 N / 2 - 1 X ( 2 n + 1 ) 2 cos ( 2 k + 1 ) π 2 N cos ( 2 k + 1 ) ( 2 n + 1 ) π 2 N
= Σ n = 0 N / 2 - 1 X ( 2 n + 1 ) [ cos ( 2 k + 1 ) nπ N + cos ( 2 k + 1 ) ( n + 1 ) π N
= Σ n = 0 N / 2 - 1 X ( 2 n + 1 ) cos ( 2 k + 1 ) nπ N + Σ n = 1 N / 2 - 1 X ( 2 n - 1 ) cos ( 2 k + 1 ) nπ N
= Σ n = 0 N / 2 - 1 [ X ( 2 n + 1 ) + X ( 2 n - 1 ) ] cos ( 2 k + 1 ) nπ N ( k = 0,1 , . . . N / 2 - 1 )
Wherein establish X (1)=0.
According to above analysis, obtain the following recursive algorithm of DCT-III Fast transforms:
Step1. calculate
G(n)=X(2n), (11a)
H(n)=X(2n+1)+X(2n-1),(n=0,1,…N/2-1) (12b)
X (1)=0 wherein;
Step2. calculate two N/2 point DCT-III Fast transforms:
g ( k ) = Σ n = 0 N / 2 - 1 G ( n ) cos ( 2 k + 1 ) nπ N , . . . ( 12 a )
h ( k ) = Σ n = 0 N / 2 - 1 H ( n ) cos ( 2 k + 1 ) nπ N , (n=0,1,…N/2-1) (12b)
Step3. calculate
x ( k ) = g ( k ) + h ( k ) / 2 cos ( 2 k + 1 ) π 2 N , . . . ( 13 a )
x ( N - k - 1 ) = g ( k ) - h ( k ) / 2 cos ( 2 k + 1 ) π 2 N , . . . ( 13 b )
(k=0,1,…,N-1)
So just a N point DCT-III Fast transforms process is decomposed into two N/2 point DCT-III Fast transforms processes and N/2 multiplication and 3N/2-1 add operation process and calculates, because N=2 t, can use this recursion process that reduces by half repeatedly, till 2 DCT-III Fast transforms.As with M (k), A (k) represents that respectively the needed reality of k point DCT-III Fast transforms takes advantage of number of times and real addition number of times, is then obtained by above-mentioned algorithm:
M ( N ) = 2 M ( N 2 ) + N 2 ,
A ( N ) = 2 A ( N 2 ) + 3 N 2 - 1 ,
Since M (2)=1, A (2)=2, so
M ( N ) = 2 [ 2 M ( N 4 ) + N 4 ] + N 2
= 4 M ( N 4 ) + 2 * N 4 = . . . . . .
= 2 l - 1 M ( 2 ) + ( t - 1 ) N 2
= 1 2 Nt
A ( N ) = 2 [ 2 A ( N 4 ) + 3 N 4 - 1 ] + 3 N 2 - 1
= 4 A ( N 4 ) + 2 * 3 N 2 - ( 1 + 2 ) = . . . . . .
= 2 t - 1 A ( 2 ) + ( t - 1 ) 3 N 2 - ( 1 + 2 + . . . . . . + 2 t - 2 )
= 3 2 Nt - N + 1
Therefore, N=2 tThe multiplication real arithmetic number of times and the addition real arithmetic number of times of the DCT-III Fast transforms of point are respectively:
M ( N ) = 1 2 N log 2 N , . . . ( 14 a )
A ( N ) = 3 2 N log 2 N - N + 1 . . . . ( 14 b )
As shown in Figure 2, the input/output state schematic diagram of the DCT-III Fast transforms processing procedure of ordering for N=8 is established X ' and (n) is the real sequence of N=8 point, supposes:
X ( n ) = 1 2 α n X ′ ( n ) , ( n = 0,1 . . . 7 )
Have x ( k ) = Σ n = 0 7 X ( n ) cos n ( 2 k + 1 ) π 16 ( n = 0,1 , . . . 7 )
According to above-mentioned algorithm, have
Step1. calculate
G(n)=X(2n),
H(n)=X(2n+1)+X(2n-1),(n=0,1,2,3;x(-1)=0)
Step2 calculates
g ( k ) = Σ n = 0 3 G ( n ) cos ( 2 k + 1 ) nπ 8 ,
h ( k ) = Σ n = 0 3 H ( n ) cos ( 2 k + 1 ) nπ 8 , (n=0,1,2,3)
Step3. calculate
x ( k ) = g ( k ) + h ( k ) / 2 cos ( 2 k + 1 ) nπ 16 ,
x ( 7 - k ) = g ( k ) - h ( k ) / 2 cos ( 2 k + 1 ) nπ 16 , (k=0,1,2,3)
The C among Fig. 2 wherein m nExpression
Figure A20061000652900136
This shows, calculate principle fast based on present DCT-III and also will finish 12 multiplyings and 29 sub-addition computings 8 processes of carrying out transformation calculations, like this one 8 * 8 image is carried out just need finishing 192 times when the dct transform encoding and decoding are handled cosine function value floating-point multiplication, equally also there is the very problem of consumption of natural resource, wherein the resource of Xiao Haoing comprises to the consumption of operation time with to consumption of system hardware and software resource etc., so the quick account form of this DCT also is the requirement that is difficult to satisfy the modern communications business.
Wherein in application process, DCT-II Fast transforms and DCT-III Fast transforms are reverse process processes each other.
Summary of the invention
The technical problem to be solved in the present invention is to propose a kind of fast discrete cosine transform method and device thereof, with the multiplying number of times of maximum minimizing discrete cosine transform process, better meets the requirement of modern communications business.
Accordingly, the invention allows for a kind of quick reverse discrete cosine transform method and device thereof.
For addressing the above problem, the technical scheme that the present invention proposes is as follows:
A kind of fast discrete cosine transform method comprises step:
In the discrete cosine transform process, the location is to different input value X a, X bBased on X aW a+ X bW bThe varitron process of output valve, wherein W are asked in computing a, W bBe different constant values based on cos operation;
At each the varitron process that navigates to, by respectively with input value X a, X bDissolve for binary form, with X aW a+ X bW bComputing dissolve for
Figure A20061000652900141
Computing, wherein a i, b iValue is 0 or 1 respectively; And
At in each varitron process
Figure A20061000652900142
Computing is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value;
Follow-up to each varitron process based on When output valve is asked in computing, according to a i, b iThe combinations of values of different values concerns a that indexes correspondence in the group in correspondence mappings iW a+ b iW bValue, and combination displacement accumulation process obtains the output valve of each varitron process.
Preferably, in each mapping relations group, a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bEach bar mapping relations between the value exist with the mapping relations sheet form.
Preferably, described input value X a, X bFor digital signal being carried out the digital signal input value in the compressed encoding processing procedure.
Preferably, described input value X a, X bFor image being carried out image signal value or the picture signal residual values in the compressed encoding processing procedure.
A kind of quick reverse discrete cosine transform method comprises step:
In the reverse discrete cosine transform process, the location is to different input value X a, X bBased on X aW a+ X bW bThe inverse transformation subprocess of output valve, wherein W are asked in computing a, W bBe different constant values based on cos operation;
At each the inverse transformation subprocess that navigates to, by respectively with input value X a, X bDissolve for binary form, with X aW a+ X bW bComputing dissolve for
Figure A20061000652900151
Computing, wherein a i, b iValue is 0 or 1 respectively; And
At in each inverse transformation subprocess
Figure A20061000652900152
Computing is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value;
Follow-up to each inverse transformation subprocess based on
Figure A20061000652900153
When output valve is asked in computing, according to a i, b iThe combinations of values of different values concerns a that indexes correspondence in the group in correspondence mappings iW a+ b iW bValue, and combination displacement accumulation process obtains the output valve of each inverse transformation subprocess.
Preferably, in each mapping relations group, a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bEach bar mapping relations between the value exist with the mapping relations sheet form.
Preferably, described input value X a, X bFor digital signal being carried out the digital signal conversion value in the compression coding and decoding processing procedure.
Preferably, described input value X a, X bFor image being carried out the image coefficient piece element value in the compression coding and decoding processing procedure.
A kind of fast discrete cosine transform device comprises:
Positioning unit is used in the discrete cosine transform process, and the location is to different input value X a, X bBased on X aW a+ X bW bThe varitron process of output valve, wherein W are asked in computing a, W bBe different constant values based on cos operation;
Dissolve the unit, each the varitron process that is used for navigating at described positioning unit is by respectively with input value X a, X bDissolve for binary form, with X aW a+ X bW bComputing dissolve for
Figure A20061000652900154
Computing, wherein a i, b iValue is 0 or 1 respectively;
Mapping relations are set up the unit, be used for the result that dissolves that dissolves the unit according to described, in each varitron process
Figure A20061000652900155
Computing is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value;
Output valve is asked for the unit, be used for follow-up to each varitron process based on
Figure A20061000652900161
When output valve is asked in computing, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of setting up the unit in described mapping relations and is concerned a that indexes correspondence in the group iW a+ b iW bValue, and combination displacement accumulation process obtains the output valve of each varitron process.
Preferably, described mapping relations are set up in each mapping relations group of setting up the unit, and each bar mapping relations exists with the mapping relations sheet form.
Preferably, described output valve is asked for the unit and is specifically comprised:
The index subelement, be used for follow-up to each varitron process based on When output valve is asked in computing, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of setting up the unit in described mapping relations and is concerned a that indexes correspondence in the group iW a+ b iW bValue;
Displacement accumulation process subelement, be used for to each varitron process based on
Figure A20061000652900163
When output valve is asked in computing, each a that indexes in conjunction with described index subelement iW a+ b iW bValue adopts the displacement accumulation process to obtain the output valve of each varitron process.
Preferably, described device is for carrying out the fast discrete cosine transform device that compressed encoding is handled to digital signal.
Preferably, described device is for carrying out the fast discrete cosine transform device that compressed encoding is handled to picture signal.
A kind of quick reverse discrete cosine transform device comprises:
Contrary positioning unit is used in the reverse discrete cosine transform process, and the location is to different input value X a, X bBased on X aW a+ X bW bThe inverse transformation subprocess of output valve, wherein W are asked in computing a, W bBe different constant values based on cos operation;
Contrary dissolve the unit, be used for each inverse transformation subprocess of navigating at described contrary positioning unit, by respectively with input value X a, X bDissolve for binary form, with X aW a+ X bW bComputing dissolve for
Figure A20061000652900171
Computing, wherein a i, b iValue is 0 or 1 respectively;
Inverse mapping relation is set up the unit, is used for according to the described contrary result that dissolves who dissolves the unit, in each inverse transformation subprocess
Figure A20061000652900172
Computing is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value;
Contrary output valve is asked for the unit, be used for follow-up to each inverse transformation subprocess based on
Figure A20061000652900173
When output valve is asked in computing, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of setting up the unit in described inverse mapping relation and is concerned a that indexes correspondence in the group iW a+ b iW bValue, and combination displacement accumulation process obtains the output valve of each inverse transformation subprocess.
Preferably, described inverse mapping relation is set up in each mapping relations group of setting up the unit, and each bar mapping relations exists with the mapping relations sheet form.
Preferably, described contrary output valve is asked for the unit and is specifically comprised:
The reverse index subelement, be used for follow-up to each inverse transformation subprocess based on
Figure A20061000652900174
When output valve is asked in computing, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of setting up the unit in described inverse mapping relation and is concerned a that indexes correspondence in the group iW a+ b iW bValue;
Contrary displacement accumulation process subelement, be used for to each inverse transformation subprocess based on
Figure A20061000652900175
When output valve is asked in computing, each a that indexes in conjunction with described reverse index subelement iW a+ b iW bValue adopts the displacement accumulation process to obtain the output valve of each inverse transformation subprocess.
Preferably, described device is for carrying out the quick reverse discrete cosine transform device that compression coding and decoding is handled to digital signal.
Preferably, described device is for carrying out the quick reverse discrete cosine transform device that compression coding and decoding is handled to picture signal.
The beneficial effect that the present invention can reach is as follows:
Fast discrete cosine transform scheme of the present invention is by in the discrete cosine transform process, and the location is to different input value X a, X bBased on X aW a+ X bW bVaritron process (the W of output valve is asked in computing a, W bBe different constant values based on cos operation), at each the varitron process that navigates to, by respectively with input value X a, X bDissolve for binary form, with X aW a+ X bW bComputing dissolve for Computing (a i, b iValue is 0 or 1 respectively), and in each varitron process
Figure A20061000652900182
Computing is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value; Follow-up to each varitron process based on
Figure A20061000652900183
When output valve is asked in computing, according to a i, b iThe combinations of values of different values concerns a that indexes correspondence in the group in the correspondence mappings of setting up in advance iW a+ b iW bValue, and the conventional displacement accumulation process of combination obtains the output valve of each varitron process.Thereby realized tabling look-up with DCT-II type fast transform approach classical in the prior art and optimization, displacement and accumulate mode combine, carry out the purpose that the DCT Fast transforms is handled, table look-up with the part use that in the dct transform process, needs to do multiplication, displacement and the mode that adds up reach for multiplying, make whole dct transform computational process not have multiplication, therefore the present invention program can be under the prerequisite that guarantees the dct transform operational precision, improve the arithmetic speed of dct transform greatly, and minimizing has been satisfied the demand of modern communications business preferably to the consumption of system hardware and software resource.
In like manner, the quick reverse discrete cosine transform scheme of the present invention's proposition also can reach as above corresponding beneficial effect.
Description of drawings
Fig. 1 calculates principle to 8 input and output result schematic diagrams of carrying out transform operation fast for using present DCT-II;
Fig. 2 handles the input/output state schematic diagram for the DCT-III Fast transforms that N=8 is ordered;
Fig. 3 is the main realization principle flow chart of fast discrete cosine transform method of the present invention;
Fig. 4 is for after using the inventive method principle, the part of doing multiplication in the dct transform process among above-mentioned prior art Fig. 1 is replaced with table look-up, the input/output state schematic diagram of displacement and accumulation process;
Fig. 5 is for utilization the present invention program principle is tabled look-up, displacement and accumulation process are replaced the calculating process schematic diagram of the multiplying in the dct transform process;
Fig. 6 is the input/output state schematic diagram that DCT--III Fast transforms technology is used IDCT Fast transforms principle of the present invention;
Fig. 7 is the main composition structured flowchart of fast discrete cosine transform device of the present invention;
Fig. 8 asks for the concrete composition structural representation of unit for output valve in apparatus of the present invention;
Fig. 9 is the main composition structured flowchart of quick reverse discrete cosine transform device of the present invention;
Figure 10 asks for the concrete composition structural representation of unit for contrary output valve in apparatus of the present invention.
Embodiment
The present invention program is here by calculating principle analysis fast to DCT-II of the prior art, proposition need be done the part of multiplying and use the mode of tabling look-up, being shifted and adding up to handle in the fast discrete cosine transform process, so that whole DCT algorithm process has been avoided multiplying, guarantee that DCT is as a result under the prerequisite of precision thereby be implemented in, accelerate the conversion rate of DCT greatly, and reduce too much consumption the system hardware and software resource.
Be explained in detail below in conjunction with main realization principle, specific implementation process and the corresponding beneficial effect thereof of each accompanying drawing the present invention program.
Please refer to Fig. 3, this figure is the main realization principle flow chart of fast discrete cosine transform method of the present invention, and its main implementation procedure is as follows:
Step S10, in the dct transform process, the location is to different input value X a, X bBased on X aW a+ X bW bThe varitron process of output valve, wherein W are asked in computing a, W bBe respectively different constant values based on cos operation; In addition, input value X a, X bBe generally digital signal is carried out digital signal input value in the compressed encoding processing procedure, as can be for image being carried out two image input signal values in the compressed encoding processing procedure or being the residual values of two image input signals.
Step S20 is at above-mentioned each varitron process that navigates to, by respectively with input value X a, X bDissolve and be binary form, with X aW a+ X bW bComputing dissolve for Computing, wherein a i, b iValue is 0 or 1 respectively;
Step S30 is in each varitron process
Figure A20061000652900202
Computing is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value; Wherein more excellent, in above-mentioned each mapping relations group of setting up, a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bEach bar mapping relations between the value can adopt the mapping relations sheet form to exist, and are specific as follows:
(a i、b i)..................a iW a+b iW b
(0,0)....................0;
(1,0)....................W a
(0,1)....................W b
(1,1)....................W a+W b
Step S40, follow-up to each varitron process based on When output valve is asked in computing, according to a i, b iThe combinations of values of different values concerns a that indexes correspondence in the group in correspondence mappings iW a+ b iW bValue, and combination displacement accumulation process obtains the output valve of each varitron process.
By the invention described above method principle as can be seen, because the present invention program is analyzing in the prior art on the basis of DCT-II type Fast transforms technology, proposed to use the tabling look-up of a kind of optimization, displacement and accumulate mode to substitute, thereby made whole dct transform process not have multiplying the multiplying in the dct transform process.Simultaneously, the present invention program is in order to guarantee the computational accuracy of dct transform, propose to use lookup table mode, finally obtained a kind of DCT Fast transforms scheme of new no multiplying, under the prerequisite that guarantees the dct transform computational accuracy, improved arithmetic speed greatly, and reduced consumption as much as possible the system hardware and software resource.
Because dct transform and reverse discrete cosine transform (IDCT, Inverse Discrete CosineTransform) are widely used in digital signal processing technique field at present, particularly are applied to the digital compression technology field.H.261 and H.263 as in present International Standard of image compression, JPEG, MPEG, the orthogonal transform in the standard all adopts two-dimensional dct (2D-DCT) conversion to realize that especially in the JPEG standard, the 2D-DCT conversion is the most time consuming.Because a 2D-DCT conversion can realize by one dimension DCT (1D-DCT) conversion of row and column, so the present invention discusses the quick calculation method of 1D-DCT conversion here in execution mode.
Because when at present picture signal being carried out the dct transform processing, entire image is divided into a plurality of 8 * 8 subimages does conversion, so the present invention's execution mode part here at first discusses the rapid DCT converter technique of 8 points of one dimension, the rapid DCT converter technique theory of 8 points of one dimension that can and then the present invention program be implemented in is generalized to the situation of two dimension 8 * 8 subimages then.
Please refer to Fig. 4, this figure is after using the inventive method principle, the part of doing multiplication in the dct transform process among above-mentioned prior art Fig. 1 replaced with table look-up, the input/output state schematic diagram of displacement and accumulation process, wherein asking for output and need to use in the process of T1~T6 as a result the calculating process of the inventive method here, below at first with output as a result T1 be that example is described in detail the rapid DCT converter technique among the present invention program.
High order end is represented 8 image signal values importing among Fig. 4, low order end is 8 picture signal output valves finishing dct transform of output, it is emphasized that, here different with Fig. 1 of the prior art, because the low order end dateout can differ an invariant with last dct transform result value among above-mentioned Fig. 1 of the prior art.
Wherein exporting as a result, T1 obtains according to following computing formula computing:
T 1 = [ x ( 0 ) - x ( 7 ) ] 2 13 2 C 16 1 + [ x ( 3 ) - x ( 4 ) ] 2 13 2 C 16 7 ;
Here make in the following formula: x 1=x (0)-x (7), w 1 = 2 13 2 C 16 1 , x 2=x(3)-x(4), w 2 = 2 13 2 C 16 7 ;
Thereby following formula can be for conversion into: T1=x 1w 1+ x 2w 2(x wherein 1, x 2Be the input data, w 1, w 2Be constant);
In like manner, according to above-mentioned principle of operation to T1, can be output T2 as a result, T3, T4, T5, T6 is for conversion into x 1w 1+ x 2w 2Form, wherein:
T 2 : w 1 = 2 13 2 C 16 3 , w 2 = 2 13 2 C 16 5
T 3 : w 1 = 2 14 2 C 16 1 C 8 1 , w 2 = - 2 14 2 C 16 7 C 8 3
T 4 : w 1 = 2 14 2 C 16 3 C 8 3 , w 2 = - 2 14 2 C 16 5 C 8 3
T 5 : w 1 = 2 13 2 C 8 , 1 w 2 = 2 13 2 C 8 3
T 6 : w 1 = 2 14 C 8 1 C 4 1 , w 2 = - 2 14 C 8 3 C 4 1
How will to tell about below with table look-up, displacement and accumulate mode calculate output T=x as a result 1w 1+ x 2w 2
At first with the input data x in the formula 1, x 2Dissolving becomes the binary representation mode, as follows:
x 1=m 02 t+ m 12 T-1+ ...+m T-12+m t(m iBe 0 or 1, i=0,1 ... t)
x 2=n 02 l+ n 12 L-1+ ...+n L-12+n l(n iBe 0 or 1, i=0,1 ... l)
And then (t l), thereby can will import data x to get n=max 1, x 2Turn to the identical binary representation form of high order power, as follows:
x 1=a 02 n+a 12 n-1+...+a n
x 2b 02 n+b 12 n-1+...+b n
A wherein i, b iBe 0 or 1, i=0,1 ..., n
Following formula T=x then 1w 1+ x 2w 2And then just can represent in the following way:
T=x 1w 1+x 2w 2=(a 0w 1+b 0w 2)2 n+(a 1w 1+b 1w 2)2 n-1+...+(a nw 1+b nw 2)
This shows, as long as calculate each a in this formula iw 1+ b iw 2, i=0,1 ..., n just can calculate output T value as a result by the displacement accumulate mode.Because a i, b iValue is 0 or 1, then each a iw 1+ b iw 2, i=0,1 ..., the value condition of n has 4 kinds of combinations: 0, and w 1, w 2, w 1+ w 2, because w 1And w 2All be constant, then can precompute this 4 kinds of combined values, and calculated value is made into table stores, calculating each a like this iw 1+ b iw 2In the time of as a result, only need according to a i, b iValue go table look-at just can draw each a iw 1+ b iw 2Result of calculation, thereby avoided to calculating each a iw 1+ b iw 2Result and need the drawback of twice multiplying and an add operation.
As above, each a iw 1+ b iw 2(i=0,1 ... n) have 4 kinds of different value situations altogether, i.e. 4 different end values are if consider input value x simultaneously 1, x 2Positive-negative polarity, each a then iw 1+ b iw 2Have 9 kinds of different value situations altogether, comprising:
0,w 1,w 2,w 1+w 2,w 1-w 2,-w 1-w 2,-w 1+w 2,-w 1,and-w 2.;
Then here if to exporting T as a result 1, T 2, T 3, T 4, T 5, T 6Carry out computing respectively, so need to set up in advance 6 different tables of storage altogether, each the corresponding respectively corresponding output of table calculating of T as a result includes 9 different end values.
Wherein Fig. 5 has represented that utilization the present invention program principle is tabled look-up, displacement and accumulation process replace the calculating process schematic diagram of the multiplying in the dct transform process.
According to the aforementioned calculation principle, when carrying out the 2D-DCT conversion process, can do the 1D-DCT conversion process (being called first conversion stages) of horizontal direction earlier to image as if image to 8 * 8 sizes, get R=2, the expression current data moves to left 2, removes S=11, and the expression current data moves to right 11; And then image is done the 1D-DCT conversion process (being called second conversion stages) of vertical direction, get R=5, expression makes current data move to right 5, gets S=18, expression makes current data move to right 18, thereby finally obtains image is carried out the result of 2D-DCT conversion process.
From above-mentioned processing procedure as can be known, utilization the present invention program calculates principle, and the dct transform processing of finishing 8 of one dimensions needs 80 shift operations and 95 sub-addition computings at most, and has avoided multiplying fully; Need 1136 shift operations and 1376 sub-addition computings at most if finish the 2D-DCT conversion process of 8 * 8 images like this, and without any need for multiplying.
Corresponding to the rapid DCT transform method that the invention described above proposes, a kind of quick reverse discrete cosine transform method that the present invention has gone back corresponding proposition here, concrete processing procedure is as follows:
(1) in the idct transform process, the location is to different input value X a, X bBased on X aW a+ X bW bThe inverse transformation subprocess of output valve, wherein W are asked in computing a, W bBe respectively different constant values based on cos operation; In addition, input value X a, X bBe generally digital signal is carried out digital signal conversion value in the compression coding and decoding processing procedure, as can be for image being carried out the image coefficient piece element value in the compression coding and decoding processing procedure.
(2) at above-mentioned each inverse transformation subprocess that navigates to, by respectively with input value X a, X bDissolve and be binary form, with X aW a+ X bW bComputing dissolve for
Figure A20061000652900231
Computing, wherein a i, b iValue is 0 or 1 respectively;
(3) in each inverse transformation subprocess
Figure A20061000652900241
Computing is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value; Wherein more excellent, in above-mentioned each mapping relations group of setting up, a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bEach bar mapping relations between the value can adopt the mapping relations sheet form to exist, and are specific as follows:
(a i、b i)..................a iW a+b iW b
(0,0)....................0;
(1,0)....................W a
(0,1)....................W b
(1,1)....................W a+W b
(4) follow-up to each inverse transformation subprocess based on When output valve is asked in computing, according to a i, b iThe combinations of values of different values concerns a that indexes correspondence in the group in correspondence mappings iW a+ b iW bValue, and combination displacement accumulation process obtains the output valve of each inverse transformation subprocess.
Because DCT-III Fast transforms and DCT-II Fast transforms be the contrary processing procedure each other, so to use the present invention program's principle be example that the implementation process of IDCT fast transform approach of the present invention is described in detail with existing DCT-III Fast transforms technology here, please refer to Fig. 6, this figure is the input/output state schematic diagram that DCT-III Fast transforms technology is used IDCT Fast transforms principle of the present invention, with reference to this Fig. 5, concrete detailed embodiment is as follows
T 1 = 2 8 2 ( x 1 + x 2 / 2 C 8 1 ) / C 6 1 , w 1 = 2 8 2 / C 16 1 , w 2 = 2 7 2 / ( C 8 1 C 16 1 )
T 2 = 2 8 2 ( x 1 + x 2 / 2 C 8 3 ) / C 16 3 , w 1 = 2 8 2 / C 16 3 , w 2 = 2 7 2 / ( C 8 3 C 16 3 )
T 3 = 2 8 2 ( x 1 - x 2 / 2 C 8 1 ) / C 16 7 , w 1 = 2 8 2 / C 16 7 , w 2 = - 2 7 2 / ( C 8 1 C 16 7 )
T 4 = 2 8 2 ( x 1 + x 2 / 2 C 8 3 ) / C 16 5 , w 1 = 2 8 2 / C 16 5 , w 2 = - 27 7 2 / ( C 8 3 C 16 5 )
T 5 = 2 8 2 ( x 1 - x 2 C 4 1 ) / C 8 1 , w 1 = 2 8 2 / C 8 1 , w 2 = - 2 8 2 ( C 4 1 C 8 1 )
T 6 = 2 8 2 ( x 1 - x 2 C 4 1 ) / C 8 3 , w 1 = 2 8 2 / C 8 3 , w 2 = - 2 8 2 ( C 4 1 C 8 3 )
For obtaining the execution of precision and fixed point integer arithmetic, use the scale factor that comprises in the above-mentioned numerical value here, same scale factor had been not only available is expert to handle level but also can be used on row and handles level, but displacement strategy difference.
Wherein the displacement strategy depends on two factors: one is required precision, and another is the execution of integer arithmetic of definitely fixing a point.Be looped around numerical table on the ellipse and be shown in shown in the figure bit of mobile respective numbers on the direction, the symbol below oval is also represented to move, corresponding to the first row grade R=11 and corresponding to secondary series level R=18.Because required precision moves to right 11 in the first order,, retract 18 to the right at last in conversion so on two-stage since the sum that moves to left is 18 bits.
Wherein can only only carry out 6 times to  x and move and 6 additions, executive mode illustrates as follows,
The IDCT Fast transforms that provides complexity is below handled, and the gray scale of supposing 8 * 8 images is 512, and for 1 dimension DCT, the poorest situation is that the sum of displacement and addition is respectively 74 and 93 so.Wherein, T1-T6 displacement 48 is done the multiplication displacement 12 of 2 ordered coefficients , required precision displacement 14; T1-T6 makes 48 sub-additions, makes the multiplication of 2 ordered coefficients  and makes 12 sub-additions, and other 23 sub-additions are in butterfly diagram.On the statistics angle, average mobile and addition is respectively 62 * (48 * 0.75+12+14) and 71 * (48 * 0.75+12+23).For the first row level of 2 dimension DCT, the poorest situation is that the sum of mobile and addition is respectively 592 and 744.See that statistically average mobile and addition is respectively 496 * (62 * 8) and 568 * (71 * 8).For the secondary series level, the poorest situation is that the sum of mobile and addition is respectively 784 times and 840 times.Statistically see, move and the average of addition is respectively 640 * (80 * 8) inferior and 712 * (89 * 8) inferior.Thereby in the ordinary course of things, the sum that 2 dimension DCT move with addition is respectively 1136 times and 1280 times.
In sum, technical solution of the present invention is by tabling look-up DCT-II classical in the prior art and DCT-III type fast transform approach and optimization, displacement and accumulate mode combine, promptly DCT-II of the prior art and DCT-III type fast transform approach have been carried out grafting renovation, table look-up with the part use of doing multiplication at needs, displacement and the mode that adds up reach for multiplying, make whole dct transform or inverse transformation computational process not have multiplication, thereby a kind of DCT Fast transforms or inverse transformation technical scheme of brand-new no multiplication procedure have been obtained, this DCT Fast transforms scheme or DCT fast reverse conversion scheme can be under the prerequisites that guarantees dct transform or inverse transformation operational precision, improve the arithmetic speed of dct transform or inverse transformation greatly, and minimizing has been satisfied the demand of modern communications business preferably to the consumption of system hardware and software resource.
Accordingly, the present invention also correspondence has proposed a kind of fast discrete cosine transform device, please refer to Fig. 7, this figure is the main composition structured flowchart of fast discrete cosine transform device of the present invention, it mainly comprises positioning unit 100, dissolve unit 200, mapping relations set up unit 300 and output valve is asked for unit 400, and wherein the main effect of each part is as follows:
Positioning unit 100 is mainly used in the dct transform process, and the location is to different input value X a, X bBased on X aW a+ X bW bThe varitron process of output valve, wherein W are asked in computing a, W bBe different constant values based on cos operation;
Dissolve unit 200, be mainly used in each the varitron process that is navigated at above-mentioned positioning unit 100, by respectively with input value X a, X bDissolve for binary form, with X aW a+ X bW bCalculating process dissolve for
Figure A20061000652900261
Calculating process, wherein a i, b iValue is 0 or 1 respectively;
Mapping relations are set up unit 300, be mainly used in the result that dissolves who dissolves unit 200 according to above-mentioned, in each varitron process
Figure A20061000652900262
Calculating process is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value; Wherein these mapping relations are set up in each mapping relations group of being set up unit 300, between each bar mapping relations can but be not limited to exist with the mapping relations sheet form;
Output valve is asked for unit 400, be used for follow-up to each varitron process based on
Figure A20061000652900263
When calculating process is asked for output valve, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of being set up unit 300 in above-mentioned mapping relations and is concerned a that indexes correspondence in the group iW a+ b iW bValue, and the conventional displacement accumulation process of combination obtains the output valve of each varitron process.
Please refer to Fig. 8, this figure is the concrete composition structural representation that output valve is asked for the unit in apparatus of the present invention, and its output valve is asked for unit 400 and specifically comprised index subelement 4001 and displacement accumulation process subelement 4002, and the main effect of these two component units is as follows:
Index subelement 4001, be mainly used in follow-up to each varitron process based on
Figure A20061000652900271
When output valve is asked in computing, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of being set up unit 300 in above-mentioned mapping relations and is concerned a that indexes correspondence in the group iW a+ b iW bValue;
Displacement accumulation process subelement 4002, be mainly used in to each varitron process based on
Figure A20061000652900272
When output valve is asked in computing, each a that indexes in conjunction with above-mentioned index subelement 4001 iW a+ b iW bValue adopts displacement accumulation process mode to obtain the output valve of each varitron process.
Wherein the fast discrete cosine transform device of the present invention's proposition is generally used for digital signal is carried out the compressed encoding processing, as picture signal is carried out compressed encoding processing etc.
Accordingly, the present invention also correspondence has proposed a kind of quick reverse discrete cosine transform device, please refer to Fig. 9, this figure is the main composition structured flowchart of quick reverse discrete cosine transform device of the present invention, it mainly comprises contrary positioning unit 800, contraryly dissolve unit 810, the inverse mapping relation sets up unit 820 and contrary output valve is asked for unit 830, and wherein the main effect of each part is as follows:
Contrary positioning unit 800 is mainly used in the dct transform process, and the location is to different input value X a, X bBased on X aW a+ X bW bThe inverse transformation subprocess of output valve, wherein W are asked in computing a, W bBe different constant values based on cos operation;
Contrary dissolve unit 810, be mainly used in each the inverse transformation subprocess that is navigated at above-mentioned contrary positioning unit 800, by respectively with input value X a, X bDissolve for binary form, with X aW a+ X bW bCalculating process dissolve for Calculating process, wherein a i, b iValue is 0 or 1 respectively;
Inverse mapping relation is set up unit 820, is mainly used in according to the above-mentioned contrary result that dissolves who dissolves unit 810, in each inverse transformation subprocess Calculating process is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value; Wherein this inverse mapping relation is set up in each mapping relations group of being set up unit 820, between each bar mapping relations can but be not limited to exist with the mapping relations sheet form;
Contrary output valve is asked for unit 830, be mainly used in follow-up to each inverse transformation subprocess based on
Figure A20061000652900281
When calculating process is asked for output valve, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of being set up unit 820 in above-mentioned inverse mapping relation and is concerned a that indexes correspondence in the group iW a+ b iW bValue, and the conventional displacement accumulation process of combination obtains the output valve of each inverse transformation subprocess.
Please refer to Figure 10, this figure is the concrete composition structural representation that contrary output valve is asked for the unit in apparatus of the present invention, its contrary output valve is asked for unit 830 and is specifically comprised reverse index subelement 8301 and contrary displacement accumulation process subelement 8302, and the main effect of these two component units is as follows:
Reverse index subelement 8301, be mainly used in follow-up to each inverse transformation subprocess based on
Figure A20061000652900282
When output valve is asked in computing, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of being set up unit 820 in above-mentioned inverse mapping relation and is concerned a that indexes correspondence in the group iW a+ b iW bValue;
Contrary displacement accumulation process subelement 8302, be mainly used in to each inverse transformation subprocess based on
Figure A20061000652900283
When output valve is asked in computing, each a that indexes in conjunction with above-mentioned reverse index subelement 8301 iW a+ b iW bValue adopts displacement accumulation process mode to obtain the output valve of each inverse transformation subprocess.
Wherein the quick reverse discrete cosine transform device that proposes of the present invention is generally used for digital signal compressed and separates encoding process, as picture signal is carried out compression coding and decoding processing etc.
Other concrete technology for fast discrete cosine transform device of the present invention and quick reverse discrete cosine transform device thereof realize that details can realize the details description with reference to the correlation technique in above-mentioned fast discrete cosine transform method of the present invention and the quick reverse discrete cosine transform method thereof, no longer too much gives to give unnecessary details here.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.

Claims (18)

1, a kind of fast discrete cosine transform method is characterized in that, comprises step:
In the discrete cosine transform process, the location is to different input value X a, X bBased on X aW a+ X bW bThe varitron process of output valve, wherein W are asked in computing a, W bBe different constant values based on cos operation;
At each the varitron process that navigates to, by respectively with input value X a, X bDissolve for binary form, with X aW a+ X bW bComputing dissolve for Σ i = 0 n ( a i W a + b i W b ) 2 n - i Computing, wherein a i, b iValue is 0 or 1 respectively; And
At in each varitron process Σ i = 0 n ( a i W a + b i W b ) 2 n - i Computing is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value;
Follow-up to each varitron process based on Σ i = 0 n ( a i W a + b i W b ) 2 n - i When output valve is asked in computing, according to a i, b iThe combinations of values of different values concerns a that indexes correspondence in the group in correspondence mappings iW a+ b iW bValue, and combination displacement accumulation process obtains the output valve of each varitron process.
2, the method for claim 1 is characterized in that, in each mapping relations group, and a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bEach bar mapping relations between the value exist with the mapping relations sheet form.
3, the method for claim 1 is characterized in that, described input value X a, X bFor digital signal being carried out the digital signal input value in the compressed encoding processing procedure.
4, the method for claim 1 is characterized in that, described input value X a, X bFor image being carried out image signal value or the picture signal residual values in the compressed encoding processing procedure.
5, a kind of quick reverse discrete cosine transform method is characterized in that, comprises step:
In the reverse discrete cosine transform process, the location is to different input value X a, X bBased on X aW a+ X bW bThe inverse transformation subprocess of output valve, wherein W are asked in computing a, W bBe different constant values based on cos operation;
At each the inverse transformation subprocess that navigates to, by respectively with input value X a, X bDissolve for binary form, with X aW a+ X bW bComputing dissolve for Σ i = 0 n ( a i W a + b i W b ) 2 n - i Computing, wherein a i, b iValue is 0 or 1 respectively; And
At in each inverse transformation subprocess Σ i = 0 n ( a i W a + b i W b ) 2 n - i Computing is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value;
Follow-up to each inverse transformation subprocess based on Σ i = 0 n ( a i W a + b i W b ) 2 n - i When output valve is asked in computing, according to a i, b iThe combinations of values of different values concerns a that indexes correspondence in the group in correspondence mappings iW a+ b iW bValue, and combination displacement accumulation process obtains the output valve of each inverse transformation subprocess.
6, method as claimed in claim 5 is characterized in that, in each mapping relations group, and a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bEach bar mapping relations between the value exist with the mapping relations sheet form.
7, method as claimed in claim 5 is characterized in that, described input value X a, X bFor digital signal being carried out the digital signal conversion value in the compression coding and decoding processing procedure.
8, method as claimed in claim 5 is characterized in that, described input value X a, X bImage is carried out image coefficient piece element value in the compression coding and decoding processing procedure.
9, a kind of fast discrete cosine transform device is characterized in that, comprising:
Positioning unit is used in the discrete cosine transform process, and the location is to different input value X a, X bBased on X aW a+ X bW bThe varitron process of output valve, wherein W are asked in computing a, W bBe different constant values based on cos operation;
Dissolve the unit, each the varitron process that is used for navigating at described positioning unit is by respectively with input value X a, X bDissolve for binary form, with X aW a+ X bW bComputing dissolve for Σ i = 0 n ( a i W a + b i W b ) 2 n - i Computing, wherein a i, b iValue is 0 or 1 respectively;
Mapping relations are set up the unit, be used for the result that dissolves that dissolves the unit according to described, in each varitron process Σ i = 0 n ( a i W a + b i W b ) 2 n - i Computing is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value;
Output valve is asked for the unit, be used for follow-up to each varitron process based on Σ i = 0 n ( a i W a + b i W b ) 2 n - i When output valve is asked in computing, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of setting up the unit in described mapping relations and is concerned a that indexes correspondence in the group iW a+ b iW bValue, and combination displacement accumulation process obtains the output valve of each varitron process.
10, device as claimed in claim 9 is characterized in that, described mapping relations are set up in each mapping relations group of setting up the unit, and each bar mapping relations exists with the mapping relations sheet form.
11, device as claimed in claim 9 is characterized in that, described output valve is asked for the unit and specifically comprised:
The index subelement, be used for follow-up to each varitron process based on Σ i = 0 n ( a i W a + b i W b ) 2 n - i When output valve is asked in computing, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of setting up the unit in described mapping relations and is concerned a that indexes correspondence in the group iW a+ b iW bValue;
Displacement accumulation process subelement, be used for to each varitron process based on Σ i = 0 n ( a i W a + b i W b ) 2 n - i When output valve is asked in computing, each a that indexes in conjunction with described index subelement iW a+ b iW bValue adopts the displacement accumulation process to obtain the output valve of each varitron process.
12, device as claimed in claim 9 is characterized in that, described device is for carrying out the fast discrete cosine transform device that compressed encoding is handled to digital signal.
13, device as claimed in claim 9 is characterized in that, described device is for carrying out the fast discrete cosine transform device that compressed encoding is handled to picture signal.
14, a kind of quick reverse discrete cosine transform device is characterized in that, comprising:
Contrary positioning unit is used in the reverse discrete cosine transform process, and the location is to different input value X a, X bBased on X aW a+ X bW bThe inverse transformation subprocess of output valve, wherein W are asked in computing a, W bBe different constant values based on cos operation;
Contrary dissolve the unit, be used for each inverse transformation subprocess of navigating at described contrary positioning unit, by respectively with input value X a, X bDissolve for binary form, with X aW a+ X bW bComputing dissolve for Σ i = 0 n ( a i W a + b i W b ) 2 n - i Computing, wherein a i, b iValue is 0 or 1 respectively;
Inverse mapping relation is set up the unit, is used for according to the described contrary result that dissolves who dissolves the unit, in each inverse transformation subprocess Σ i = 0 n ( a i W a + b i W b ) 2 n - i Computing is in advance with a i, b iBased on the combinations of values of different values respectively with the corresponding a that obtains iW a+ b iW bSet up the mapping relations group between the value;
Contrary output valve is asked for the unit, be used for follow-up to each inverse transformation subprocess based on Σ i = 0 n ( a i W a + b i W b ) 2 n - i When output valve is asked in computing, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of setting up the unit in described inverse mapping relation and is concerned a that indexes correspondence in the group iW a+ b iW bValue, and combination displacement accumulation process obtains the output valve of each inverse transformation subprocess.
15, device as claimed in claim 14 is characterized in that, described inverse mapping relation is set up in each mapping relations group of setting up the unit, and each bar mapping relations exists with the mapping relations sheet form.
16, device as claimed in claim 14 is characterized in that, described contrary output valve is asked for the unit and specifically comprised:
The reverse index subelement, be used for follow-up to each inverse transformation subprocess based on Σ i = 0 n ( a i W a + b i W b ) 2 n - i When output valve is asked in computing, according to a i, b iThe combinations of values of different values is set up the correspondence mappings of setting up the unit in described inverse mapping relation and is concerned a that indexes correspondence in the group iW a+ b iW bValue;
Contrary displacement accumulation process subelement, be used for to each inverse transformation subprocess based on Σ i = 0 n ( a i W a + b i W b ) 2 n - i When output valve is asked in computing, each a that indexes in conjunction with described reverse index subelement iW a+ b iW bValue adopts the displacement accumulation process to obtain the output valve of each inverse transformation subprocess.
17, device as claimed in claim 14 is characterized in that, described device is for carrying out the quick reverse discrete cosine transform device that compression coding and decoding is handled to digital signal.
18, device as claimed in claim 14 is characterized in that, described device is for carrying out the quick reverse discrete cosine transform device that compression coding and decoding is handled to picture signal.
CN 200610006529 2006-01-11 2006-01-11 Method of quick discrete cosine transform and quick reverse discrete cosine transform and its device Pending CN101001378A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101394383B (en) * 2007-09-18 2011-07-20 华为技术有限公司 Time and frequency domain signal conversion method and device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101394383B (en) * 2007-09-18 2011-07-20 华为技术有限公司 Time and frequency domain signal conversion method and device

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