CN100578755C - Technique for preparing bipolar type long-direction NPN tube using phosphorus-buried and deep phosphorus-buried technique - Google Patents

Technique for preparing bipolar type long-direction NPN tube using phosphorus-buried and deep phosphorus-buried technique Download PDF

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CN100578755C
CN100578755C CN200810025559A CN200810025559A CN100578755C CN 100578755 C CN100578755 C CN 100578755C CN 200810025559 A CN200810025559 A CN 200810025559A CN 200810025559 A CN200810025559 A CN 200810025559A CN 100578755 C CN100578755 C CN 100578755C
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苏卡
邓晓军
卜惠琴
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WUXI YOUDA ELECTRONICS CO Ltd
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Abstract

The bipolar longitudinal NPN tube manufacturing process using phosphorus burying and deep phosphorus burying technologies is a process method for using the phosphorus burying and deep phosphorus burying technologies in the manufacturing process for the phosphorus burying and deep phosphorus burying technologies, for the purpose of reducing saturated pressure drop of NON tube and enhancing the circuit output power. The bipolar longitudinal NPN tube manufacturing process using phosphorus burying and deep phosphorus burying technologies means using phosphorus burying and deep phosphorus burying technologies in the bipolar process for manufacturing the NPN tube. The area when using phosphorus burying and deep phosphorus burying technologies is the same as the area when using common antimony burying technical chip, the extra chip area is not required and only the processes are different from each other. Material sheet using the phosphorus burying and deep phosphorus burying technologies to manufacture the NPN tube is P-type <111> crystallographic direction, resistance rate is 10 to 20 Omega.cm, and after using the deep phosphorus burying technology, the concentration and volume when the deep phosphorus is diffused too deep can be efficiently compensated owing to the upward turning effect of the deep phosphorus burying, thus settling the bottleneck problem about larger resistance at the contact position of the deep phosphorus and burying layer.

Description

Employing phosphorus buries and the preparing bipolar type long-direction NPN tube of dark phosphorus-buried technique is planted
Technical field
The present invention a kind ofly adopts phosphorus to bury in preparing bipolar type long-direction NPN tube skill and the process of dark phosphorus-buried technique, belongs to the semiconductor fabrication techniques field.
Background technology
Along with the development and the cost of raw material of international semiconductor technology rises steadily, various countries are more and more fierce for the competition of integrated circuit fields, specification requirement to the power amplifier adhesive integrated circuit is also more and more higher, always wishes to export big as far as possible power on as far as possible little chip.And the output stage of the size of chip power output and entire circuit is closely bound up.What for this reason, the design of the output stage of power amplifier adhesive integrated circuit just showed is particularly crucial.At present, power amplifier uses more output stage structure as shown in Figure 1 on the market, and NPN type pipe T1 and NPN type pipe T2 constitute complementary type output among the figure.When input signal was positive half cycle, T1 managed conducting, and the T2 pipe ends, and the efferent duct saturation voltage drop depends on that T1 guarantees adequate food and pressure drop; When input signal was negative half period, the T1 pipe ended, and T2 manages conducting, and the efferent duct saturation voltage drop depends on that T2 guarantees adequate food and pressure drop.As everyone knows, the circuit saturation voltage drop is more little, and power output is big more.This shows that the power output of above circuit mainly is limited by the T1 pipe and T2 guarantees adequate food and pressure drop.T1 pipe and T2 pipe are the NPN pipe, and mainly by the collector series resistance decision, series resistance is more little for its saturation voltage drop, and saturation voltage drop is also with regard to more little (voltage drop=electric current * resistance) under the same current.For this reason, the power output of circuit be improved, NPN pipe collector series resistance must be taken measures to reduce as much as possible.
Effective measures external at present and the domestic NPN of reducing pipe collector series resistance are to adopt the antimony buried regions and add dark phosphoric diffusion technology.Fact proved, can effectively reduce collector series resistance like this, improve power output.But less because of the antimony diffusion coefficient, cause antimony buried regions self-resistance and base and antimony bury between resistance bigger; And when dark phosphorous diffusion was extremely dark, its volume and concentration were all less, and is therefore bigger with buried regions contact position resistance.Above resistance in the NPN pipe collector series resistance can not further reduce, and has just limited that NPN guarantees adequate food and pressure drop further reduces, thereby has influenced the further raising of power amplifier class output power of circuit.
Conventional bipolar NPN pipe adopts antimony buried regions and dark phosphorous diffusion, technological process as shown in Figure 2, under this technique platform, the final NPN pipe vertical structure that forms as shown in Figure 4, its basic single tube parameter is as follows: β=100~200/Ic=1mA, BVceo=35~40V, BVcbo=55~60V, BVebo=7~8V
Summary of the invention
Technical problem: to the objective of the invention is that NPN guarantees adequate food and pressure drop in order reducing, to improve output power of circuit.Employing phosphorus buries and the preparing bipolar type long-direction NPN tube of dark phosphorus-buried technique is planted, and promptly adopts phosphorus buried regions and dark phosphorus-buried technique in the bipolar process of making the NPN pipe.
Technical scheme: from chip area, adopt phosphorus to bury and dark phosphorus-buried technique and conventional employing antimony to bury technology chip area size identical, not needing additionally increases chip area, only technical process is different.
I take charge of and adopt phosphorus to bury and dark phosphorus buries technology to make the material piece of NPN pipe is P type<111〉crystal orientation, resistivity is 10~20 Ω cm, technological process as shown in Figure 4, processing step is as follows:
A. feed intake: adopt P type substrate, the crystal orientation is<111 〉,
B. oxidation: at substrate surface oxidation, oxide thickness
Figure C20081002555900051
C. phosphorus buries photoetching, corrosion: bury the position at vertical NPN pipe N and carve the photoetching window,
D. phosphorus buries injection: injecting the position is that vertical NPN pipe N buries the district, injection energy 50KeV~
120KeV, implantation dosage 8E14~1.2E15, impurity are phosphorus,
E. phosphorus buries annealing: annealing temperature is 1050 ℃~1200 ℃, earlier logical 280~320 minutes nitrogen,
Logical again 110~130 minutes oxygen,
F. boron buries photoetching, injection: injecting the position is the isolation channel district, injects energy 50KeV~100KeV,
Implantation dosage 2E14~1E15, impurity are boron,
G. dark phosphorus buries photoetching, injection: injecting the position is vertical NPN pipe collector region, injection energy 50KeV~
120KeV, implantation dosage 1E15~4E15, impurity are phosphorus,
H. dark phosphorus buries annealing: 1050 ℃~1200 ℃ of annealing temperatures, feed 55~65 minutes nitrogen,
I. extension: at vertical NPN pipe collector region position extension, 5~10 microns of thickness,
Resistivity 2~4 Ω CM,
J. dark phosphorous diffusion: the diffusion position is a NPN pipe collector region, 1000 ℃~1100 ℃ of dark phosphorus pre-expansions,
Logical 4~6 minutes earlier nitrogen and oxygen, then logical 35~45 minutes phosphorus sources, last
Logical 4~6 minutes nitrogen and oxygen; It is 1100 ℃~1200 ℃ that dark phosphorus expands again, earlier
Logical 4~6 minutes oxygen, then logical 65~75 minutes hydrogen and oxygen are logical at last
4~6 minutes oxygen,
K. isolation diffusion: the diffusion position is an isolation channel, and purpose is to bury logical with boron, and isolating pre-expansion is 600
℃~900 ℃, logical 8~12 minutes earlier nitrogen and oxygen, then logical 22~28
Minute boron source, logical 8~12 minutes at last nitrogen and oxygen; Isolating again, expansion is 1100
℃~1200 ℃, feed 8~12 minutes nitrogen and oxygen,
L.P-, base inject: injecting the position is P-resistance area, base resistance district and NPN pipe base, and P-injects
Energy 50KeV~100KeV, dosage are 1E13~3E13, and impurity is boron;
The base injects energy 50KeV~100KeV, and dosage is 2E14~4E14, and is assorted
Matter is boron,
M.P+ injects: injecting the position is lateral PNP pipe emitter region, collector region, injection energy be 50KeV~
100KeV, dosage are 8E14~2E15, and impurity is boron,
N.P+ annealing: 1050 ℃~1200 ℃ of annealing temperatures, feed 25~35 minutes nitrogen,
O. emitter region diffusion: the diffusion position is NPN pipe collector ohmic contact regions and emitter region, and give the emitter region
Expansion is 900 ℃~1100 ℃, and logical 4~6 minutes earlier nitrogen and oxygen are then logical
12~18 minutes phosphorus sources, logical at last 4~6 minutes nitrogen and oxygen; The emitter region again
Expansion is 900 ℃~1100 ℃, and earlier logical 4~6 minutes oxygen then leads to 25~35
Minute hydrogen and oxygen, logical at last 4~6 minutes oxygen,
P. contact hole photoetching, corrosion: the employing dry method adds the method etching of wet method, with formation surface of good state,
Q. a sputtered aluminum: 0.8~1.2 micron aluminium silicon of sputter on substrate surface,
R. dielectric deposition: deposit 10000~20000 dust silicon nitrides on substrate surface,
S. through hole photoetching, etching: carve the via regions that is connected between an aluminium and two aluminium,
T. two sputtered aluminums: 1.2~2 microns aluminium silicon of sputter, adopt thick aluminium, be to improve circuit capacity,
U. pressure point photoetching, etching: carve chip pressure point zone.
Under this technique platform, the final NPN that forms manages vertical structure as shown in Figure 5, and basic single tube parameter is as follows: β=100~200/Ic=1mA, BVceo=35~40V, BVcbo=50~60V, BVebo=7~8V.
Beneficial effect: by relatively (Fig. 4) and (Fig. 5), we can find: (one) buries in the bipolar process of technology at routine employing antimony, and is less because of the antimony diffusion coefficient, cause antimony buried regions own vol less, thereby resistance is bigger; Simultaneously owing to turn over fewly on the antimony buried regions, cause between NPN pipe base and the buried regions distance bigger than normal, resistance is bigger.And behind the employing phosphorus-buried technique, because of the phosphorous diffusion coefficient is bigger, so phosphorus buried regions volume is bigger, and resistance is less; More owing to turning on the phosphorus simultaneously, so distance reduces between NPN pipe base and the buried regions, resistance is less.(2) in the conventional bipolar process, because dark phosphorous diffusion is when dark, its volume and concentration are all less, so bigger with buried regions contact position resistance; And after adopting dark phosphorus-buried technique since dark phosphorus bury on turn over effect, can effectively compensate concentration and the volume of dark phosphorous diffusion when dark, thereby eliminate dark phosphorus and buried regions contact position resistance bottleneck problem bigger than normal.
We may safely draw the conclusion by above, adopt phosphorus to bury and dark phosphorus-buried technique after, can well improve the factor that the bipolar NPN pipe collector series resistance of restriction further reduces in the common process.Therefore adopt phosphorus to bury and the NPN pipe of dark phosphorus-buried technique, its saturation voltage drop is better than adopting antimony to bury the NPN pipe of technology certainly.
By experiment, having compared vertical NPN pipe that employing phosphorus buries and phosphorus buries the technology making deeply manages with vertical NPN that the conventional antimony of employing buries the technology making, discovery is under identical vertical NPN pipe area, and phosphorus buries and dark phosphorus buries technology and buries the process pipe saturation voltage drop than antimony and reduce about 30%.Data are as follows: vertically NPN pipe area is 734*862 μ m 2, adopt conventional antimony to bury technology, its saturation voltage drop is 0.29V/Ic=100mA; Employing phosphorus buries and dark phosphorus buries technology, and its saturation voltage drop is 0.21V/Ic=100mA.Therefore, reach identical saturation voltage drop, employing phosphorus buries and vertical NPN of the bipolar process making of phosphorus-buried technique deeply manages, the comparable employing antimony of its area technology of burying dwindles about 30%, this is in today that semiconductor integrated circuit product cost pressure increases day by day, to produce great competitiveness undoubtedly, constantly develop to requirements at the higher level thereby help promoting international power amplifier adhesive integrated circuit.
Description of drawings
Fig. 1 is a power amplifier output stage structure commonly used.
Fig. 2 is that conventional antimony buries the technology bipolar process flow.
Fig. 3 adopts phosphorus to bury and dark phosphorus-buried technique bipolar process flow.
Fig. 4 is that conventional antimony buries the NPN pipe vertical structure figure that the technology bipolar process is made.
Fig. 5 is the NPN pipe vertical structure figure that employing phosphorus buries and dark phosphorus-buried technique bipolar process is made.
Embodiment
Adopt phosphorus to bury and the bipolar process embodiment of dark phosphorus-buried technique as follows:
1. feed intake: P type, crystal orientation<111,
2. oxidation: thickness
3. phosphorus buries photoetching, corrosion; Carve vertical NPN pipe N and bury regional window,
4. phosphorus buries injection: inject energy 80KeV, implantation dosage 1E15; Impurity is phosphorus, NPN managed N buries zone injection phosphorus,
5. phosphorus buries annealing: annealing conditions is 1200 ℃ of 300 minutes N2+120 minute O2,
6. boron buries photoetching, injection: injection zone is the isolation channel zone, injects energy 80KeV, and implantation dosage 5E14, impurity are boron,
7. dark phosphorus buries photoetching, injection: injection zone is dark phosphorus zone, injects energy 100KeV, implantation dosage 2E15, and impurity is phosphorus, its objective is with dark phosphorus to dock,
8. dark phosphorus buries annealing: 1200 ℃ of 60 minutes N2 of annealing conditions,
9. extension: N type extension, thickness 9 μ m, resistivity 2.5 Ω CM,
10. dark phosphorous diffusion: it is 1050 ℃ of 5 minutes N2/O2+40 minute phosphorus source+5 minute N2/O2 that dark phosphorus gives expansion, and it is 1100 ℃ of 5 minutes O2+70 minute H2/O2+5 minute O2 that dark phosphorus expands again, and diffusion zone is a NPN pipe collector region,
11. isolation diffusion: it is 800 ℃ of 10 minutes N2/O2+25 minute boron source+10 minute N2/O2 that expansion is given in isolation, and it is 1200 ℃ of 10 minutes N2/O2 that isolation is expanded again, and diffusion zone is an isolation channel, and purpose is to bury logical with boron.
12.P-, the base injects: injection zone is P-resistance area, base resistance district and NPN pipe base.It is 60KeV that P-injects energy, and dosage is 2E13, and impurity is boron; It is 60KeV that the base injects energy, and dosage is 2.6E14, and impurity is boron,
13.P+ inject: injection zone is lateral PNP pipe emitter region, collector region, and the injection energy is 60KeV, and dosage is 8.0E14, and impurity is boron,
14.P+ annealing: 1160 ℃ of 30 minutes N2 of annealing conditions,
15. the emitter region diffusion: it is 1000 ℃ of 5 minutes N2/O2+15 minute phosphorus source+5 minute N2/O2 that expansion is given in the emitter region, and it is 900 ℃ of 5 minutes O2+30 minute H2/O2+5 minute O2 that the emitter region is expanded again, and diffusion zone is NPN pipe collector ohmic contact regions and emitter region,
16. contact hole photoetching, corrosion: adopt the method etching of dry method+wet method, to form the surface of good state
A 17. sputtered aluminum: 0.8 μ m Al-Si,
18. dielectric deposition:
Figure C20081002555900081
Si3N4,
19. through hole photoetching, etching: carve the via regions that is connected between an aluminium and two aluminium,
20. two sputtered aluminums: 1.2 μ m Al-Si,
21. the pressure point photoetching, etching: carve the pressure point zone.

Claims (1)

1. one kind is adopted phosphorus to bury and the preparing bipolar type long-direction NPN tube skill of dark phosphorus-buried technique, it is characterized in that this technology is specific as follows:
A. feed intake: adopt P type substrate, the crystal orientation is<111 〉,
B. oxidation: at substrate surface oxidation, oxide thickness
Figure C2008100255590002C1
C. phosphorus buries photoetching, corrosion: bury the position at vertical NPN pipe N and carve the photoetching window,
D. phosphorus buries injection: injecting the position is that vertical NPN pipe N buries the district, injection energy 50KeV~
120KeV, implantation dosage 8E14~1.2E15, impurity are phosphorus,
E. phosphorus buries annealing: annealing temperature is 1050 ℃~1200 ℃, earlier logical 280~320 minutes nitrogen,
Logical again 110~130 minutes oxygen,
F. boron buries photoetching, injection: injecting the position is the isolation channel district, injects energy 50KeV~100KeV,
Implantation dosage 2E14~1E15, impurity are boron,
G. dark phosphorus buries photoetching, injection: injecting the position is vertical NPN pipe collector region, injection energy 50KeV~
120KeV, implantation dosage 1E15~4E15, impurity are phosphorus,
H. dark phosphorus buries annealing: 1050 ℃~1200 ℃ of annealing temperatures, feed 55~65 minutes nitrogen,
I. extension: at vertical NPN pipe collector region position extension, 5~10 microns of thickness,
Resistivity 2~4 Ω CM,
J. dark phosphorous diffusion: the diffusion position is a NPN pipe collector region, the temperature during dark phosphorus pre-expansion be 1000 ℃~
1100 ℃, logical 4~6 minutes simultaneously earlier nitrogen and oxygen, then simultaneously logical 35~45
Minute phosphorus source, logical 4~6 minutes simultaneously at last nitrogen and oxygen; When dark phosphorus expands again
Temperature be 1100 ℃~1200 ℃, earlier logical simultaneously 4~6 minutes oxygen, then
Logical simultaneously 65~75 minutes hydrogen and oxygen, logical at last 4~6 minutes oxygen,
K. isolation diffusion: the diffusion position is an isolation channel, and purpose is to bury to logical temperature when isolating pre-expansion with boron
Be 600 ℃~900 ℃, logical 8~12 minutes simultaneously earlier nitrogen and oxygen connect
Simultaneously logical 22~28 minutes boron sources, logical 8~12 minutes simultaneously at last nitrogen and
Oxygen; The temperature of isolating when expanding again is 1100 ℃~1200 ℃, feeds simultaneously
8~12 minutes nitrogen and oxygen,
L.P-, base inject: injecting the position is P-resistance area, base resistance district and NPN pipe base, and P-injects
Energy 50KeV~100KeV, dosage are 1E13~3E13, and impurity is boron;
The base injects energy 50KeV~100KeV, and dosage is 2E14~4E14, and is assorted
Matter is boron,
M.P+ injects: injecting the position is lateral PNP pipe emitter region, collector region, injection energy be 50KeV~
100KeV, dosage are 8E14~2E15, and impurity is boron,
N.P+ annealing: 1050 ℃~1200 ℃ of annealing temperatures, feed 25~35 minutes nitrogen,
O. emitter region diffusion: the diffusion position is NPN pipe collector ohmic contact regions and emitter region, and give the emitter region
Temperature during expansion is 900 ℃~1100 ℃, logical 4~6 minutes simultaneously earlier nitrogen and
Oxygen, then logical 12~18 minutes phosphorus sources, logical simultaneously at last 4~6 minutes nitrogen
Gas and oxygen; Temperature when the emitter region is expanded again is 900 ℃~1100 ℃, earlier logical 4~
6 minutes oxygen, then logical 25~35 minutes simultaneously hydrogen and oxygen are logical at last
4~6 minutes oxygen,
P. contact hole photoetching, corrosion: the employing dry method adds the method etching of wet method, with formation surface of good state,
Q. a sputtered aluminum: the aluminium silicon of sputter 0.8~1.2 micron thickness on substrate surface,
R. dielectric deposition: the thick silicon nitride of deposit 10000~20000 dusts on substrate surface,
S. through hole photoetching, etching: carve the via regions that is connected between an aluminium and two aluminium,
T. two sputtered aluminums: the aluminium silicon of sputter 1.2~2 micron thickness, adopt thick aluminium, be to improve circuit capacity,
U. pressure point photoetching, etching: carve chip pressure point zone.
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CN102117749B (en) * 2009-12-31 2012-07-11 上海华虹Nec电子有限公司 Manufacturing technology for collector region and collector region buried layer of bipolar transistor
CN102315122B (en) * 2011-10-20 2013-08-28 无锡友达电子有限公司 Process for manufacturing bipolar-type device by adopting two-time stibium buried-layer extending technology
CN102623491B (en) * 2012-04-26 2014-04-16 杭州士兰集成电路有限公司 High-voltage withstanding device in bipolar low-voltage process and manufacturing method thereof
CN103094104B (en) * 2012-12-12 2015-03-11 无锡友达电子有限公司 Bipolar horizontal plug and play (PNP) tube manufacture process using phosphorus buried layer and concentrated phosphorus buried technique
CN104576364A (en) * 2013-10-24 2015-04-29 上海华虹宏力半导体制造有限公司 Manufacturing method of vertical NPN device

Citations (2)

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Publication number Priority date Publication date Assignee Title
US4459606A (en) * 1974-12-27 1984-07-10 Tokyo Shibaura Electric Co., Ltd. Integrated injection logic semiconductor devices
US5016079A (en) * 1989-11-30 1991-05-14 Honeywell Inc. Integrated injection logic gate with heavily doped diffusion

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
US4459606A (en) * 1974-12-27 1984-07-10 Tokyo Shibaura Electric Co., Ltd. Integrated injection logic semiconductor devices
US5016079A (en) * 1989-11-30 1991-05-14 Honeywell Inc. Integrated injection logic gate with heavily doped diffusion

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