CN100574047C - Semiconductor device and the non-contact electronic that has used this device - Google Patents
Semiconductor device and the non-contact electronic that has used this device Download PDFInfo
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- CN100574047C CN100574047C CNB2007100964933A CN200710096493A CN100574047C CN 100574047 C CN100574047 C CN 100574047C CN B2007100964933 A CNB2007100964933 A CN B2007100964933A CN 200710096493 A CN200710096493 A CN 200710096493A CN 100574047 C CN100574047 C CN 100574047C
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
- G06K7/0008—General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0701—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
- G06K19/0707—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement being capable of collecting energy from external energy sources, e.g. thermocouples, vibration, electromagnetic radiation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0701—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
- G06K19/0712—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement being capable of triggering distinct operating modes or functions dependent on the strength of an energy or interrogation field in the proximity of the record carrier
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
Abstract
The invention provides the non-contact electronic of a kind of semiconductor device and this device of use, the power that utilization offers non-contact electronic changes the voltage suppression characteristic that is installed in the regulatory function on the power circuit (B5), when the power that offers non-contact electronic hour, make between antenna terminal (LA-LB) voltage big with respect to the voltage variety of the electric current that flows through antenna, when the power that offers non-contact electronic is big, make between antenna terminal (LA-LB) voltage little with respect to the voltage variety of the electric current that flows through antenna, the electric current of the total consumption electric current that changes with respect to the electric current of load-modulate circuit (transtation mission circuit (B8)) when thus, making telecommunication changes and increases.
Description
Technical field
The present invention relates to semiconductor device and used the non-contact electronic of this device, relate to especially that to be effectively applied to IC-card and IC tag (tag) be the non-contact electronic of representative and the technology that is installed in the circuit construction of electric power of the semiconductor device in this electronic equipment.
Background technology
For for example non-contact electronics such as IC-card, IC tag, RFID, mobile phone, can consider the technology of following technology as inventor's research.
Non-contact electronic with semiconductor device of the function that has CPU and memory etc. in inside is just popularized in fields such as traffic, finance.Though be not particularly limited, above-mentioned non-contact electronic does not possess power supplys such as battery, moves but generate power supply by the electromagnetic wave that antenna receives.Above-mentioned non-contact electronic receives the data that electromagnetic wave modulation back is sent by read write line (interrogator), and then by CPU, memory the data that receive is carried out signal processing.Its result makes load change between the antenna terminal according to resulting data, modulates the electromagnetic wave that is received by antenna thus, and data are sent to read write line.
Have in this non-contact electronic by merging rectification function and regulatory function and generate efficient height and stable power voltage to seek the circuit engineering (for example, with reference to patent documentation 1) that communication distance increases.
Also having in order to realize bigger communication range utilizes patent document 1 described power circuit and protection to constitute the withstand voltage technology (for example, with reference to patent documentation 2) of the element of power circuit.
[patent documentation 1] TOHKEMY 2001-274339 communique
[patent documentation 2] TOHKEMY 2003-319574 communique
Summary of the invention
About the technology of non-contact electronic as described above, the result of inventor's research will obtain clearly by following content.
Fig. 1 illustrates when being received from power that read write line provides with the electromagnetic wave form by the antenna that non-contact electronic had, and outputs to electric current (Current)-voltage (Voltage) characteristic in the non-contact electronic from the both sides terminal of above-mentioned antenna.
Shown in the I-E characteristic W1 of Fig. 1, change owing to the voltage of antenna end depends on the electric current that flows through in the load that is connected between antenna terminal, therefore be equivalent to have output resistance R0, signal amplitude is the voltage source of V0.That is, the intersection point of above-mentioned I-E characteristic W1 and voltage axis (Y-axis) is the signal amplitude V0 of above-mentioned voltage source, and the slope of above-mentioned I-E characteristic is above-mentioned output resistance R0.
Generally speaking, the signal amplitude V0 of the above-mentioned voltage source in the above-mentioned equivalent electric circuit and above-mentioned output resistance R0 are that communication distance changes according to the distance between read write line and the non-contact electronic.Especially when telecommunication, it is more little to have a communication distance signal amplitude V0 far away more, the big more characteristic of above-mentioned output impedance R0.
Fig. 2 illustrates equivalent electric circuit B0, the power circuit B1 that is installed in non-contact electronic and the load-modulate circuit B2 from the I-E characteristic of the both sides terminals output of antenna of performance Fig. 1.
Therefore equivalent electric circuit B0 has above-mentioned output characteristic, is made of the voltage source E0 with signal amplitude V0 and being connected in series of output resistance R0.Power circuit B1 is made of rectification circuit and filter capacitor, has regulatory function.Thus, the signal that is input to antenna terminal LA and LB is carried out rectification and filtering, be controlled at the supply voltage VDD that lead-out terminal OUT obtains by regulatory function and make it be no more than predetermined voltage level.
Be used for being connected between antenna terminal LA, LB and the earth terminal to the load-modulate circuit B2 that read write line sends data from non-contact electronic, load-modulate circuit B2 is controlled by control signal TX.Load-modulate circuit B2 produces output current I1 when controlled signal TX connects, then do not have output current to flow through when controlled signal TX disconnects.Promptly this load-modulate circuit B2 has owing to the circuit that electric current changes the function of I1 takes place control signal TX, therefore, constitutes by current source I1 and being connected in series of switch S 1.The electric current variation I1 that is produced by above-mentioned current source I1 and switch S 1 flows to the higher side of current potential among antenna terminal LA or the LB via diode D1 or D2.At this, B2 is connected between antenna terminal LA, LB and the earth terminal with the load-modulate circuit, but is not limited thereto, and for example also can only be connected on the antenna terminal LA.
Fig. 3 illustrates an example of the I-E characteristic of each terminal voltage among Fig. 2.At this, the current circuit that patent documentation 2 is put down in writing as an example.
Electric current (Current) axle (X-axis) is illustrated in the current amplitude of the electric current I 2 that antenna terminal LA flows through, and voltage (Voltage) axle (Y-axis) is represented the voltage amplitude of each terminal.Voltage between the antenna terminal when W1 represents load-modulate circuit B2 disconnection; Voltage between the antenna terminal when W2 represents load-modulate circuit B2 connection; The output voltage of power circuit B1 when W3 represents load-modulate circuit B2 disconnection; The output voltage of power circuit B1 when W4 represents load-modulate circuit B2 connection.In addition, W5 and W6 represent an example of I-E characteristic from the output of antenna both sides terminal shown in Figure 1, I-E characteristic when W5 represents short-range communication, I-E characteristic when W6 represents telecommunication, wherein, I-E characteristic W6, its output resistance R0 illustrated in figures 1 and 2 is bigger.
At this, following situation is shown: the supply voltage VDD of above-mentioned power circuit B1 reaches after the predetermined voltage, owing to suppressing action, the output voltage that is built in the regulating circuit among the above-mentioned power circuit B1 has slope R1, in fact, to consider component pressure at the voltage amplitude that antenna terminal LA, LB produce, thereby need to adjust the slope R1 of above-mentioned output voltage suppression characteristic.
In addition, supply voltage VDD reaches slope before the predetermined voltage and depends on the output voltage terminal that is connected above-mentioned power circuit B1 and the current sinking of the internal circuit B31 between the earth terminal.
Can think, the waveform of voltage W2 between the antenna terminal when load-modulate circuit B2 connects is the waveform of the amount of the waveform of voltage W1 between the antenna terminal when load-modulate circuit B2 is disconnected output current I1 from load-modulate circuit B2 to current axis (X-axis) direction that moved.
Therefore at this, as shown in Figure 2, power circuit B1 and load-modulate circuit B2 with characteristic shown in Figure 3 are connected on antenna terminal LA and the LB, become working point under the condition separately with the intersection point of I-E characteristic W5, the W6 of the output characteristic of expression antenna.Therefore, working point when the intersection point of the voltage W2 between I-E characteristic W5, W6 and antenna terminal is represented load-modulate circuit B2 connection, the difference of the electric current of the working point when working point the when working point the when intersection point of voltage W1 represents that load-modulate circuit B2 disconnects between I-E characteristic W5, W6 and antenna terminal, above-mentioned connection and above-mentioned disconnection does not become current change quantity Δ I2a that outputs to antenna terminal LA, LB and the Δ I2b that the on/off owing to load-modulate circuit B2 produces.
Thus, in the big I-E characteristic W6 of slope, output to the current change quantity Δ I2a of antenna terminal LA, LB, less than the current change quantity Δ I2b that in the little I-E characteristic W5 of slope, outputs to antenna terminal LA, LB.
This situation can describe by enough formulas.In the circuit of the Fig. 2 of the characteristic with Fig. 3, when connecting load-modulate circuit B2 and the current change quantity Δ I2 of the electric current I that flow into antenna terminal LA 2 during disconnecting consumers modulation circuit B2, as formula 1, represent.
Δ I2=[1-R0/ (R0+R1)] * I1 ... (formula 1)
At this, shown in patent document 1, if make the output resistance R0 of the slope R1 of output voltage suppression characteristic greater than above-mentioned equivalent electric circuit B0, the current change quantity Δ I2 of antenna terminal LA is increased, but as mentioned above, the voltage amplitude that produces on antenna terminal will become greatly, therefore when short-range communication, voltage probably surpasses component pressure between antenna terminal, thereby this is also unrealistic.
As mentioned above, in the little power circuit of the slope R1 of output voltage suppression characteristic, especially when read write line and non-contact electronic carry out telecommunication under the big situation of the slope of the I-E characteristic of the both sides terminal output of antenna, there are the following problems: the electric current of the antenna terminal LA that is taken place by load-modulate circuit B2 changes minimum, and read write line can't receive the data of sending from non-contact electronic.
Therefore, the object of the present invention is to provide a kind of circuit engineering, can realize the stable transmission from the non-contact electronic to the read write line when communication distance between non-contact electronic and the read write line is far away.
Above-mentioned and other purpose of the present invention and novel characteristics will obtain clearly according to the record and the accompanying drawing of this specification.
The summary of simple declaration representative content in the disclosed invention of the application is as follows.
Promptly, semiconductor device of the present invention and the non-contact electronic that has used this device, have antenna, rectification function, load-modulate function, regulatory function, utilizing above-mentioned regulatory function to suppress the zone of output voltage, has following I-E characteristic: when the power that offers non-contact electronic hour, the voltage that produces at the two ends of antenna is big with respect to the variation of the electric current that flows through antenna, when the power that offers non-contact electronic was big, the voltage that produces at the two ends of antenna was little with respect to the variation of the electric current that flows through antenna.
Simple declaration is as follows by the effect that representative content in the disclosed invention of the application obtains.
Can when the communication distance of non-contact electronic and read write line is far away, produce big load-modulate electric current in the transmission of the data from the non-contact electronic to the read write line.
Description of drawings
Fig. 1 is from the figure of the I-E characteristic of antenna both sides terminal output when being illustrated in the antenna that is had by non-contact electronic and receiving from power that read write line provides in electromagnetic mode.
Fig. 2 be expression performance Fig. 1 from the equivalent electric circuit of the I-E characteristic of antenna both sides terminal output and be installed in power circuit the non-contact electronic and the figure of load-modulate circuit.
Fig. 3 is the figure of an example of I-E characteristic of each terminal voltage of presentation graphs 2.
Fig. 4 is the block diagram of the basic structure of expression semiconductor device of embodiments of the present invention 1 and non-contact electronic.
Fig. 5 is the stereogram of the structure of the circuit board of non-contact electronic of the semiconductor device of expression with embodiments of the present invention 1 and read write line.
Fig. 6 is the circuit diagram of the structure that is installed in power circuit on the semiconductor device and load-modulate circuit of expression embodiments of the present invention 1.
Fig. 7 is the figure of the I-E characteristic of each terminal voltage in expression power circuit shown in Figure 6 and the load-modulate circuit.
The figure of the I-E characteristic of each terminal voltage when Fig. 8 is the load-modulate circuit on/off of representing to make in power circuit shown in Figure 6 and the load-modulate circuit.
Fig. 9 is the circuit diagram of the structure that is installed in the power circuit in the semiconductor device of expression embodiments of the present invention 2.
Figure 10 is the circuit diagram of the structure that is installed in the power circuit in the semiconductor device of expression embodiments of the present invention 3.
Figure 11 is the circuit diagram of the structure that is installed in the power circuit in the semiconductor device of expression embodiments of the present invention 4.
Figure 12 is the circuit diagram of the structure that is installed in the power circuit in the semiconductor device of expression embodiments of the present invention 5.
Figure 13 is the circuit diagram of the structure that is installed in the power circuit in the semiconductor device of expression embodiments of the present invention 6.
Figure 14 is the figure that is illustrated in the I-E characteristic of each terminal voltage when making the switch on/off in the power circuit with load-modulate function shown in Figure 13.
Figure 15 is the figure of the structure that is installed in the power circuit in the semiconductor device of expression embodiments of the present invention 7.
Embodiment
Below, describe embodiments of the present invention in detail based on accompanying drawing.Whole accompanying drawings being used for illustrating execution mode mark same label in principle to same parts, and omit the explanation of its repetition.
(execution mode 1)
Fig. 4 is the block diagram that the semiconductor productive set of expression embodiments of the present invention 1 becomes the basic structure of circuit devcie and non-contact electronic.
At first, utilize Fig. 4 that one example of the structure of the semiconductor device of present embodiment 1 and non-contact electronic is described.The non-contact electronic of present embodiment 1 for example is IC-card, IC tag, RFID, mobile phone etc.
In Fig. 4, B3 is a contactless electronic equipment, and B4 is mounted in the semiconductor device on the non-contact electronic B3, and L0 is mounted in the antenna on the non-contact electronic B3.The capacitor C 0 that is connected in parallel with antenna L0 constitutes resonant circuit.This resonant capacitor C0 considers also that parasitic capacitance waits and adjusts, and therefore not necessarily is connected.Semiconductor device B4 has power circuit B5 and internal circuit B6, also has the antenna terminal LA, the LB that are used to connect antenna L0.
In Fig. 4, power circuit B5 constitutes (not shown) by rectification circuit, filter capacitor, regulating circuit.Regulating circuit is controlled and is made and to be no more than predetermined voltage level by the voltage that rectification circuit and filter capacitor generated.The output voltage of power circuit B5 provides as the supply voltage VDD of internal circuit B6.
Internal circuit B6 is made of receiving circuit B7, transtation mission circuit B8, control part 9, memory B10.The information signal that receiving circuit B7 will be superimposed upon on the AC signal that the antenna L0 that had by non-contact electronic B3 receives carries out offering control part B9 as digital information signal after the demodulation.Transtation mission circuit B8 receives from the information signal of the digital signal of control part B9 output, according to this information signal the AC signal that antenna L0 receives is modulated.Read write line B14 (with reference to Fig. 5) accept from the electromagnetic reflection of antenna L0 because above-mentioned modulation changes this fact, reception is from the information signal of control part B9.Memory B10 be used for and control part 9 between by the demodulated information data, send the record of data etc.
The configuration example of non-contact electronic B3 shown in Figure 5 and read write line B14.
Non-contact electronic B3, for example the printed base plate B11 that is formed by resin cast forms the form of card.Reception is made of the spiral-shaped coil B12 that the wiring that utilizes printed base plate B11 forms from the electromagnetic antenna L0 of the read write line B14 of outside.In the semiconductor device B4 that constitutes by 1 IC chip B13, be connected on the IC chip B13 as the coil B12 of antenna.The electromagnetic antenna L0 (coil B12) that has received from read write line B14 exports high frequency ac signal to antenna terminal LA, LB.The part of AC signal is modulated according to information signal (data).
The present invention is applicable to that typically the non-contact electronic surface does not have the non-contact electronic that is used for carrying out with the outside terminal of input and output.Certainly, also can be used in and have the two compound non-contact electronic of non-contact interface and input and output terminal.In addition, though be not particularly limited, semiconductor device B4 utilizes the manufacturing technology of known semiconductor device to be formed on 1 Semiconductor substrate as monocrystalline silicon etc.
Fig. 6 is the circuit diagram of the basic structure example that is installed in power circuit on the semiconductor device and transtation mission circuit (load-modulate circuit) of present embodiment 1.
Power circuit B5 has rectifying and wave-filtering function and output voltage inhibit feature, is connected with the antenna L0 that is installed in the non-contact electronic on antenna terminal LA, LB.This also with antenna terminal LB as the earth terminal in the chip.
The structure of power circuit B5 is as follows, that is: between antenna terminal LA and output resistance OUT, be connected with the MOS transistor M1 of between gate terminal and drain terminal, be connected in series resistance R 3 and resistance R 4, on the non-counter-rotating input terminal (+) of operational amplification circuit A1, be connected with the resistance R 6 that is connected in series between lead-out terminal OUT and the earth terminal, the tie point of R7, counter-rotating input terminal (-) at operational amplification circuit A1 is gone up input reference voltage V1, in resistance R 3, be connected in series with gate terminal between the tie point of resistance R 4 and the antenna terminal LB and be connected MOS transistor M2 on the antenna terminal LA, be connected MOS transistor M3 on the lead-out terminal of above-mentioned operational amplification circuit A1 with gate terminal, between the gate terminal of MOS transistor M1 and antenna terminal LB, be connected in series with gate terminal and be connected MOS transistor M4 on the antenna terminal LA, resistance R 5, and gate terminal is connected the MOS transistor M5 on the lead-out terminal of above-mentioned operational amplification circuit A1.
MOS transistor M1, when the current potential of antenna terminal LA was higher than earthing potential, as making electric current carry out work from the rectifier cell that antenna terminal LA flow to lead-out terminal OUT, capacitor C 1 provided electric current between the power supply between lead-out terminal OUT and earth terminal to being connected.The supply voltage VDD that has been carried out filtering by capacitor C between power supply 1 is provided to internal circuit B6.
Transtation mission circuit (load-modulate circuit) B8, be connected between antenna terminal LA and the earth terminal, by diode D1, constitute, the electric current that flows through between antenna terminal LA and LB is changed according to control signal by the switch S 1 and the current source I1 of control signal TX control.
Fig. 7 illustrates the I-E characteristic of each terminal voltage in power circuit shown in Figure 6 and the transtation mission circuit (load-modulate circuit).
Electric current (Current) axle (X-axis) expression flow to the current amplitude of the electric current I 2 of antenna terminal LA, and voltage (Voltage) axle (Y-axis) is represented the voltage amplitude of each terminal.W7 represents the voltage between the antenna terminal LA-LB, and W8 represents the supply voltage VDD of power circuit B5 from lead-out terminal OUT output.
In Fig. 6, when supply voltage VDD is lower than predetermined level, in MOS transistor M3 and M5, do not flow through electric current, therefore do not produce voltage at the two ends of resistance R 3 and R4.Thus, the state that MOS transistor M1 is connected with drain terminal with gate terminal carries out the rectification action, therefore following voltage is satisfied in output to lead-out terminal OUT, that is, and and the amount of the voltage of this voltage ratio antenna terminal LA is low between the gate-to-source of MOS transistor M1 voltage Vgs.At this moment, in antenna terminal, mainly flow through and the corresponding electric current of the current sinking of internal circuit B6.
After supply voltage VDD reached predetermined level, MOS transistor M3 and M5 made with the corresponding electric current of supply voltage VDD and flow through.At this, suppose that the transistor size of MOS transistor M3 and M5 equates, the electric current that then flows through MOS transistor M3 and M5 equates.In addition, suppose that resistance R 4 has the resistance more much bigger than resistance R 3, then the voltage that produces between the gate terminal of antenna terminal LA and MOS transistor M1 is approximately the voltage that produces at resistance R 4 two ends.Thus, the slope of voltage W7 is approximately half of resistance R 4 between the antenna terminal of Fig. 7.The increase of the antenna terminal voltage of this moment is approximately the voltage VR4 that produces at resistance R 4 two ends.
At this, on the drain terminal of MOS transistor M5, connected resistance R 5, the electric current that therefore flows through MOS transistor M5 is not the above electric current of certain value.And on the drain terminal of MOS transistor M3, not connecting resistance, the electric current that therefore flows through MOS transistor M3 can flow through ad lib, therefore is controlled as only flowing through big electric current after the current saturation of MOS transistor M5 in resistance R 3.Thus, among Fig. 7 between antenna terminal the slope of voltage be approximately resistance R 3.That is, after the current saturation of MOS transistor M5, the recruitment of antenna terminal voltage equals the voltage VR3 in the generation of the two ends of resistance R 3.
According to above content, power circuit B5 is the structure with following characteristic as can be known, that is: reach predetermined voltage as supply voltage VDD, after voltage inhibition action has just begun, the variation of voltage waveform W7 between antenna terminal (change in voltage gradient) changes with respect to electric current and becomes greatly, and then when input current became big, the variation of voltage waveform W7 between antenna terminal (change in voltage gradient) diminished with respect to electric current.
Fig. 8 is illustrated in the I-E characteristic of each terminal voltage when making the transtation mission circuit on/off in power circuit shown in Figure 6 and the transtation mission circuit (load-modulate circuit).
The current amplitude of the electric current I 2 of antenna terminal LA is flow through in electric current (Current) axle (X-axis) expression, and voltage (Voltage) axle (Y-axis) is represented the voltage amplitude of each terminal.Voltage between the antenna terminal when W7 represents transtation mission circuit B8 disconnection, voltage between the antenna terminal when W9 represents transtation mission circuit B8 connection, the output voltage of power circuit B5 when the output voltage of the power circuit B5 when W8 represents transtation mission circuit B8 disconnection, W10 are represented transtation mission circuit B8 connection.In addition, same with Fig. 3, W5 and W6 illustrate an example of I-E characteristic from the output of antenna both sides terminal shown in Figure 1, the I-E characteristic when W5 represents short-range communication, the I-E characteristic when W6 represents telecommunication.Wherein, I-E characteristic W6, its output resistance R0 illustrated in figures 1 and 2 is bigger.
Can think, same with Fig. 3, the waveform of voltage W9 between the antenna terminal when transtation mission circuit B8 connects is the waveform of the amount of the waveform of voltage W7 between the antenna terminal when transtation mission circuit B8 is disconnected output current I1 from transtation mission circuit B8 to current axis (X-axis) direction that moved.In addition, because I-E characteristic W5 with the output characteristic of representing antenna, the intersection point of W6 becomes the working point in the condition separately, therefore, I-E characteristic W5, working point when the intersection point of voltage W9 is represented transtation mission circuit B8 connection between W6 and antenna terminal, I-E characteristic W5, current change quantity Δ I2c that outputs to antenna terminal and Δ I2d that the difference of the electric current of the working point when working point the when working point the when intersection point of voltage W7 represents that transtation mission circuit B8 disconnects between W6 and antenna terminal, above-mentioned connection and above-mentioned disconnection does not produce for the on/off owing to transtation mission circuit B8.
Thus, current change quantity Δ I2d in the big I-E characteristic W6 of slope, greater than the current change quantity Δ I2c in the little I-E characteristic W5 of slope, therefore, can confirm, the slope of voltage W7 can be approximately under the situation of half zone of resistance R 4 moving between antenna terminal when transtation mission circuit B8 disconnects, and can suppress the decay that electric current that transtation mission circuit B8 produces changes I1.The coefficient on the right during this expression can increase above-mentioned (formula 1).
According to above content, voltage sharply changes between antenna terminal by making in the little zone of the electric current that flows through antenna, make in the big zone of the electric current that flows through antenna that voltage slowly changes between antenna terminal, change even when telecommunication, also can export big electric current thus, can realize the stable data of read write line is transmitted.
At this, suppose that the transistor size of MOS transistor M3 and M5 equates, resistance R 4 is much larger than resistance R 3, but is not limited to this.For example, also can be to make the transistor size of MOS transistor M5 much larger than MOS transistor M3, make resistance R 3 equal resistance R 4.
(execution mode 2)
Fig. 9 is the circuit diagram of the structure example that is installed in the power circuit on the semiconductor device of embodiments of the present invention 2.In present embodiment 2, the variation of the power circuit in the execution mode 1 of above-mentioned Fig. 6 is shown.
Power circuit shown in Figure 9, the gate terminal that is connected in series between antenna terminal LA and antenna terminal LB is connected MOS transistor M6 on the antenna terminal LB and gate terminal and is connected MOS transistor M7 on the antenna terminal LA, and the tie point of MOS transistor M6 and M7 is taken as earth terminal.In addition, the power circuit B15 that is connected with antenna terminal LA, lead-out terminal OUT, earth terminal has the structure same with power circuit B5 shown in Figure 6 respectively with the power circuit B16 that is connected with antenna terminal LB, lead-out terminal OUT, earth terminal, and capacitor C 1 and operational amplification circuit A1 are general between MOS transistor M3, M5, resistance R 5, R6, R7, power supply.
At this, the full-wave rectifying circuit that is constructed as follows, that is: MOS transistor M1 and M8 carry out work as the rectifier cell (diode) of hot side, and MOS transistor M6 and M7 carry out work as the rectifier cell of low potential side.
Thus, the effect same can be accessed, and the pulsation (ripple) of output voltage can be reduced by the application full-wave rectifying circuit with power circuit shown in Figure 6.
(execution mode 3)
Figure 10 is the circuit diagram of the structure example that is installed in the power circuit on the semiconductor device of expression embodiments of the present invention 3.In present embodiment 3, the variation of the execution mode 1 of above-mentioned Fig. 6 is shown.
Same with Fig. 6, power circuit B17 has rectifying and wave-filtering function and output voltage inhibit feature, is connected with the antenna that is installed in the non-contact electronic on antenna terminal LA and LB.At this, also antenna terminal LB is used as the earth terminal in the chip, can obtain on lead-out terminal OUT with antenna terminal LB is the supply voltage VDD of benchmark, and is provided to internal circuit B6.
The structure of power circuit B17 is as follows, that is: between antenna terminal LA and lead-out terminal OUT, be connected with MOS transistor M9 and the resistance R 9 that has connected resistance R 8, be connected with the resistance R 6 that between lead-out terminal OUT and antenna terminal LB, is connected in series on the non-counter-rotating input terminal (+) of operational amplification circuit A1, the tie point of R7, counter-rotating input terminal (-) at operational amplification circuit A1 is gone up input reference voltage V1, at the MOS transistor M12 that is connected with between lead-out terminal OUT and the antenna terminal LB on the lead-out terminal that gate terminal is connected above-mentioned operational amplification circuit A1, between the gate terminal of MOS transistor M9 and antenna terminal LB, be connected in series with gate terminal and be connected MOS transistor M10 on the antenna terminal LA, resistance R 10, and gate terminal is connected the MOS transistor M11 on the lead-out terminal of above-mentioned operational amplification circuit A1.
MOS transistor M9, when the current potential of antenna terminal LA is higher than the current potential of antenna terminal LB, as making electric current carry out work, be connected via 9 pairs of resistance R that capacitor C 1 provides electric current between power supply between lead-out terminal OUT and antenna terminal LB from the rectifier cell that antenna terminal LA flow to lead-out terminal OUT.The supply voltage VDD that has been carried out filtering by capacitor C between power supply 1 is provided to internal circuit B6.
Transtation mission circuit B8 and Fig. 6 are same, be connected between antenna terminal LA and the antenna terminal LB, constitute by diode D1, the switch S 1 and the current source I1 that control by control signal, the electric current that flows through between antenna terminal LA and LB is changed according to control signal TX.
In the power circuit B17 of Figure 10, the MOS transistor M9 and the resistance R 9 of carrying out work as rectifier cell are connected in series, therefore exist the supply voltage VDD that obtains by lead-out terminal OUT to reach the big such difference of forward voltage of predetermined voltage rectifier cell before, but can realize the action same with power circuit B5 shown in Figure 6.
Power circuit B17 also has following feature: little because of the voltage on the drain terminal that is applied to MOS transistor M11 and M12, therefore can relax MOS transistor M11 and the required component pressure of M12.
Thus, can use identical transistor and can flow through the thin MOS transistor of grid oxidation film of big electric current, therefore, can reduce the transistor size of MOS transistor M11 and M12, can dwindle chip area MOS transistor M11 and M12.
(execution mode 4)
Figure 11 is the circuit diagram of the structure example that is installed in the power circuit on the semiconductor device of expression embodiments of the present invention 4.In present embodiment 4, the variation of the power circuit in the execution mode 3 of above-mentioned Figure 10 is shown.
Same with Fig. 9, the gate terminal that is connected in series between antenna terminal LA and antenna terminal LB is connected MOS transistor M13 on the antenna terminal LB and gate terminal and is connected MOS transistor M14 on the antenna terminal LA, and the tie point of MOS transistor M13 and M14 is taken as earth terminal.In addition, the power circuit B18 that is connected with antenna terminal LA, lead-out terminal OUT, earth terminal has the structure same with power circuit B17 shown in Figure 10 respectively with the power circuit B19 that is connected with antenna terminal LB, lead-out terminal OUT, earth terminal, and capacitor C 1 and operational amplification circuit A1 are general between MOS transistor M11 M12, resistance R 6, R7, R10, power supply.
At this, the full-wave rectifying circuit that is constructed as follows, that is: MOS transistor M9 and M15 carry out work as the rectifier cell of hot side, and MOS transistor M13 and M14 carry out work as the rectifier cell of low potential side.
Thus, the effect same can be accessed, and the pulsation of output voltage can be reduced by the application full-wave rectifying circuit with power circuit shown in Figure 10.
(execution mode 5)
Figure 12 is the circuit diagram of the structure example that is installed in the power circuit on the semiconductor device of expression embodiment of the present invention 5.In present embodiment 5, the variation of the execution mode 4 of above-mentioned Figure 11 is shown.
Power circuit shown in Figure 12 is resistance R 9 and the resistance R 11 incorporate structures that make in the power circuit shown in Figure 11.In Figure 11, in resistance R 9 and R11, flow through big electric current, therefore consider current density, the resistance width is increased, then the occupied area on the chip is big.
If note resistance R 9 and R11, then current flowing resistance R9 only is when the current potential of antenna terminal LA is higher than lead-out terminal OUT, current flowing resistance R11 only is when the current potential of antenna terminal LB is higher than lead-out terminal OUT, and therefore, electric current does not flow through resistance R 9 and R11 simultaneously.
Therefore, by the resistance R 12 of having inserted resistance R 9 and R11 as shown in figure 12 shared, can make the resistance that flows through big electric current is 1.Thus, the big resistance of area ratio/occupancy ratio is reduced by half, therefore can dwindle chip area.
(execution mode 6)
Figure 13 is the circuit diagram of the structure example that is installed in the power circuit on the semiconductor device of expression embodiments of the present invention 6.In present embodiment 6, illustrating with Fig. 9 is that example has been added the power circuit of load-modulate function (transtation mission circuit B8).
Power circuit shown in Figure 13, has the structure of between the resistance R 5 of power circuit shown in Figure 9 and MOS transistor M5, having inserted MOS transistor M16, by make MOS transistor M16 conducting by control signal TX, realize the state that the load-modulate function has been closed, by MOS transistor M16 being ended, realize the state that the load-modulate function has been connected by control signal TX.
Figure 14 is illustrated in the I-E characteristic of each terminal voltage when making MOS transistor M16 on/off in the power circuit with load-modulate function shown in Figure 13.
The current amplitude of the electric current I 2 of antenna terminal is flow through in electric current (Current) axle (X-axis) expression, and voltage (Voltage) axle (Y-axis) is represented the voltage amplitude of each terminal.Voltage between the antenna terminal LA-LB when W7 represents MOS transistor M16 conducting, W11 represent MOS transistor M16 by the time antenna terminal LA-LB between voltage, W12 is illustrated in the supply voltage VDD that lead-out terminal OUT obtains.
Same with Fig. 3 and Fig. 8, owing to become working point in the condition separately with the intersection point of the I-E characteristic W5 of output characteristic of expression antenna and W6, therefore, I-E characteristic W5, working point when the intersection point of the waveform of voltage W7 is represented MOS transistor M16 conducting between W6 and antenna terminal, I-E characteristic W5, between W6 and antenna terminal the intersection point of the waveform of voltage W11 represent MOS transistor M16 by the time the working point, the difference of the electric current of the working point of the working point during above-mentioned conducting during with above-mentioned ending does not become current change quantity Δ I2e that outputs to antenna terminal and the Δ I2f that the on/off owing to MOS transistor M16 produces.
Thus, as I-E characteristic W6,, can realize stable data transmission to read write line even when its slope becomes big telecommunication, also can between antenna terminal, produce big electric current and change.In addition,, only increase MOS transistor M16 and just can realize the load-modulate function, therefore can dwindle chip area by constituting the circuit structure of present embodiment.
At this, be the method that example shows additional load modulation function in power circuit with Fig. 9, this method can certainly be applicable to Fig. 6, Figure 10, the represented circuit of Figure 11, Figure 12.
(execution mode 7)
Figure 15 is the circuit diagram of the structure example that is installed in the power circuit on the semiconductor device of expression embodiments of the present invention 7.In present embodiment 7, the variation of the resistance R 5 of above-mentioned Fig. 6 is shown.
Power circuit shown in Figure 15 is the structure that the resistance R in the power circuit shown in Figure 65 is replaced into current-limiting circuit B20.Current-limiting circuit B20 is made of current source I3, MOS transistor M17 and M18, wherein, the MOS transistor M17 that current source I3 and gate terminal, drain terminal connect together is connected in series between lead-out terminal OUT and the earth terminal, and the gate terminal of MOS transistor M18 is connected on the tie point of current source I3 and MOS transistor M17.
In Fig. 6, the function that resistance R 5 realizations limit the electric current that flows through MOS transistor M5.At this moment, flow through the confined current level of electric current of MOS transistor M5, change according to threshold voltage, the temperature of MOS transistor M1 and M4.
At this, the resistance R 5 of Fig. 6 is replaced into above-mentioned current-limiting circuit B20, to the little current source of current source I3 serviceability temperature dependence, thus, can realize with the same function of Fig. 6 and reduce characteristic error.
At this, be the application examples that example illustrates current-limiting circuit B20 with Fig. 6, still, certainly also can be applied to Fig. 9, Figure 10, Figure 11, Figure 12, circuit shown in Figure 13.
The effect that simple declaration is obtained by representative content in the disclosed invention of the application is as follows.
Promptly, semiconductor device of the present invention and the non-contact electronic that has used this device, possesses antenna, rectification function, the load-modulate function, regulatory function, above-mentioned regulatory function has such characteristic: when the power that offers non-contact electronic hour, the voltage that produces at the two ends of antenna is big with respect to the variation of the electric current that flows through antenna, when the power that offers non-contact electronic is big, the voltage that produces at the two ends of antenna is little with respect to the variation of the electric current that flows through antenna, thus, the data from non-contact electronic to read write line when especially the communication distance between non-contact electronic and read write line is far away transmit, can produce big load-modulate electric current.
More than, the invention of being made by the inventor is specified based on its execution mode, but the present invention is not limited to above-mentioned execution mode, self-evident, in the scope that does not break away from its aim, can carry out various changes.
For example, in the above-described embodiment, constituted power circuit, but also can use P type MOS transistor by N type MOS transistor.In addition, be not limited to MOS transistor, also can make field-effect transistors etc.
Industrial utilizability
The present invention just in time is applicable to the non-contact electronic take IC-card, IC tag as representative.
Claims (12)
1. a semiconductor device is characterized in that, comprising:
First antenna terminal and second antenna terminal that connect antenna;
Power circuit carries out the rectification and the voltage control of the signal between above-mentioned first antenna terminal and second antenna terminal; And
The load-modulate circuit carries out the modulation of the signal between above-mentioned first antenna terminal and second antenna terminal,
The output voltage of above-mentioned power circuit reaches predetermined voltage and carries out that voltage suppresses above-mentioned first antenna terminal in the zone of action and the I-E characteristic between second antenna terminal is: the change in voltage gradient of first galvanic areas is greater than the change in voltage gradient of the second big galvanic areas of above-mentioned first galvanic areas of current ratio.
2. semiconductor device according to claim 1 is characterized in that:
Above-mentioned load-modulate circuit has and suppresses the function that above-mentioned first antenna terminal in the zone of action and the I-E characteristic between second antenna terminal switch with carrying out above-mentioned voltage between first characteristic and second characteristic, wherein, above-mentioned first characteristic change in voltage gradient that is above-mentioned first galvanic areas is greater than the change in voltage gradient of above-mentioned second galvanic areas; The change in voltage gradient that above-mentioned second characteristic is above-mentioned first galvanic areas equates with the change in voltage gradient of above-mentioned second galvanic areas.
3. semiconductor device according to claim 1 is characterized in that:
Above-mentioned power circuit has first voltage control circuit and first voltage detecting circuit,
Above-mentioned first voltage control circuit has first input end and first lead-out terminal,
Between above-mentioned first input end and above-mentioned first lead-out terminal, be connected with first MOS transistor, between the gate terminal of this first MOS transistor and drain terminal, be connected in series with first resistance and second resistance, wherein, one end of above-mentioned first resistance is connected with the drain terminal of above-mentioned first MOS transistor
Be connected in series with second MOS transistor and the 3rd MOS transistor between the tie point of above-mentioned first resistance and above-mentioned second resistance and earth terminal, wherein, the gate terminal of above-mentioned second MOS transistor is connected on above-mentioned first input end,
Be connected in series with the 4th MOS transistor, current-limiting circuit and the 5th MOS transistor between the gate terminal of above-mentioned first MOS transistor and above-mentioned earth terminal, wherein, the gate terminal of above-mentioned the 4th MOS transistor is connected on above-mentioned first input end,
The gate terminal of above-mentioned the 3rd MOS transistor and above-mentioned the 5th MOS transistor is connected on the lead-out terminal of above-mentioned first voltage detecting circuit,
Above-mentioned current-limiting circuit limits the voltage that can produce by the electric current that flows through between the drain terminal-source terminal that is limited in above-mentioned the 5th MOS transistor on above-mentioned second resistance,
First input end of above-mentioned first voltage control circuit is connected on above-mentioned first antenna terminal,
First lead-out terminal of above-mentioned first voltage control circuit is connected on the power supply terminal,
Above-mentioned first voltage detecting circuit output and the supply voltage correspondent voltage that between above-mentioned power supply terminal and above-mentioned earth terminal, produces.
4. semiconductor device according to claim 3 is characterized in that:
Above-mentioned power circuit also has second voltage control circuit, first rectifier cell and second rectifier cell,
Above-mentioned second voltage control circuit has second input terminal and second lead-out terminal,
Second input terminal of above-mentioned second voltage control circuit is connected on above-mentioned second antenna terminal,
Second lead-out terminal of above-mentioned second voltage control circuit is connected on the above-mentioned power supply terminal,
Between above-mentioned first antenna terminal and above-mentioned earth terminal, be connected with above-mentioned first rectifier cell,
Between above-mentioned second antenna terminal and above-mentioned earth terminal, be connected with above-mentioned second rectifier cell.
5. semiconductor device according to claim 3 is characterized in that:
Above-mentioned current-limiting circuit is the 5th resistance.
6. semiconductor device according to claim 3 is characterized in that:
Above-mentioned current-limiting circuit is made of the 5th resistance that is connected in series and the tenth MOS transistor,
The above-mentioned load-modulate circuit of above-mentioned the tenth MOS transistor double as.
7. semiconductor device according to claim 3 is characterized in that:
The resistance of above-mentioned second resistance is greater than the resistance of above-mentioned first resistance.
8. semiconductor device according to claim 1 is characterized in that:
Above-mentioned power circuit is made of the tertiary voltage control circuit and first voltage detecting circuit,
Above-mentioned tertiary voltage control circuit has the 3rd input terminal and the 3rd lead-out terminal,
Between above-mentioned the 3rd input terminal and above-mentioned the 3rd lead-out terminal, be connected with the 6th MOS transistor, between the gate terminal of the 6th MOS transistor and drain terminal, be connected with the 3rd resistance,
Between above-mentioned the 3rd lead-out terminal and earth terminal, be connected in series with the 4th resistance and the 7th MOS transistor,
Be connected in series with the 8th MOS transistor, current-limiting circuit and the 9th MOS transistor between the gate terminal of above-mentioned the 6th MOS transistor and earth terminal, wherein, the gate terminal of above-mentioned the 8th MOS transistor is connected on above-mentioned the 3rd input terminal,
The gate terminal of the gate terminal of above-mentioned the 7th MOS transistor and above-mentioned the 9th MOS transistor is connected on the lead-out terminal of above-mentioned first voltage detecting circuit,
Above-mentioned the 3rd input terminal of above-mentioned tertiary voltage control circuit is connected on above-mentioned first antenna terminal,
Between above-mentioned the 3rd lead-out terminal of above-mentioned tertiary voltage control circuit and power supply terminal, be connected with above-mentioned the 4th resistance,
Above-mentioned current-limiting circuit limits the voltage that can produce by the electric current that flows through between the drain terminal-source terminal that is limited in above-mentioned the 9th MOS transistor on above-mentioned the 3rd resistance,
Above-mentioned first voltage detecting circuit output and the supply voltage correspondent voltage that between above-mentioned power supply terminal and above-mentioned earth terminal, produces.
9. semiconductor device according to claim 8 is characterized in that:
Above-mentioned power circuit also has the 4th voltage control circuit, first rectifier cell and second rectifier cell,
Above-mentioned the 4th voltage control circuit has four-input terminal and the 4th lead-out terminal,
Four-input terminal of above-mentioned the 4th voltage control circuit is connected on above-mentioned second antenna terminal,
The 4th lead-out terminal of above-mentioned the 4th voltage control circuit is connected on the above-mentioned power supply terminal,
Between above-mentioned first antenna terminal and above-mentioned earth terminal, be connected with above-mentioned first rectifier cell,
Between above-mentioned second antenna terminal and above-mentioned earth terminal, be connected with above-mentioned second rectifier cell.
10. semiconductor device according to claim 8 is characterized in that:
Above-mentioned current-limiting circuit is the 5th resistance.
11. semiconductor device according to claim 8 is characterized in that:
Above-mentioned current-limiting circuit is made of the 5th resistance that is connected in series and the tenth MOS transistor,
The above-mentioned load-modulate circuit of above-mentioned the tenth MOS transistor double as.
12. a non-contact electronic is characterized in that having:
In the claim 1～11 each described semiconductor device and
Be connected the antenna on above-mentioned first antenna terminal and second antenna terminal.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP117852/2006 | 2006-04-21 | ||
| JP2006117852A JP4901284B2 (en) | 2006-04-21 | 2006-04-21 | Semiconductor integrated circuit device and non-contact type electronic device using the same |
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| CN101060257A CN101060257A (en) | 2007-10-24 |
| CN100574047C true CN100574047C (en) | 2009-12-23 |
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| CNB2007100964933A Active CN100574047C (en) | 2006-04-21 | 2007-04-19 | Semiconductor device and the non-contact electronic that has used this device |
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| US (1) | US8198983B2 (en) |
| JP (1) | JP4901284B2 (en) |
| CN (1) | CN100574047C (en) |
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| JP5155642B2 (en) * | 2007-11-28 | 2013-03-06 | ルネサスエレクトロニクス株式会社 | ID tag |
| GB0801225D0 (en) | 2008-01-23 | 2008-02-27 | Innovision Res & Tech Plc | Near field RF communications |
| JP4637204B2 (en) * | 2008-04-30 | 2011-02-23 | フェリカネットワークス株式会社 | Communication apparatus and antenna characteristic control method |
| DE102008033972A1 (en) * | 2008-07-21 | 2010-02-04 | Infineon Technologies Ag | Coil arrangement for use in wireless radio frequency identification arrangement of smartcard, has diode, transistor and constant-current source arranged such that parallel arrangement regulates voltage between coil connectors |
| EP2178030A1 (en) * | 2008-09-30 | 2010-04-21 | Gemplus | Method and system for data communication with an inaccessible electronic device |
| JP5215154B2 (en) * | 2008-12-09 | 2013-06-19 | ルネサスエレクトロニクス株式会社 | Semiconductor integrated circuit device, non-contact / contact electronic device using the same, and portable information terminal |
| JP5762723B2 (en) * | 2009-11-20 | 2015-08-12 | 株式会社半導体エネルギー研究所 | Modulation circuit and semiconductor device having the same |
| KR101780748B1 (en) | 2010-02-19 | 2017-09-21 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Demodulation circuit and rfid tag including the demodulatiion circuit |
| US8928466B2 (en) * | 2010-08-04 | 2015-01-06 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| GB2484104B (en) * | 2010-09-29 | 2017-11-08 | Broadcom Europe Ltd | Near field RF communicators |
| US20130271102A1 (en) * | 2012-04-12 | 2013-10-17 | Roger Lin | Power supply control structure |
| DE102014106815B4 (en) * | 2014-05-14 | 2024-01-18 | Infineon Technologies Ag | Communication module |
| JP6550914B2 (en) * | 2015-05-13 | 2019-07-31 | セイコーエプソン株式会社 | Control device, electronic device and non-contact power transmission system |
| US9774211B2 (en) * | 2015-05-14 | 2017-09-26 | Intel Corporation | Voltage regulation in wireless power |
| KR102593912B1 (en) * | 2018-01-09 | 2023-10-26 | 삼성전자주식회사 | Mode-changeable power supply circuit and smart card including the same |
| CN109450032B (en) * | 2018-12-04 | 2021-08-24 | 北京小米移动软件有限公司 | Wireless charging processing method, device and equipment |
| JP6860039B2 (en) * | 2019-06-24 | 2021-04-14 | セイコーエプソン株式会社 | Control devices and electronic devices |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| SG54559A1 (en) * | 1996-09-13 | 1998-11-16 | Hitachi Ltd | Power transmission system ic card and information communication system using ic card |
| JP3719587B2 (en) * | 2000-03-28 | 2005-11-24 | 株式会社日立製作所 | Semiconductor devices and IC cards |
| JP3990100B2 (en) * | 2000-09-26 | 2007-10-10 | 株式会社東芝 | Non-contact information recording medium |
| JP2003319574A (en) * | 2002-04-25 | 2003-11-07 | Hitachi Ltd | Semiconductor integrated circuit device and non-contact electronic device |
| KR20070076071A (en) * | 2006-01-17 | 2007-07-24 | 삼성전자주식회사 | Contactless card and contactless card system |
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| US8198983B2 (en) | 2012-06-12 |
| JP2007293423A (en) | 2007-11-08 |
| JP4901284B2 (en) | 2012-03-21 |
| CN101060257A (en) | 2007-10-24 |
| US20070249398A1 (en) | 2007-10-25 |
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