JP4759053B2 - Non-contact type electronic device and semiconductor integrated circuit device mounted thereon - Google Patents

Description

  The present invention relates to a technology of a non-contact type electronic device, and particularly to a technology effective when applied to a non-contact type electronic device represented by an IC card or an IC tag and a semiconductor integrated circuit device mounted thereon.

  As a technique studied by the present inventor, for example, the following techniques can be considered in a non-contact type electronic device such as an IC card, an IC tag, an RFID, and a mobile phone.

  Non-contact type electronic devices having a semiconductor integrated circuit device having functions such as a CPU and a memory inside are spreading in the fields of transportation and logistics. Although not particularly limited, the contactless electronic device does not have a power source such as a battery, and operates by generating a power source from electromagnetic waves received by an antenna. The non-contact type electronic device receives data transmitted by modulating electromagnetic waves from a reader / writer (interrogator), and further performs signal processing on the received data by a CPU, a memory, or the like. As a result, the electromagnetic wave received by the antenna is modulated by changing the load between the antenna terminals according to the obtained data, and the data is transmitted to the reader / writer.

  In such a non-contact type electronic device, a capacitor and a variable capacitance element are connected in series between the antenna terminals, and the resonance frequency is controlled by applying a control voltage to the variable capacitance element, which is supplied to the non-contact type electronic device. There is a technique for suppressing electric power (see, for example, Patent Document 1).

Further, according to the power supplied to the non-contact type electronic device, the resonance frequency is changed by logically switching the capacitance connected between the antenna terminals, thereby suppressing the power supplied to the non-contact type electronic device. There is a technology (see, for example, Patent Document 2). Further, Patent Document 2 describes that the resonance frequency is changed step by step by switching a plurality of capacitors.
Japanese Patent Laid-Open No. 9-147070 JP 2005-204493 A

  By the way, as a result of the study of the technique of the non-contact type electronic device as described above, the following has been clarified.

  In recent years, a sensor circuit that detects temperature, etc., is mounted on a non-contact electronic device that operates by generating power from electromagnetic waves received by an antenna, and measures the sensor circuit according to data transmitted from a reader / writer. Some measurement data can be transmitted to the reader / writer by the modulation operation.

  A non-contact type electronic device operates by generating a power source by rectifying and smoothing an electromagnetic wave supplied from a reader / writer. Generally, since the electric power supplied to the non-contact type electronic device changes depending on the distance between the reader / writer and the non-contact type electronic device, the degree of self-heating of the non-contact type electronic device changes.

  For example, when a temperature sensor circuit is mounted on such a non-contact type electronic device, the amount of self-heating is changed according to the communication distance, so an error occurs in the temperature measured by the temperature sensor circuit, and the correct measurement is performed. There was a problem that results could not be obtained.

  Therefore, the present inventor has come up with a technique for preventing excessive power from being supplied to the non-contact type electronic device by controlling the resonance frequency according to the power received by the non-contact type electronic device.

  However, when changing the resonance frequency using the variable capacitance element, it is necessary to mount the variable capacitance element capable of sufficiently changing the resonance frequency in the non-contact type electronic device by using some means. It is preferable to arrange a variable capacitance element in a semiconductor integrated circuit device mounted on a non-contact type electronic device. However, in a semiconductor manufacturing process that is usually used for mounting a logic circuit or the like, a resonance frequency is set. In some cases, a variable capacitance element that can be changed sufficiently is not mounted.

  Further, when the resonance capacitance is logically switched, it is necessary to detect the power received by the non-contact electronic device and binarize the received power level. For example, when the power received by the contactless electronic device exceeds a predetermined level, the resonance capacitance is logically switched. However, if the received power of the non-contact type electronic device falls below a predetermined level as a result of switching the resonance capacity, the resonance capacity is controlled to return to the original level. Therefore, the resonance capacity is switched. Thus, when the received power level is close to the level for switching the resonance capacitance, the switching operation of the resonance capacitance is repeated, and the power received by the non-contact type electronic device may not be stable.

  As described above, there is a resonance frequency control means for suppressing the non-contact type electronic device from generating heat due to excessive electric power supplied to the non-contact type electronic device, but it is mounted on a general semiconductor integrated circuit device. There is a problem that the stability in the boundary condition is deteriorated.

  Accordingly, an object of the present invention is to provide a circuit technique capable of stably controlling the power received by the non-contact type electronic device.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  That is, the non-contact electronic device according to the present invention and the semiconductor integrated circuit device mounted thereon include a resonance capacitance control circuit. In the resonant capacitance control circuit, a first capacitor and a second capacitor are connected in series between a first antenna terminal and a second antenna terminal to which an antenna is connected, and the first capacitor and the second capacitor are connected. A charge / discharge control circuit is connected to the connection point of the capacitor. The charge / discharge control circuit controls the charge accumulated in the first capacitor when the potential of the first antenna terminal is higher than the potential of the second antenna terminal, and the second antenna terminal When the potential of the first antenna terminal is higher than the potential of the first antenna terminal, the resonant capacitance value between the first antenna terminal and the second antenna terminal is controlled by controlling the charge accumulated in the second capacitor. To control.

  Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  That is, it is possible to control the resonance frequency of the resonance circuit constituted by the antenna and the resonance capacitance control circuit, and to suppress excessive power supply to the rectifier circuit.

1 is a block diagram showing a basic configuration of a contactless electronic device and a semiconductor integrated circuit device according to a first embodiment of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view showing a configuration of a non-contact electronic device and a semiconductor integrated circuit device, a wiring board, and a reader / writer according to a first embodiment of the present invention. 1 is a circuit diagram showing a configuration example of a resonant capacitance control circuit mounted on a semiconductor integrated circuit device according to a first embodiment of the present invention. It is a circuit diagram which shows the structural example of the resonance capacity control circuit mounted in the semiconductor integrated circuit device concerning Embodiment 2 of this invention. FIG. 5 is a diagram showing an operation waveform of each terminal voltage of the resonance capacitance control circuit shown in FIG. 4. It is a circuit diagram which shows the structural example of the resonant capacity control circuit mounted in the semiconductor integrated circuit device which concerns on Embodiment 3 of this invention. It is a circuit diagram which shows the structural example of the resonant capacity control circuit mounted in the semiconductor integrated circuit device which concerns on Embodiment 4 of this invention. It is a block diagram which shows the structural example of the resonance capacity control circuit and rectification smoothing circuit which are mounted in the semiconductor integrated circuit device concerning Embodiment 5 of this invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

(Embodiment 1)
FIG. 1 is a block diagram showing a basic configuration of a contactless electronic device and a semiconductor integrated circuit device according to Embodiment 1 of the present invention.

  First, an example of the configuration of the non-contact electronic device and the semiconductor integrated circuit device according to the first embodiment will be described with reference to FIG. The contactless electronic device according to the first embodiment is, for example, an IC card, an IC tag, an RFID, a mobile phone, or the like.

  In FIG. 1, B1 is a non-contact type electronic device, B2 is a semiconductor integrated circuit device mounted on the non-contact type electronic device B1, and L0 is an antenna mounted on the non-contact type electronic device B1. The semiconductor integrated circuit device B2 has a resonance capacitance control circuit B3, a rectifying / smoothing circuit B4, and an internal circuit B5, and has antenna terminals LA and LB for connecting the antenna L0. In FIG. 1, the resonance capacitor C0 is connected in parallel to the antenna L0, but is not necessarily connected because it is adjusted in consideration of the resonance capacitance control circuit B3, parasitic capacitance, and the like.

  FIG. 2 shows a structural example of the non-contact type electronic device B1. FIG. 2 shows an example of an IC card, but the present invention is not limited to this.

  The non-contact type electronic device B1 takes the form of a card by a resin-molded printed circuit board B10. The antenna L0 that receives electromagnetic waves from the external reader / writer B13 is constituted by a spiral coil B11 formed by wiring of the printed circuit board B10. In the semiconductor integrated circuit device B2 composed of one IC chip B12, a coil B11 serving as an antenna L0 is connected to the IC chip B12. The antenna L0 (coil B11) that has received the electromagnetic wave from the reader / writer B13 outputs a high-frequency AC signal to the antenna terminals LA and LB. This AC signal is partially modulated by an information signal (data).

  The present invention is typically applied to a non-contact type electronic device that does not have terminals for external input / output on the surface of the non-contact type electronic device. Of course, you may use for the dual type non-contact-type electronic device which has both a non-contact interface and an input-output terminal. Although not particularly limited, the semiconductor integrated circuit device B2 is formed on a single semiconductor substrate such as single crystal silicon or the like by a known semiconductor integrated circuit device manufacturing technique.

  In FIG. 1, the resonance capacitance control circuit B3 controls the resonance capacitance according to the electric power supplied between the antenna terminals, thereby resonating the resonance circuit constituted by the antenna L0, the resonance capacitance control circuit B3, and the resonance capacitance C0. Change the frequency.

  The rectifying / smoothing circuit B4 includes a rectifying circuit and a smoothing capacitor, and may have a regulator function. The regulator function controls so that the voltage generated by the rectifier circuit and the smoothing capacitor does not exceed a predetermined voltage level. The output voltage of the rectifying / smoothing circuit B4 is supplied as the power supply voltage VDD of the internal circuit B5.

  The internal circuit B5 includes a receiving circuit B6, a transmitting circuit B7, a control unit B8, and a memory B9. The receiving circuit B6 demodulates the information signal superimposed on the AC signal received by the antenna L0 provided in the non-contact type electronic device B1, and supplies it to the control unit B8 as a digital information signal. The transmission circuit B7 receives the information signal of the digital signal output from the control unit B8, and modulates the AC signal received by the antenna L0 with the information signal. The reader / writer B13 (see FIG. 2) receives the information signal from the control unit B8 in response to the reflection of the electromagnetic wave from the antenna L0 being changed by the modulation. The memory B9 is used for recording information data and transmission data demodulated with the control unit B8.

  FIG. 3 is a basic configuration diagram of a resonance capacitance control circuit B3 mounted on the semiconductor integrated circuit device B2 according to the present invention.

  In the semiconductor integrated circuit device B2, the resonance capacitance control circuit B3 is connected between the antenna terminal LA (first antenna terminal) and the antenna terminal LB (second antenna terminal). The resonant capacitance control circuit B3 connects a capacitor C1 (first capacitor) and a capacitor C2 (second capacitor) in series between antenna terminals LA and LB that connect an antenna mounted on the non-contact type electronic device B1. Then, the connection point between the capacitors C1 and C2 and the charge / discharge control circuit B14 connected to the antenna terminals LA and LB are connected. The charge / discharge control circuit B14 includes variable resistors R1 and R2 connected in series between the antenna terminals LA and LB, and a connection point between the variable resistors R1 and R2 and a connection point between the capacitors C1 and C2 are connected. . A rectifying / smoothing circuit B4 mounted on the semiconductor integrated circuit device B2 is connected to the antenna terminals LA and LB, and the power supply voltage VDD is output between the output terminal OUT and the ground terminal.

  When the voltage at the antenna terminals LA and LB is lower than a predetermined level, the charge / discharge control circuit B14 controls the resistors R1 and R2 connected in parallel to the capacitors C1 and C2 to increase the resistance. Control is performed so that almost no current flows through R1 and R2. Thereby, it can be approximated that the capacitors C1 and C2 are connected in series between the antenna terminals, and a capacitor having a capacitance value half that of the capacitor C1 or C2 is connected. In the following, although not limited to this, it is assumed that the capacitance values of the capacitors C1 and C2 are equal.

  On the other hand, when the electric potential of the antenna terminal LA is higher than the electric potential of the antenna terminal LB and the voltage between the antenna terminals is higher than a predetermined voltage level, the charge / discharge control circuit B14 depends on the voltage level between the antenna terminals. The resistance R2 connected in parallel to the capacitor C2 is controlled to be small. Further, when the potential of the antenna terminal LB is higher than the potential of the antenna terminal LA and the voltage between the antenna terminals is higher than a predetermined voltage level, it is connected in parallel to the capacitor C1 according to the voltage level between the antenna terminals. The resistance R1 is controlled to be small.

  That is, when the potential of the antenna terminal LA is higher than the potential of the antenna terminal LB, the charge stored in the capacitor C1 is controlled, and when the potential of the antenna terminal LB is higher than the potential of the antenna terminal LA, the charge stored in the capacitor C2. By controlling the resonance capacitance value between the antenna terminal LA and the antenna terminal LB.

  As a result, when the voltage level between the antenna terminals is higher than the predetermined voltage level, the charges accumulated in the capacitors C1 and C2 are controlled, and the capacitance connected between the antenna terminals changes. For example, when the resistance R1 or R2 is controlled to an extremely small resistance value, it can be approximated to a state where a capacitance having a capacitance value equivalent to the capacitance C2 or C1 is connected between the antenna terminals.

  With the above-described operation, the resonance capacitance can be controlled in a range from a capacitance value half of the capacitance C1 to a capacitance value equivalent to the capacitance C1, according to the voltage level generated between the antenna terminals, and the antenna L0 and the resonance capacitance control circuit. The resonance frequency of the resonance circuit constituted by B3 can be controlled.

  For example, if the capacitance values of the capacitors C1 and C2 are set to twice the capacitance value that resonates with the frequency of the electromagnetic wave supplied to the antenna L0, the voltage level generated between the antenna terminals is smaller than the predetermined voltage level. In this case, the maximum power can be received by resonating, and when the voltage level generated between the antenna terminals is higher than the predetermined voltage level, the resonance frequency of the antenna terminal is increased to control the resonance frequency to be lowered. Thus, the power supplied to the rectifying / smoothing circuit B4 can be reduced.

  As a result, excessive power is not supplied to the rectifying / smoothing circuit B4, and the heat generation of the chip can be reduced. Furthermore, since it becomes easy to control the voltage amplitude generated between the antenna terminals to be small, it is easy to protect the withstand voltage of the elements constituting the rectifying and smoothing circuit B4.

  As described above, the charge / discharge control circuit B14 has a means for controlling the resonance capacitance between the antenna terminals by controlling the resistance connected in parallel with the low-potential-side capacitor in the capacitors C1 and C2 connected between the antenna terminals. Although described as an example, the same effect can be obtained by controlling a resistor connected in parallel to the capacitor on the high potential side.

(Embodiment 2)
FIG. 4 is a circuit diagram showing another embodiment of the resonance capacitance control circuit B3 mounted on the semiconductor integrated circuit device B2 according to the present invention. This shows another circuit configuration example of the charge / discharge control circuit B14 mounted on the resonance capacitance control circuit B3 shown in FIG.

  The resonant capacitance control circuit B3 connected between the antenna terminals LA and LB has capacitors C1 and C2 connected in series between the antenna terminals LA and LB that connect the antenna mounted on the non-contact type electronic device B1, The charge / discharge control circuit B14 is connected to the connection point of the capacitors C1 and C2 and the antenna terminals LA and LB. In the charge / discharge control circuit B14, a MOS transistor M1 (first MOS transistor) whose gate terminal is connected to the antenna terminal LB and a MOS transistor M2 (second MOS transistor) whose gate terminal is connected to the antenna terminal LA are connected in series. In this configuration, a variable resistor R3 (variable resistance element) is connected between a connection point between the capacitors C1 and C2 and a connection point between the MOS transistors M1 and M2.

  FIG. 5 shows an example of the operation waveform of each terminal voltage in FIG. This shows the operation waveform of each terminal voltage with reference to the potential at the connection point between the MOS transistors M1 and M2, W0 is the voltage waveform at the connection point between the MOS transistors M1 and M2, and W1 is the voltage waveform at the antenna terminal LA. , W2 is a voltage waveform of the antenna terminal LB, W3 and W4 are voltage waveforms at the connection point of the capacitors C1 and C2, W3 is a voltage waveform when the variable resistor R3 has a very large resistance value, and W4 is extremely variable resistor R3. The voltage waveform in the case of a small resistance value is shown.

  When the potential of the antenna terminal LA is higher than the potential of the antenna terminal LB, the MOS transistor M2 is turned on and the MOS transistor M1 is turned off. Further, when the potential of the antenna terminal LB is higher than the potential of the antenna terminal LA, the MOS transistor M1 is turned on and the MOS transistor M2 is turned off.

  By the operation of the MOS transistors M1 and M2, the connection point of the MOS transistors M1 and M2 is controlled to be equal to the potential of the antenna terminal LA or LB on the low potential side, so that W0, W1, W2 in FIG. The voltage waveform is

  Therefore, the variable resistor R3 operates in a state where it is connected in parallel with the low-potential side capacitor C1 or C2, and when the variable resistor R3 has a very large resistance value, the variable resistor R3 can be ignored, and thus is indicated by W3. As described above, the connection point between the capacitors C1 and C2 is half the voltage between the antenna terminals. On the contrary, when the variable resistor R3 has a very small resistance value, it is equivalent to a state where both ends of the variable resistor R3 are short-circuited. Therefore, as shown by W4, the connection point between the capacitors C1 and C2 is W0. It can be approximated to a state in which the capacitor C1 or C2 is connected between the antenna terminals. According to the resistance value of the variable resistor R3, the resonance capacitance can be controlled in a range from a half capacitance value of the capacitance C1 to a capacitance value equivalent to the capacitance C1, and is configured by the antenna L0 and the resonance capacitance control circuit B3. This shows that the resonance frequency of the resonance circuit can be controlled.

Further, the circuit shown in FIG. 3 requires two variable resistors. However, the variable resistors can be shared, and variations due to the variable resistors can be reduced. Here, the threshold voltages of the MOS transistors M1 and M2 can also contribute to the characteristic error. However, since the MOS transistors M1 and M2 are turned on / off, the influence on the resonance capacitance characteristic is extremely small.

(Embodiment 3)
FIG. 6 is a circuit diagram showing another embodiment of the resonance capacitance control circuit B3 mounted on the semiconductor integrated circuit device B2 according to the present invention. This is an example in which the variable resistor R3 constituting the charge / discharge control circuit B14 mounted on the resonance capacitance control circuit B3 shown in FIG. 4 is configured by a MOS transistor.

  The resonant capacitance control circuit B3 connected between the antenna terminals LA and LB has capacitors C1 and C2 connected in series between the antenna terminals LA and LB that connect the antenna mounted on the non-contact type electronic device B1, A connection point between the capacitors C1 and C2 and a charge / discharge control circuit B14 connected to the antenna terminals LA and LB are connected.

  Further, the charge / discharge control circuit B14 connects in series a MOS transistor M1 having a gate terminal connected to the antenna terminal LB and a MOS transistor M2 having a gate terminal connected to the antenna terminal LA, and a connection point between the capacitors C1 and C2 and the MOS transistor M1. A MOS transistor M3 (variable resistance element, seventh MOS transistor) is connected between the connection points of M2 and M2, and a voltage detection circuit B15 is connected between the antenna terminals LA and LB. At this time, the connection point of the MOS transistors M1 and M2 is connected to the ground terminal.

  In the voltage detection circuit B15, a MOS transistor M4 (first rectifier element) having a gate terminal and a drain terminal connected is connected between the antenna terminal LA and the output terminal OUT2, and between the antenna terminal LB and the output terminal OUT2, A MOS transistor M5 (second rectifier element) having a gate terminal and a drain terminal connected is connected, a capacitor C3 is connected between the output terminal OUT2 and the ground terminal, and a series connection is made between the output terminal OUT2 and the ground terminal. The connection point between the resistors R4 and R5 is connected to the non-inverting input terminal (+) of the operational amplifier circuit A1, the reference voltage V1 is input to the inverting input terminal (−) of the operational amplifier circuit A1, and the output terminal of the operational amplifier circuit A1. In this configuration, N1 is input to the gate terminal of the MOS transistor M3.

  In FIG. 6, the operational amplifier circuit A1 detects the power supplied between the antenna terminals as a voltage generated at the output terminal OUT2, and controls the current flowing through the MOS transistor M3.

  When the voltage generated at the output terminal OUT2 is lower than the predetermined voltage level, that is, when the voltage generated at the antenna terminal is lower than the predetermined voltage level, no current flows through the MOS transistor M3, so that there is a capacitance between the antenna terminals. It can be approximated to a state in which C1 and C2 are connected in series, and a capacitance having a capacitance value half that of the capacitance C1 is connected.

  Further, when the voltage generated at the output terminal OUT2 is higher than a predetermined voltage level, that is, when the voltage generated at the antenna terminal is higher than the predetermined voltage level, the MOS transistor M3 according to the voltage generated at the output terminal OTU2. Therefore, the electric charge stored in the capacitors C1 and C2 is controlled, and the capacitance connected between the antenna terminals changes. For example, when the current flowing through the MOS transistor M3 is controlled to a very large current value, either the capacitor C1 or C2 is short-circuited, so that a capacitor having a capacitance value equivalent to the capacitor C1 is present between the antenna terminals. It can approximate the connected state.

  By the above-described operation, the resonance capacitance can be controlled in a range from a capacitance value half of the capacitance C1 to a capacitance value equivalent to the capacitance C1, according to the voltage level generated between the antenna terminals, and the antenna L0 and the resonance capacitance control circuit. The resonance frequency of the resonance circuit constituted by B3 can be controlled.

  For example, if the capacitance value of the capacitor C1 is set to twice the capacitance value that resonates with the frequency of the electromagnetic wave supplied to the antenna L0, the voltage level generated between the antenna terminals is smaller than a predetermined voltage level. When the maximum power can be received by resonating with the frequency of the antenna and the voltage level generated between the antenna terminals is higher than the predetermined voltage level, the resonance frequency of the antenna terminal is increased to control the resonance frequency to be lowered. Thus, the power supplied to the rectifying / smoothing circuit B4 can be reduced.

  When the polarity of the operational amplifier circuit A1 is reversed and the voltage level generated between the antenna terminals is higher than a predetermined voltage level, the on-resistance of the MOS transistor M3 is increased to reduce the resonance capacitance of the antenna terminal. Thus, the resonance frequency may be controlled to be higher.

  Here, the MOS transistor M2 is turned on only when the potential of the antenna terminal LA is higher than the potential of the antenna terminal LB, and the MOS transistor M1 is turned on only when the potential of the antenna terminal LB is higher than the potential of the antenna terminal LA. The transistors M1 and M2 also operate as a rectifying element on the low potential side.

  Since the current flows through the MOS transistor M4 only when the potential of the antenna terminal LA is higher than the potential of the output terminal OUT2, and the current flows through the MOS transistor M5 only when the potential of the antenna terminal LB is higher than the potential of the output terminal OUT2. The MOS transistors M4 and M5 also operate as a rectifying element on the high potential side.

  From the above, the charge / discharge control circuit B14 also functions as a rectifier circuit, and the capacitor C3 functions as a smoothing capacitor. Therefore, the voltage generated at the output terminal OUT2 is used as the power supply voltage for the internal circuit B5 of the semiconductor integrated circuit device B2. Can be used. As a result, it is not necessary to mount the rectifying / smoothing circuit B4 independent of the resonance capacitance control circuit B3, and the chip area can be reduced.

(Embodiment 4)
FIG. 7 is a circuit diagram showing another embodiment of the resonance capacitance control circuit B3 mounted on the semiconductor integrated circuit device B2 according to the present invention. This shows another circuit configuration example of the charge / discharge control circuit B14 mounted on the resonance capacitance control circuit B3 shown in FIG.

  The resonant capacitance control circuit B3 connected between the antenna terminals LA and LB connects the capacitors C1 and C2 in series between the antenna terminals LA and LB that connect the antenna arranged in the non-contact type electronic device B1, A connection point between the capacitors C1 and C2 and a charge / discharge control circuit B14 connected to the antenna terminals LA and LB are connected.

  The charge / discharge control circuit B14 includes a MOS transistor M6 (third MOS transistor) in which a resistor R6 (first resistor) is connected between the antenna terminal LB and the gate terminal between the antenna terminals LA and LB, and an antenna terminal. A MOS transistor M7 (fourth MOS transistor) having a resistor R7 (second resistor) connected between LA and the gate terminal is connected, and a gate is connected to the antenna terminal LB between the gate terminal of the MOS transistor M6 and the ground terminal. A MOS transistor M8 (fifth MOS transistor) having a terminal connected thereto and a MOS transistor M10 (variable resistance element, seventh MOS transistor) having a gate terminal connected to the output terminal N1 of the voltage detection circuit B15 are connected in series. Between the gate terminal of M7 and the drain terminal of MOS transistor M10 MOS transistor M9 which are connected to the gate terminal to the antenna terminal LA (sixth MOS transistor) is connected.

  The voltage detection circuit B15 is configured to output a voltage corresponding to the voltage generated between the antenna terminals. For example, the circuit configuration illustrated in FIG. 6 may be used. However, in order to connect to the ground terminal in the chip, a rectifying element on the low potential side represented by the MOS transistors M1 and M2 shown in FIG. 6 is also required.

  In FIG. 7, the voltage detection circuit B15 controls the current flowing through the MOS transistor M10 according to the voltage generated between the antenna terminals. When the voltage generated between the antenna terminals is smaller than a predetermined voltage level, the potential of the output terminal N1 becomes low and no current flows through the MOS transistor M10. Therefore, when the MOS transistors M6 and M7 have high gate potentials, respectively. Turn on. As a result, the voltage across one of the capacitors C1 and C2 is short-circuited between the antenna terminals, so that it can be approximated to a state where a capacitor having a capacitance value equivalent to that of the capacitor C1 is connected between the antenna terminals. Become.

  Further, when the voltage generated between the antenna terminals is higher than a predetermined voltage level, the current flowing through the MOS transistor M10 is controlled according to the voltage generated at the antenna terminal, so that the voltage generated at the resistor R6 or R7 is The gate voltages of the MOS transistors M6 and M7 are suppressed so as to be increased. As a result, since the currents flowing through the MOS transistors M6 and M7 are controlled, the charges accumulated in the capacitors C1 and C2 are controlled, and the capacitance connected between the antenna terminals changes. For example, when the current flowing through the MOS transistors M6 and M7 is controlled to a very small current value, it can be approximated to the state in which the capacitors C1 and C2 are connected in series between the antenna terminals, and the capacitance having a capacitance value half that of the capacitor C1 is obtained. Connected.

  By the above operation, the resonance capacitance can be controlled in the range from the capacitance value equivalent to the capacitance C1 to the half capacitance value of the capacitance C1 according to the voltage level generated at the antenna terminal, and the antenna L0 and the resonance capacitance control circuit B3. The resonance frequency of the resonance circuit constituted by can be controlled.

  Furthermore, when the voltage level generated between the antenna terminals becomes higher than a predetermined voltage level, it is possible to control the resonance frequency to be increased, thereby suppressing excessive power supply. In addition, since the current flowing through the capacitor can be reduced, heat generation by the resonance capacitor can be suppressed. This is particularly effective when the capacitors C1 and C2 are mounted on the semiconductor integrated circuit device B2.

(Embodiment 5)
FIG. 8 is a block diagram showing an embodiment of a resonant capacitance control circuit B3 and a rectifying / smoothing circuit B4 mounted on the semiconductor integrated circuit device B2 according to the present invention.

  This is because the resonant capacitance control circuit B3 is connected between the antenna terminals LA and LB, the rectifying and smoothing circuit B4 is connected to the antenna terminals LA and LB, and the voltage obtained at the output terminal OUT of the rectifying and smoothing circuit B4 is a regulator circuit. In this configuration, the voltage suppressed by B16 is obtained from the output terminal OUT3. As the resonance capacitance control circuit B3, for example, the circuits shown in FIGS. 3, 4, 6, and 7 in the first to fourth embodiments are used.

  When the output voltage of the rectifying / smoothing circuit B4 cannot be sufficiently controlled by the resonance capacitance control circuit B3, the power supply voltage supplied to the internal circuit B5 may be stabilized by mounting the regulator circuit B16. As a result, it is possible to reduce chip heat generation by suppressing excessive power supply by the resonance capacitance control circuit B3 and to supply a stable power supply voltage to the internal circuit B5.

  At this time, although there is no particular limitation, the circuit characteristics are more improved when the voltage level at which the resonance capacitance control circuit B3 starts to control the resonance capacitance is larger than the voltage level at which the regulator circuit B16 starts to suppress the output voltage. Adjustment is easy and suitable.

  Similarly, also in the resonance capacitance control circuit B3 having the rectifying and smoothing function shown in FIG. 6, a regulator can be mounted on the output terminal OUT2.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the above-described embodiment, the resonant capacitance control circuit is configured by an N-type MOS transistor, but a P-type MOS transistor may be used. In addition, the locations of the capacitors C1 and C2 for controlling the resonance capacitance are not limited to the semiconductor integrated circuit device B2, but may be disposed other than the semiconductor integrated circuit device B2, and furthermore, the capacitance In addition to C1 and C2, another capacitor may be connected between the antenna terminals.

  The present invention is suitable for application to non-contact type electronic devices represented by IC cards and IC tags.

Claims (14)

An antenna,
A resonant capacitance control circuit connected to the antenna;
The resonant capacitance control circuit is
A first capacitor and a second capacitor are connected in series between a first antenna terminal and a second antenna terminal to which the antenna is connected,
A charge / discharge control circuit is connected to a connection point between the first capacitor and the second capacitor,
The charge / discharge control circuit includes:
When the potential of the first antenna terminal is higher than the potential of the second antenna terminal,
Controlling the charge stored in the first capacitor;
When the potential of the second antenna terminal is higher than the potential of the first antenna terminal,
By controlling the charge accumulated in the second capacitor,
A non-contact type electronic device that controls a resonance capacitance value between the first antenna terminal and the second antenna terminal. The contactless electronic device according to claim 1,
The charge / discharge control circuit includes:
Between the first antenna terminal and the second antenna terminal,
A first MOS transistor having a gate terminal connected to the second antenna terminal;
A second MOS transistor having a gate terminal connected to the first antenna terminal is connected in series;
A connection point between the first capacitor and the second capacitor;
Between the connection point of the first MOS transistor and the second MOS transistor,
A non-contact type electronic device, wherein a variable resistance element is connected. The contactless electronic device according to claim 1,
The charge / discharge control circuit includes:
Between the first antenna terminal and the second antenna terminal,
A third MOS transistor having a first resistor connected between the second antenna terminal and the gate terminal;
A fourth MOS transistor having a second resistor connected between the first antenna terminal and the gate terminal is connected in series;
Between the gate terminal of the third MOS transistor and the gate terminal of the fourth MOS transistor,
A fifth MOS transistor having a gate terminal connected to the second antenna terminal;
A sixth MOS transistor having a gate terminal connected to the first antenna terminal is connected in series;
A contactless electronic device, wherein a variable resistance element is connected between a connection point of the fifth MOS transistor and the sixth MOS transistor and a ground terminal. The contactless electronic device according to claim 2 or 3,
The variable resistance element is:
A non-contact type electronic device, wherein a resistance value is controlled to be small when a voltage generated between the first antenna terminal and the second antenna terminal is larger than a predetermined voltage. The contactless electronic device according to claim 2 or 3,
The variable resistance element is:
A non-contact type electronic device, wherein a resistance value is controlled to increase when a voltage generated between the first antenna terminal and the second antenna terminal is smaller than a predetermined voltage. The contactless electronic device according to claim 2 or 3,
A voltage detection circuit that outputs a voltage corresponding to a voltage generated between the first antenna terminal and the second antenna terminal;
The variable resistance element is:
A non-contact type electronic device comprising: a seventh MOS transistor having an output of the voltage detection circuit connected to a gate terminal. The contactless electronic device according to claim 2 or 3,
A first rectifier element is connected between the first antenna terminal and the first output terminal;
A second rectifying element is connected between the second antenna terminal and the first output terminal;
The connection point between the first MOS transistor and the second MOS transistor is connected to a second output terminal so that the first and second MOS transistors operate as a rectifying element,
A non-contact type electronic device, wherein a voltage generated between the first output terminal and the second output terminal is supplied as a power supply voltage to another circuit mounted therein. A semiconductor integrated circuit device mounted on a non-contact type electronic device,
A resonant capacitance control circuit;
The resonant capacitance control circuit is
A first capacitor and a second capacitor are connected in series between a first antenna terminal and a second antenna terminal to which an antenna mounted on the contactless electronic device is connected,
A charge / discharge control circuit is connected to a connection point between the first capacitor and the second capacitor,
The charge / discharge control circuit includes:
When the potential of the first antenna terminal is higher than the potential of the second antenna terminal,
Controlling the charge stored in the first capacitor;
When the potential of the second antenna terminal is higher than the potential of the first antenna terminal,
By controlling the charge accumulated in the second capacitor,
A semiconductor integrated circuit device that controls a resonance capacitance value between the first antenna terminal and the second antenna terminal. The semiconductor integrated circuit device according to claim 8.
The charge / discharge control circuit includes:
Between the first antenna terminal and the second antenna terminal,
A first MOS transistor having a gate terminal connected to the second antenna terminal;
A second MOS transistor having a gate terminal connected to the first antenna terminal is connected in series;
A connection point between the first capacitor and the second capacitor;
Between the connection point of the first MOS transistor and the second MOS transistor,
A semiconductor integrated circuit device, wherein a variable resistance element is connected. The semiconductor integrated circuit device according to claim 8.
The charge / discharge control circuit includes:
Between the first antenna terminal and the second antenna terminal,
A third MOS transistor having a first resistor connected between the second antenna terminal and the gate terminal;
A fourth MOS transistor having a second resistor connected between the first antenna terminal and the gate terminal is connected in series;
Between the gate terminal of the third MOS transistor and the gate terminal of the fourth MOS transistor,
A fifth MOS transistor having a gate terminal connected to the second antenna terminal;
A sixth MOS transistor having a gate terminal connected to the first antenna terminal is connected in series;
A semiconductor integrated circuit device, wherein a variable resistance element is connected between a connection point of the fifth MOS transistor and the sixth MOS transistor and a ground terminal. The semiconductor integrated circuit device according to claim 9 or 10,
The variable resistance element is:
A semiconductor integrated circuit device, wherein a resistance value is controlled to be small when a voltage generated between the first antenna terminal and the second antenna terminal is larger than a predetermined voltage. The semiconductor integrated circuit device according to claim 9 or 10,
The variable resistance element is:
A semiconductor integrated circuit device, wherein a resistance value is controlled to increase when a voltage generated between the first antenna terminal and the second antenna terminal is smaller than a predetermined voltage. The semiconductor integrated circuit device according to claim 9 or 10,
A voltage detection circuit that outputs a voltage corresponding to a voltage generated between the first antenna terminal and the second antenna terminal;
The variable resistance element is:
A semiconductor integrated circuit device comprising: a seventh MOS transistor having an output of the voltage detection circuit connected to a gate terminal. The semiconductor integrated circuit device according to claim 9 or 10,
A first rectifier element is connected between the first antenna terminal and the first output terminal;
A second rectifying element is connected between the second antenna terminal and the first output terminal;
The connection point between the first MOS transistor and the second MOS transistor is connected to a second output terminal so that the first and second MOS transistors operate as a rectifying element,
A semiconductor integrated circuit device, wherein a voltage generated between the first output terminal and the second output terminal is supplied as a power supply voltage to another circuit mounted therein.

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