CN100565634C - The display driver circuit of flat-panel screens and gate control lines driving method - Google Patents
The display driver circuit of flat-panel screens and gate control lines driving method Download PDFInfo
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- CN100565634C CN100565634C CNB2008102131026A CN200810213102A CN100565634C CN 100565634 C CN100565634 C CN 100565634C CN B2008102131026 A CNB2008102131026 A CN B2008102131026A CN 200810213102 A CN200810213102 A CN 200810213102A CN 100565634 C CN100565634 C CN 100565634C
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Abstract
The invention provides a kind of display driver circuit and gate control lines driving method of flat-panel screens, the display driver circuit of flat-panel screens comprises: data line, first pixel column, each pixel comprises the first adjacent sub-pixel and second sub-pixel, first sub-pixel is electrically coupled to data line to receive the signal that data line provides, and second sub-pixel is electrically coupled to first sub-pixel; Second pixel column, and each pixel adjacent with first pixel column comprises the 3rd adjacent sub-pixel and the 4th sub-pixel, and the 3rd sub-pixel is electrically coupled to data line to receive the signal that data line provides, and the 4th sub-pixel is electrically coupled to the 3rd sub-pixel; The usefulness that first and second gate control lines is controlled electrically conducting of first and second sub-pixel respectively and all do not electrically conducted as control the 3rd and the 4th sub-pixel, thus gate driving (GOA) circuit becomes possibility on the feasible employing substrate, has reduced cost.
Description
Technical field
The invention relates to the flat-panel screens field, and particularly relevant for a kind of display driver circuit and gate control lines driving method of flat-panel screens, the drive signal of each gate control lines is a single pulse signal.
Background technology
Flat-panel screens, for example LCD, plasma scope etc., have high image quality, volume is little, in light weight and advantage such as applied range, therefore be widely used in consumption electronic products such as mobile phone, notebook computer, desktop display and TV, and replaced traditional cathode-ray tube display gradually and become the main flow of display.
Referring to Fig. 3, the partial schematic diagram of the display driver circuit 30 of known flat-panel screens.Display driver circuit 30 is formed on the substrate 40, comprises a plurality of pixel column R1～R4, many gate control lines G0～G4, many data line S0～S3, a puppet (Dummy) data line Dum and a plurality of dummy pixel 33 that is separately positioned on the outside of (or tail) first of pixel column R1～R4.Each dummy pixel 33 is arranged on each infall of gate control lines G0～G3 and pseudo-data line Dum and comprises two sub-pixels 331 and 333 of adjacent and electric property coupling respectively.Each pixel column among a plurality of pixel column R1～R4 comprises a plurality of pixels 31, is arranged on each infall of gate control lines G0～G3 and data line S0～S2.Each pixel 31 comprises adjacent two sub-pixels 311 and 313, sub-pixel 311 one of is electrically coupled among the data line S0-S3 corresponding person receiving by the data-signal that this data line was provided, and sub-pixel 313 is electrically coupled to sub-pixel 311 one of to receive among the data line S0-S3 signal that corresponding person was provided via sub-pixel 311.Electrically conducting of sub-pixel 311 in each gate control lines control pixel column among gate control lines G1～G3 and the sub-pixel 313 in another adjacent lines of pixels.
Referring to Fig. 4, it is adopted for display driver circuit 30 is used to drive the sequential chart of each drive signal of many gate control lines G0～G4.Can learn that in conjunction with Fig. 3 and Fig. 4 because each gate control lines among gate control lines G1～G3 is the electrically conducting of corresponding sub-pixel in adjacent two pixel columns of control, causing its required drive signal is a multipulse signal.
Yet, present gate driving (Gate-On-Array on the relatively low substrate of cost, GOA) circuit can only produce single pulse signal, can't produce the required multipulse signal of display driver circuit 30, therefore, aforesaid display driver circuit 30 can't use gate driver circuit on the substrate to replace grid-driving integrated circuit (Gate Driver IC) to reduce the cost of gate driving part.In view of this, still there is the possibility that reduces cost in gate driver circuit.
Summary of the invention
Purpose of the present invention is exactly to be single pulse signal in that a kind of display driver circuit of flat-panel screens, the drive signal of each gate control lines that it adopted are provided, thereby makes and adopt that gate driving (GOA) circuit becomes possibility on the substrate.
Another object of the present invention provides a kind of gate control lines driving method, and its drive signal that drives each gate control lines is a single pulse signal, becomes possibility thereby make to adopt on the substrate gate driver circuit to produce drive signal.
Other purposes of the present invention and advantage can be further understood from the disclosed technical characterictic of the present invention.
For realizing one of above-mentioned or partly or entirely purpose or other purposes, one embodiment of the invention propose a kind of display driver circuit of flat-panel screens.This display driver circuit is formed on the substrate, and it comprises data line, first pixel column, second pixel column, first grid control line and second grid control line.First pixel column comprises that a plurality of pixels and each pixel comprise the first adjacent sub-pixel and second sub-pixel; Wherein first sub-pixel is electrically coupled to data line to receive by the signal that data line was provided, and second sub-pixel is electrically coupled to first sub-pixel to receive the signal that data line is provided via first sub-pixel.Second pixel column is adjacent with first pixel column, and second pixel column comprises that a plurality of pixels and each pixel comprise the 3rd adjacent sub-pixel and the 4th sub-pixel; Wherein the 3rd sub-pixel is electrically coupled to data line to receive by the signal that data line was provided, and the 4th sub-pixel is electrically coupled to the 3rd sub-pixel to receive the signal that data line is provided via the 3rd sub-pixel.The first grid control line is controlled electrically conducting of first sub-pixel, and the second grid control line is controlled electrically conducting of second sub-pixel; The usefulness that first grid control line and second grid control line all do not electrically conduct as control the 3rd and the 4th sub-pixel.
In another embodiment of the present invention, above-mentioned display driver circuit comprises that also gate driver circuit is formed at above-mentioned substrate on (GOA) circuit of gate driving on first substrate and second substrate; The first grid control line is electrically coupled to gate driver circuit on first substrate, and the second grid control line is electrically coupled to gate driver circuit on second substrate.Wherein, substrate can be glass substrate.
In another embodiment of the present invention, first of the first above-mentioned pixel column and each pixel column in second pixel column or the arranged outside of tail dummy pixel (Dummy Pixel) is arranged, this dummy pixel comprises the 5th adjacent sub-pixel and the 6th sub-pixel.
The present invention in addition again an embodiment a kind of gate control lines driving method is proposed, be executed in above-mentioned display driver circuit, this gate control lines driving method comprises step: provide first drive signal to the second grid control line so that second sub-pixel electrically conducts, first drive signal is single pulse signal and comprises first pulse; And provide second drive signal to the first grid control line so that first sub-pixel electrically conducts, second drive signal is single pulse signal and comprises second pulse; Wherein, first pulse is prior to overlapping on second pulse and first pulse and the second pulse life period.
In one embodiment of this invention, above-mentioned first pulse equates with the pulse width of second pulse.Further, first pulse and second pulse exist temporal overlap occupy pulse width half.
In one embodiment of this invention, half of the temporal pulse width that occupies first pulse of overlapping that exists of above-mentioned first pulse and second pulse.
In another embodiment of the present invention, above-mentioned gate control lines driving method also comprises step: gate driver circuit produces first drive signal on second substrate; And first gate driver circuit on the substrate produce second drive signal.
The display driver circuit of the flat-panel screens that the embodiment of the invention proposes, the required drive signal of its each gate control lines can be single pulse signal, and gate driver circuit produces drive signal on the feasible employing substrate becomes possibility; Therefore can reduce the cost of gate driving part.
For allowing above-mentioned the becoming apparent with other purposes, feature and advantage of the present invention, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 is the partial schematic diagram of a kind of display driver circuit of embodiment of the invention proposition.
Fig. 2 is used to drive the sequential chart of each drive signal of its each gate control lines for display driver circuit shown in Figure 1 adopted.
Fig. 3 is the partial schematic diagram of known a kind of display driver circuit.
Fig. 4 is used to drive the sequential chart of each drive signal of its each gate control lines for display driver circuit shown in Figure 3 adopted.
Embodiment
Referring to Fig. 1, it is the partial schematic diagram of a kind of display driver circuit of embodiment of the invention proposition.Display driver circuit 10 is applicable to flat-panel screens, for example LCD, plasma scope etc.As shown in Figure 1, display driver circuit 10 is formed on the substrate 20, it comprises: a plurality of pixel column R1～R4, many first grid control line G0, G2, G4 and G6, many second grid control line G1, G3, G5 and G7, many data line S0～S3, a puppet (Dummy) data line Dum, a plurality of dummy pixel 13 and gate driver circuit 15 and 16.
Wherein, substrate 20 can be glass substrate, and gate driver circuit 15 and 16 is formed at substrate 20 and is respectively gate driving on the substrate (GOA) circuit.Each pixel column among a plurality of pixel column R1～R4 comprises a plurality of pixels 11 that are arranged in delegation.A plurality of pixels 11 among each pixel column R1～R4 are positioned at many first grid control line G0, G2, each infall of G4 and G6 and many data line S0～S2, it is positioned at many second grid control line G1 equally, G3, each infall of G5 and G7 and a plurality of data line S0～S2.Many first grid control line G0, G2, G4 and G6 are electrically coupled to gate driver circuit 15, many second grid control line G1, G3, G5 and G7 are electrically coupled to gate driver circuit 16.
Each pixel 11 comprises first sub-pixel 111 and second sub-pixel 113, first sub-pixel 111 one of is electrically coupled among data line S0～S3 corresponding person to receive the signal that data line was provided thus, and second sub-pixel 113 is electrically coupled to first sub-pixel 111 to receive the signals that this data line was provided via first sub-pixel 111.First sub-pixel 111 in the same pixel 11 and second sub-pixel 113 comprise a membrane transistor (not indicating among the figure), a storage capacitors (not indicating among the figure) and a pixel capacitance (not indicating among the figure) respectively; The grid of the membrane transistor of first sub-pixel 111 is electrically coupled to many first grid control line G0, G2, and corresponding person one of among G4 and the G6, thus the first grid control line is controlled electrically conducting of first sub-pixel 111 thus; The grid of the membrane transistor of second sub-pixel 113 is electrically coupled to many second grid control line G1, G3, and corresponding person one of among G5 and the G7, thus the second grid control line is controlled electrically conducting of second sub-pixel 113 thus.
Can learn from Fig. 1, each pixel column among a plurality of pixel column R1～R4 is controlled electrically conducting of its a plurality of pixels 11 by a first grid control line and a second grid control line, and first and second gate control lines that electrically conducts of a plurality of pixels 11 of one of controlling in two adjacent pixel columns pixel column is not all as the usefulness that electrically conducts of a plurality of pixels 11 of another pixel column of control.With adjacent pixels row R1, R2 is that example is described as follows: pixel column R1 controls electrically conducting of its a plurality of pixels 11 by first grid control line G0 and second grid control line G1, and pixel column R2 controls electrically conducting of its a plurality of pixels 11 by first grid control line G2 and second grid control line G3; The usefulness that first grid control line G0 and second grid control line G1 all do not electrically conduct as a plurality of pixels 11 of controlling pixel column R2, the usefulness that same first grid control line G2 and second grid control line G3 also do not electrically conduct as a plurality of pixels 11 of controlling pixel column R1.
Refer again to Fig. 1, a plurality of dummy pixels 13 are separately positioned on first of a plurality of pixel column R1～R4 or the outside of tail.Each dummy pixel 13 comprises adjacent sub-pixel 131 and 133, and sub-pixel 131 is electrically coupled to pseudo-data line Dum or data line S0, and sub-pixel 133 is electrically coupled to sub-pixel 131 to couple mutually with pseudo-data line Dum or data line S0.
Please in the lump with reference to figure 2, it is adopted for above-mentioned display driver circuit 10 is used to drive first grid control line G0, G2, G4, G6 and second grid control line G1, G3, G5, the sequential chart of each drive signal of G7.Specifically describe a kind of gate control lines driving method that is executed in above-mentioned display driver circuit 10 below in conjunction with Fig. 1 and Fig. 2.Because the driving method of first and second gate control lines that each pixel column adopted among a plurality of pixel column R1～R4 is identical, the driving method of first and second gate control lines G0, the G1 that therefore below will be only adopted with pixel column R1 is the gate control lines driving method that example illustrates embodiment of the invention proposition.This gate control lines driving method comprises step:
(1) provide one first drive signal SP1 to second grid control line G1, so that second sub-pixel 113 with second grid control line G1 electric property coupling among the pixel column R1 electrically conducts; Wherein, the first drive signal SP1 is a single pulse signal and comprises one first pulse P1 that the first drive signal SP1 is produced by gate driver circuit 16.
(2) provide one second drive signal SP2 to first grid control line G0, so that first sub-pixel 111 with first grid control line G0 electric property coupling among the pixel column R1 electrically conducts; Wherein, the second drive signal SP2 is a single pulse signal and comprises one second pulse P2 that the second drive signal SP2 is produced by gate driver circuit 15.
Can learn that from Fig. 2 the first pulse P1 is prior to overlapping on the second pulse P2 and the first pulse P1 and the second pulse P2 life period; The first pulse P1 equates with the pulse width of the second pulse P2, the first pulse P1 and the second pulse P2 exist temporal overlap occupy pulse width half.When the pulse width of the first pulse P1 and the second pulse P2 does not wait, half of the temporal pulse width that occupies the first pulse P1 of overlapping that can be provided with that the first pulse P1 and the second pulse P2 exist.
In sum, the display driver circuit that the embodiment of the invention proposes, the required drive signal of its each gate control lines can be single pulse signal, and gate driver circuit produces drive signal on the feasible employing substrate becomes possibility; Therefore can reduce the cost of gate driving part.
In addition, the gate driver circuit 15 and 16 in the above embodiment of the present invention is not limited to gate driving on the substrate (GOA) circuit, and it also can be grid-driving integrated circuit (Gate Driver IC).
Though the present invention discloses as above with preferred embodiment, it is not in order to limiting the present invention, anyly has the knack of this operator, without departing from the spirit and scope of the present invention, and when doing a little change and retouching.
Claims (9)
1. the display driver circuit of a flat-panel screens is characterized in that, this display driver circuit is formed on the substrate, comprising:
One data line;
One first pixel column, comprise that a plurality of pixels and each described pixel comprise one first adjacent sub-pixel and one second sub-pixel, wherein said first sub-pixel is electrically coupled to described data line to receive by the signal that described data line was provided, and described second sub-pixel is electrically coupled to described first sub-pixel to receive the signal that described data line is provided via described first sub-pixel;
One second pixel column, adjacent with described first pixel column, described second pixel column comprises that a plurality of pixels and each described pixel comprise one the 3rd adjacent sub-pixel and one the 4th sub-pixel, wherein said the 3rd sub-pixel is electrically coupled to described data line to receive by the signal that described data line was provided, and described the 4th sub-pixel is electrically coupled to described the 3rd sub-pixel to receive the signal that described data line is provided via described the 3rd sub-pixel;
One first grid control line is controlled electrically conducting of described first sub-pixel; And
One second grid control line is controlled electrically conducting of described second sub-pixel;
Wherein, described first grid control line and described second grid control line are all as controlling the usefulness that the described the 3rd and the 4th sub-pixel electrically conducts.
2. display driver circuit as claimed in claim 1 is characterized in that, described display driver circuit comprises also on one first substrate that gate driver circuit is formed at described substrate on the gate driver circuit and one second substrate; Described first grid control line is electrically coupled to gate driver circuit on described first substrate, and described second grid control line is electrically coupled to gate driver circuit on described second substrate.
3. display driver circuit as claimed in claim 2 is characterized in that, described substrate is a glass substrate.
4. display driver circuit as claimed in claim 1, it is characterized in that, first of each pixel column in described first pixel column and described second pixel column or the arranged outside of tail one dummy pixel is arranged, described dummy pixel comprises one the 5th adjacent sub-pixel and one the 6th sub-pixel.
5. a gate control lines driving method is executed in a display driver circuit as claimed in claim 1, it is characterized in that, this gate control lines driving method comprises the following steps:
One first drive signal is provided, and extremely described second grid control line is so that described second sub-pixel electrically conducts, and described first drive signal is a single pulse signal and comprises one first pulse; And
One second drive signal is provided, and extremely described first grid control line is so that described first sub-pixel electrically conducts, and described second drive signal is a single pulse signal and comprises one second pulse;
Wherein, described first pulse is prior to described second pulse, and overlapping on described first pulse and the described second pulse life period.
6. gate control lines driving method as claimed in claim 5 is characterized in that, described first pulse equates with the pulse width of described second pulse.
7. gate control lines driving method as claimed in claim 6 is characterized in that, described first pulse and described second pulse exist temporal overlap occupy described pulse width half.
8. gate control lines driving method as claimed in claim 5 is characterized in that, half of the temporal pulse width that occupies described first pulse of overlapping that described first pulse and described second pulse exist.
9. gate control lines driving method as claimed in claim 5 is characterized in that, described display driver circuit comprises also on one first substrate that gate driver circuit is formed at described substrate on the gate driver circuit and one second substrate, and also comprises the following steps:
Gate driver circuit produces described first drive signal on described second substrate; And
Gate driver circuit produces described second drive signal on described first substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2008102131026A CN100565634C (en) | 2008-09-12 | 2008-09-12 | The display driver circuit of flat-panel screens and gate control lines driving method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2008102131026A CN100565634C (en) | 2008-09-12 | 2008-09-12 | The display driver circuit of flat-panel screens and gate control lines driving method |
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| CN101359443A CN101359443A (en) | 2009-02-04 |
| CN100565634C true CN100565634C (en) | 2009-12-02 |
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| CN104036745B (en) * | 2014-06-07 | 2017-01-18 | 深圳市华星光电技术有限公司 | Drive circuit and liquid crystal display device |
| US10854160B2 (en) * | 2018-08-30 | 2020-12-01 | Sharp Kabushiki Kaisha | Display device |
| CN115509041A (en) * | 2018-11-26 | 2022-12-23 | 群创光电股份有限公司 | Electronic device with a detachable cover |
| CN111429843B (en) * | 2020-04-30 | 2021-09-24 | 京东方科技集团股份有限公司 | Display substrate and display device |
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