CN100561813C - Method for restraining late-class circuit hot swap impact current and buffering asynchronous start circuit thereof - Google Patents
Method for restraining late-class circuit hot swap impact current and buffering asynchronous start circuit thereof Download PDFInfo
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- CN100561813C CN100561813C CNB2006100626862A CN200610062686A CN100561813C CN 100561813 C CN100561813 C CN 100561813C CN B2006100626862 A CNB2006100626862 A CN B2006100626862A CN 200610062686 A CN200610062686 A CN 200610062686A CN 100561813 C CN100561813 C CN 100561813C
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Abstract
The invention discloses a kind of method for restraining late-class circuit hot swap impact current and buffering asynchronous start circuit thereof; buffering asynchronous start circuit suppresses on the basis of circuit at impulse current; set up the saturation conduction circuits for triggering and detect the output voltage that impulse current suppresses circuit; judge its operating state; after only detecting impulse current inhibition circuit saturation conduction; just provide enabling signal; allow late-class circuit start working; therefore can prevent effectively that late-class circuit from starting when impulse current suppresses circuit working in linear zone; avoid causing and isolate rise of output voltage, effectively protect whole system along serious vibration occurring.The present invention can be widely used in the late-class circuit of hot plug of direct current input, with the impulse current of buffering late-class circuit when the hot plug.
Description
[technical field]
The present invention relates to a kind of start-up circuit, particularly a kind of start-up circuit that prevents rush of current.
[background technology]
The circuit module that has big input capacitance because input stage has very big capacitive load, can make module when hot plug, and impulse current is very big, makes the contact pin sparking easily, the performance and the useful life of reducing contact pin; Simultaneously, excessive impulse current might cause that shutdown, the system power supply of system is unstable or system or inside modules element caused damage, and therefore usually introducing buffer start circuit limits the rush of current of input capacitance to system.In the prior art, the buffer start circuit of impulse current adopts following current-limiting method when suppressing hot plug:
The series resistance method: promptly at the input big resistance (being generally wire resistor) of connecting, but this moment, ohmically power consumption also just became big, therefore will select the resistance value of trading off, and made impulse current and ohmically power consumption all within the range of permission.
The thermistor method: principle is with the series resistance method, but because the characteristic of the negative temperature coefficient of thermistor, and along with himself heating resistance diminishes, power consumption also just reduces; Because thermistor will just reach its operating conditions resistance value after a while after power supply starts for the first time, may cause power work at the state of having the hiccups during so low the input.
Active impulse current lambda limiting process: utilize the metal-oxide-semiconductor field effect transistor conduction impedance low and drive characteristic of simple, add that around a small amount of components and parts just can make impulse current inhibition circuit.Basic thought be the grid of metal-oxide-semiconductor field effect transistor and the drain electrode between incorporate electric capacity into, allow the grid of MOSET and the voltage of source electrode slowly rise exactly, thereby make metal-oxide-semiconductor field effect transistor open-minded gradually, the realization module hot plug the time buffering.
Utilize application-specific integrated circuit (ASIC) control impulse current and realize the hot plug function: existing LT1640 chip as LinearTechnology company just provides simply and effectively impulse current control method, this buffer start circuit based on metal-oxide-semiconductor field effect transistor, electric current to input detects, and utilizes the detected electric current of sample resistance to control the degree of opening of metal-oxide-semiconductor field effect transistor.As shown in Figure 1: at powered on moment, metal-oxide-semiconductor field effect transistor Q1 remains on off state, with uncharged capacitor C 3, DC/DC power-supply filter electric capacity and input isolated from power, slowly conducting along with Q1, electric capacity is slowly charging under state of a control, only after electric capacity was full of electricity, chip just provided switching signal, allowed the DC/DC power supply start working.
More than the circuit of series resistance method of the prior art, thermistor method realize greatly reducing the efficient of module, and sealing in of resistance make module input impedance when operate as normal strengthen, and is unfavorable for the dynamic property of module.And utilize the buffer circuit of application-specific integrated circuit (ASIC), and based on to the control of input current and the detection of output voltage, though performance is good, circuit complexity, cost height; And because current detecting, make this buffer start circuit when work owing to detect resistance consumption power, reduced the power supplying efficiency of system.
In the active impulse current lambda limiting process that adopts metal-oxide-semiconductor field effect transistor restriction impulse current, what utilize is that metal-oxide-semiconductor field effect transistor linear amplification district impact electric current limits, and the system that rises to of input capacitance voltage is when beginning to start work, metal-oxide-semiconductor field effect transistor is the intact linear amplification district of transition not necessarily, at metal-oxide-semiconductor field effect transistor during the intact linear amplification district of transition, the startup of system can cause the voltage on the input capacitance depression to occur, causes and isolates rise of output voltage along serious vibration occurring.
[summary of the invention]
Purpose of the present invention is exactly in order to overcome above deficiency of the prior art, a kind of method for restraining late-class circuit hot swap impact current and buffering asynchronous start circuit thereof are provided, impulse current in the time of can effectively suppressing hot plug, and satisfy the inner normal requirement that starts of late-class circuit, high efficiency.
For achieving the above object, the present invention proposes a kind of method for restraining late-class circuit hot swap impact current, comprises the steps: 1) utilize impulse current to suppress circuit, realize the slow rising of output current, and the maximum output valve of restriction output current; 2) utilize the saturation conduction circuits for triggering to monitor the conducting state that described impulse current suppresses circuit in real time, when described impulse current suppressed the circuit saturation conduction, described saturation conduction circuits for triggering sent starting-up signal, started late-class circuit.
Above-mentioned method, described impulse current suppress circuit and comprise metal-oxide-semiconductor field effect transistor and be parallel to resistance and electric capacity between its grid and the source electrode, can select metal-oxide-semiconductor field effect transistor to work in the time in linear amplification district according to the size of late-class circuit input capacitance.Described saturation conduction circuits for triggering are judged the metal-oxide-semiconductor field effect transistor operating state according to the monitoring to voltage between the gate-source of metal-oxide-semiconductor field effect transistor, provide the late-class circuit enabling signal, prevent that late-class circuit from starting when metal-oxide-semiconductor field effect transistor works in linear zone.Described impulse current suppresses maximum current limit value, the electric current climbing speed of circuit and can select the different electric capacity that is parallel between its grid and the source electrode to realize by described impulse current being suppressed circuit.Described saturation conduction circuits for triggering are monitored voltage between the gate-source in real time by voltage sample circuit, when sampling voltage reaches predetermined value, and the starting switch circuit, described switching circuit output enabling signal is given late-class circuit.
The buffering asynchronous start circuit that a kind of hot swap impact current suppresses comprises that impulse current suppresses circuit, realizes that output current slowly rises; Also comprise the saturation conduction circuits for triggering, monitor the conducting state that described impulse current suppresses circuit in real time, when described impulse current suppressed the circuit saturation conduction, described saturation conduction circuits for triggering sent starting-up signal, started late-class circuit.
Above-mentioned buffering asynchronous start circuit, described saturation conduction circuits for triggering comprise voltage sample circuit and switching circuit; Described voltage sample circuit one end suppresses circuit with described impulse current and is connected, and the sampling end is connected with described switching circuit control end; When described impulse current suppressed the circuit saturation conduction, described voltage sample circuit sampling terminal voltage triggered described switching circuit conducting, sends starting-up signal, starts late-class circuit.
Above-mentioned buffering asynchronous start circuit, described impulse current suppresses circuit and comprises metal-oxide-semiconductor field effect transistor, charges and discharge electric capacity and charge and discharge resistance, described charge and discharge electric capacity and charge and discharge resistance be parallel between the grid and source electrode of described metal-oxide-semiconductor field effect transistor, the grid of described metal-oxide-semiconductor field effect transistor and source electrode respectively with the coupling of the high cold end of input voltage; Described saturation conduction circuits for triggering have two inputs and are parallel between the grid and source electrode of described metal-oxide-semiconductor field effect transistor.
Above-mentioned buffering asynchronous start circuit, described voltage sample circuit comprises first divider resistance, voltage-stabiliser tube and sample resistance, is connected in after the three connects successively between described metal-oxide-semiconductor field effect transistor grid and the source electrode; The common contact of described voltage-stabiliser tube, sample resistance is described sampling end, is connected with the control end of described switching circuit.Described switching circuit comprises first switching tube, second divider resistance and second switch pipe; The described first switching tube base stage is connected with described voltage sample circuit sampling end, and emitter-base bandgap grading connects cold end; Described second divider resistance is connected between described first switching tube collector electrode and the second switch pipe base stage; Described second switch pipe emitter connects hot end, and its collector electrode is used to connect late-class circuit.
The present invention sets up the saturation conduction circuits for triggering and detects the output voltage that impulse current suppresses circuit; judge its operating state; after only detecting impulse current inhibition circuit saturation conduction; just provide enabling signal; allow late-class circuit start working; therefore can prevent effectively that late-class circuit from starting when impulse current suppresses circuit working in linear zone, avoid causing and isolate rise of output voltage, effectively protect whole system along serious vibration occurring.The present invention can be widely used in the late-class circuit of hot plug of direct current input, with the impulse current of buffering late-class circuit when hot-swappable.
Different with the inhibition of adopting special integrated chip realization impact electric current, the present invention is not that detection method based on impulse current cushions control, but realize buffer starting by the gate-source voltage that detects metal-oxide-semiconductor field effect transistor, promptly adopt the voltage detecting mode, only with common triode and metal-oxide-semiconductor field effect transistor and voltage-stabiliser tube, add that resistance capacitance just can realize that used components and parts are less, circuit is also simpler, and cost significantly reduces.
[description of drawings]
Fig. 1 is based on the impulse current control circuit example of control chip.
Fig. 2 utilizes the buffering asynchronous start circuit theory diagram of N-MOS field effect transistor.
Fig. 3 utilizes the buffering asynchronous start circuit theory diagram of P-MOS field effect transistor.
The buffering asynchronous startup schematic circuit of Fig. 4 N-MOS field effect transistor.
[embodiment]
Also the present invention is described in further detail in conjunction with the accompanying drawings below by specific embodiment.
Principle of the invention block diagram is respectively as Fig. 2 and shown in Figure 3, by metal-oxide-semiconductor field effect transistor, charge and discharge electric capacity, charge and discharge the impulse current that resistance forms and suppress circuit output end, set up saturation conduction circuits for triggering, the monitoring impulse current suppresses the conducting state of circuit in real time, when impulse current suppresses the circuit saturation conduction, described saturation conduction circuits for triggering send starting-up signal, start late-class circuit.
Be illustrated in figure 4 as a kind of concrete execution mode.The saturation conduction circuits for triggering comprise voltage sample circuit, switching circuit; Voltage sample circuit one end suppresses circuit with impulse current and is connected, and the sampling end is connected with the switching circuit control end; When described impulse current suppressed the circuit saturation conduction, voltage sample circuit sampling terminal voltage trigger switch circuit turn-on sent starting-up signal, starts late-class circuit.Voltage sample circuit comprises the first divider resistance R3, voltage-stabiliser tube ZD1, sample resistance R4, is connected between metal-oxide-semiconductor field effect transistor grid and the source electrode after the three connects successively; The common contact of voltage-stabiliser tube ZD1, sample resistance R4 is the voltage sampling end, is connected with the control end of switching circuit.Switching circuit comprises the first switching tube Q2, the second divider resistance R5, second switch pipe Q3; The first switching tube Q2 base stage is connected with voltage sample circuit voltage sampling end, and emitter-base bandgap grading connects cold end; The second divider resistance R5 is connected between the first switching tube Q2 collector electrode and the second switch pipe Q3 base stage; Second switch pipe Q3 emitter connects hot end, and its collector electrode is used to connect late-class circuit.
The operation principle of this programme is as follows:
As shown in Figure 4, the source S of metal-oxide-semiconductor field effect transistor Q1 is received the cold end of input, drain D links to each other with the electronegative potential pin of input capacitance, promptly input capacitance, power module integral body are kept apart with the input power unit by this metal-oxide-semiconductor field effect transistor Q1, introduce the parallel network charging and discharging electric capacity C1 and to charge and discharge resistance R2 between the grid G of metal-oxide-semiconductor field effect transistor and the source S, the driving of metal-oxide-semiconductor field effect transistor by input string connecting resistance R1 to grid G; The circuit of this function can have been realized the inhibition of hot swap impact current.
Powered on moment, because the voltage at input capacitance C2 two ends can not suddenly change, this moment, input voltage was added in the two ends of metal-oxide-semiconductor field effect transistor Q1, the drain D voltage of metal-oxide-semiconductor field effect transistor Q1 equates with input voltage; Simultaneously, the input power supply charges to the electric capacity C1 that charges and discharge in parallel between grid G and source S by the resistance R on the metal-oxide-semiconductor field effect transistor grid control circuit 1, make the voltage between metal-oxide-semiconductor field effect transistor Q1 grid and source electrode slowly rise, make metal-oxide-semiconductor field effect transistor by ending to linear conducting transition with the speed of setting; When the linear work district, metal-oxide-semiconductor field effect transistor will limit the maximum current of conducting between drain D and the source S according to the amplification characteristic of self, thereby the impulse current when having prevented hot plug, select the different slow capacitor C that powers on 1, can obtain the climbing speed of grid-source voltage, thereby obtain different current limit values.When metal-oxide-semiconductor field effect transistor Q1 grid and source voltage were enough high, metal-oxide-semiconductor field effect transistor Q1 just entered saturation conduction.But the selection of capacitor C 1 also must be with reference to the size of input capacitance, so that the voltage on the capacitor C 1 makes metal-oxide-semiconductor field effect transistor before saturation conduction, the voltage of input capacitance has reached more than 90% of input voltage.
The design can be under the constant situation of principle, and change saturation conduction triggering method realizes the function of this buffer starting.
Claims (10)
1, a kind of method for restraining late-class circuit hot swap impact current comprises the steps: 1) utilize impulse current to suppress circuit, realize the slow rising of output current, and the maximum output valve of restriction output current; 2) utilize the saturation conduction circuits for triggering to monitor the conducting state that described impulse current suppresses circuit in real time, when described impulse current suppressed the circuit saturation conduction, described saturation conduction circuits for triggering sent starting-up signal, started late-class circuit.
2, the method for claim 1, it is characterized in that: described impulse current suppresses circuit and comprises metal-oxide-semiconductor field effect transistor and be parallel to resistance and electric capacity between its grid and the source electrode, can select metal-oxide-semiconductor field effect transistor to work in the time in linear amplification district according to the size of late-class circuit input capacitance.
3, method as claimed in claim 2, it is characterized in that: described saturation conduction circuits for triggering are according to the monitoring to voltage between the gate-source of metal-oxide-semiconductor field effect transistor, judge the metal-oxide-semiconductor field effect transistor operating state, provide the late-class circuit enabling signal, prevent that late-class circuit from starting when metal-oxide-semiconductor field effect transistor works in linear zone.
4, method as claimed in claim 2 is characterized in that: described impulse current suppresses maximum current limit value, the electric current climbing speed of circuit and can select the different electric capacity that is parallel between its grid and the source electrode to realize by described impulse current being suppressed circuit.
5, method as claimed in claim 3, it is characterized in that: described saturation conduction circuits for triggering are monitored voltage between the gate-source in real time by voltage sample circuit, when sampling voltage reaches predetermined value, the starting switch circuit, described switching circuit output enabling signal is given late-class circuit.
6, a kind of buffering asynchronous start circuit of hot swap impact current inhibition comprises that impulse current suppresses circuit, realizes that output current slowly rises; It is characterized in that: also comprise the saturation conduction circuits for triggering, monitor the conducting state that described impulse current suppresses circuit in real time, when described impulse current suppressed the circuit saturation conduction, described saturation conduction circuits for triggering sent starting-up signal, started late-class circuit.
7, buffering asynchronous start circuit as claimed in claim 6 is characterized in that: described saturation conduction circuits for triggering comprise voltage sample circuit and switching circuit; Described voltage sample circuit one end suppresses circuit with described impulse current and is connected, and the sampling end is connected with described switching circuit control end; When described impulse current suppressed the circuit saturation conduction, described voltage sample circuit sampling terminal voltage triggered described switching circuit conducting, sends starting-up signal, starts late-class circuit.
8, buffering asynchronous start circuit as claimed in claim 7, it is characterized in that: described impulse current suppresses circuit and comprises metal-oxide-semiconductor field effect transistor, charges and discharge electric capacity and charge and discharge resistance, described charge and discharge electric capacity and charge and discharge resistance be parallel between the grid and source electrode of described metal-oxide-semiconductor field effect transistor, the grid of described metal-oxide-semiconductor field effect transistor and source electrode respectively with the coupling of the high cold end of input voltage; Described saturation conduction circuits for triggering have two inputs and are parallel between the grid and source electrode of described metal-oxide-semiconductor field effect transistor.
9, buffering asynchronous start circuit as claimed in claim 8, it is characterized in that: described voltage sample circuit comprises first divider resistance (R3), voltage-stabiliser tube (ZD1) and sample resistance (R4), is connected in after the three connects successively between described metal-oxide-semiconductor field effect transistor grid and the source electrode; The common contact of described voltage-stabiliser tube (ZD1), sample resistance (R4) is described sampling end, is connected with the control end of described switching circuit.
10, buffering asynchronous start circuit as claimed in claim 9 is characterized in that: described switching circuit comprises first switching tube (Q2), second divider resistance (R5) and second switch pipe (Q3); Described first switching tube (Q2) base stage is connected with described voltage sample circuit sampling end, and emitter-base bandgap grading connects cold end; Described second divider resistance (R5) is connected between described first switching tube (Q2) collector electrode and second switch pipe (Q3) base stage; Described second switch pipe (Q3) emitter connects hot end, and its collector electrode is used to connect late-class circuit.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100626862A CN100561813C (en) | 2006-09-18 | 2006-09-18 | Method for restraining late-class circuit hot swap impact current and buffering asynchronous start circuit thereof |
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| CNB2006100626862A CN100561813C (en) | 2006-09-18 | 2006-09-18 | Method for restraining late-class circuit hot swap impact current and buffering asynchronous start circuit thereof |
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| CN101150249A CN101150249A (en) | 2008-03-26 |
| CN100561813C true CN100561813C (en) | 2009-11-18 |
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Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI454056B (en) * | 2010-12-22 | 2014-09-21 | 泰達電子公司 | Power module and power supply system |
| CN102723703A (en) * | 2011-03-29 | 2012-10-10 | 海洋王照明科技股份有限公司 | Surge current suppression circuit and lighting fixture |
| CN103904631A (en) * | 2012-12-31 | 2014-07-02 | 海洋王（东莞）照明科技有限公司 | Protection circuit |
| CN104104070A (en) * | 2013-04-07 | 2014-10-15 | 鸿富锦精密电子(天津)有限公司 | Surge current regulating circuit |
| CN106452029B (en) * | 2015-08-12 | 2019-05-17 | 比亚迪股份有限公司 | Current protecting circuit |
| CN107544374A (en) * | 2017-06-05 | 2018-01-05 | 苏州天信德环保科技有限公司 | A kind of basic model total quantity monitoring instrument |
| CN107370356B (en) * | 2017-09-08 | 2023-08-18 | 中国船舶重工集团公司第七0四研究所 | Start current limiting circuit of DC power supply switching power supply converter |
| CN110571773B (en) * | 2019-09-19 | 2021-11-09 | 山东派盟网络科技有限公司 | Protective circuit |
| CN110971114B (en) * | 2019-12-19 | 2021-03-09 | 北京德亚特应用科技有限公司 | Overvoltage protection circuit and power supply equipment |
| CN112928933A (en) * | 2021-01-15 | 2021-06-08 | 北京军陶科技有限公司 | Power supply with surge current suppression and enable control |
| CN116112846B (en) * | 2022-10-08 | 2024-01-30 | 广东保伦电子股份有限公司 | Restarting impact sound eliminating circuit and audio circuit |
| CN116667301B (en) * | 2023-07-31 | 2023-10-13 | 成都新欣神风电子科技有限公司 | High-compatibility impact current suppression circuit |
-
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- 2006-09-18 CN CNB2006100626862A patent/CN100561813C/en not_active Expired - Fee Related
Non-Patent Citations (2)
| Title |
|---|
| 电源模块输入软启动电路的设计. 田龙中等.电子产品世界，第2002卷第8期. 2002 |
| 电源模块输入软启动电路的设计. 田龙中等.电子产品世界，第2002卷第8期. 2002 * |
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