CN100547474C - Display device - Google Patents

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Publication number
CN100547474C
CN100547474C CNB2005101025736A CN200510102573A CN100547474C CN 100547474 C CN100547474 C CN 100547474C CN B2005101025736 A CNB2005101025736 A CN B2005101025736A CN 200510102573 A CN200510102573 A CN 200510102573A CN 100547474 C CN100547474 C CN 100547474C
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China
Prior art keywords
pixel
display device
data line
electrode
line
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CNB2005101025736A
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Chinese (zh)
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CN1746757A (en
Inventor
朴幸源
李成荣
李龙淳
姜南洙
文胜焕
李奉俊
金圣万
金泛俊
文然奎
朴亨俊
姜信宅
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Samsung Display Co Ltd
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Samsung Electronics Co Ltd
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device

Abstract

The invention discloses a kind of display device, it comprises: with a plurality of pixel electrodes of the arranged that comprises row and column, each pixel has the on-off element that connects pixel electrode; Many gate lines, the direction extension that is connected and follows with on-off element, at least two gate lines are specified delegation; And many data lines, be connected with on-off element and extend along the direction of row, wherein, each pixel electrode have first side and than first side more away from second side of data line, and arrange on-off element near second side of pixel electrode.

Description

Display device
The cross reference of related application
The right of priority that korean patent application 10-2004-0072749 number that the present invention requires to submit on September 10th, 2004 korean patent application was submitted on September 10th, 10-2004-0072507 number 1 and the korean patent application of submitting on September 10th, 2004 are 10-2004-0072685 number, its full content is hereby expressly incorporated by reference.
Technical field
The present invention relates to have the display device of improved structure and drive scheme, it has been simplified manufacture process and has reduced cost.
Background technology
Comprise such as the active display device of active matrix (AM) LCD (LCD) and active matrix OLED display (OLED) a plurality of with arranged and comprise a plurality of pixels of on-off element, and such as a plurality of signal wires gate line and data line, that be used to transfer signals to on-off element.In response to the signal that is used for display image that receives from gate line, the on-off element of pixel will be transferred to pixel respectively from the data-signal of data line.The pixel of LCD is regulated the transmissivity of incident light according to data-signal.The pixel of OLED is regulated photoemissive brightness according to data-signal.
Display device also comprises gate drivers, is used for producing and providing signal to gate line; And data driver, be used for data-signal is offered data line.In gate drivers and the data driver each generally includes a plurality of drive integrated circults (IC) chip.Preferably, the quantity of IC chip is seldom to reduce manufacturing cost.Especially, because data-driven IC chip is expensive more a lot of than gate driving IC chip, so the quantity of data-driven IC chip is very important.
LCD comprises liquid crystal (LC) layer that is provided with a counter plate of generation electrode and has dielectric anisotropy, and this liquid crystal layer is arranged between two panels.Produce electrode and generally include the pixel that a plurality of and on-off element (such as, very thin film transistor (TFT)) connect, this pixel electrode is provided with data voltage; And common electrode, the whole surface of cover plate and be provided with common-battery and press.A pair of liquid crystal that produces electrode and be provided with between it forms liquid crystal capacitor, and this produces electrode and is fitted to each other to produce electric field.
LCD produces electrode to the field provides voltage to produce the electric field of liquid crystal layer.Can control the intensity of electric field by the voltage that liquid crystal capacitor is passed in adjusting.Because electric field has determined the direction of liquid crystal molecule and the optical transmission rate that molecular orientation has determined to pass liquid crystal layer, so, can on display, obtain the image of wanting by controlling the voltage-regulation optical transmission rate that is applied.
For fear of the deterioration that produces image owing to the unidirectional electric field of prolonged application etc., will be inverted (inverse) with respect to the every frame of a plurality of data voltages, every row or every ground that common-battery is pressed.
In different inversion type, point is inverted the data voltage polarity of the pixel that will give determined number and is inverted, because Kickback voltage (kickback voltage) has reduced vertical chrominance brightness interference and vertical flicker, thereby improved picture quality.Yet the polarity that flows into the data voltage in each bar data line is inverted the drive scheme that often needs complexity, may cause signal delay.Although can reduce signal delay by using low resistivity metal, make the production run complexity like this and increased manufacturing cost.
On the contrary, row are inverted and will be inverted to the polarity of voltage of the every row in the pixel column of determined number.Because in an image duration, row are not inverted a plurality of data voltages that impose on every data line, can reduce the problem relevant with signal delay significantly.
Yet because vertical chrominance brightness is disturbed with vertical flicker etc., the row inversion techniques is inferior to an inversion techniques.
Summary of the invention
The invention provides a kind of display device with layout of the on-off element that is arranged in its on-chip pixel, this display device is considered when guaranteeing picture quality, reduce the drive scheme of data-driven IC number of chips, thereby simplified production run and reduced cost.
All the other features of the present invention will be explained in the following description, and partly will be apparent by following description, perhaps obtain by practice of the present invention.
The invention discloses a kind of display device, it comprises: with a plurality of pixels of arranged, each pixel has the on-off element that is connected in this; Many gate lines are connected with on-off element and extend along the line direction of matrix, and every row comprises at least two gate lines; And many data lines, be connected with on-off element, every data line extends along the direction of rectangular array, wherein, each pixel electrode have first and than first from far away second of data line, and arrange on-off element near second of pixel electrode.
Should understand that above-mentioned general introduction and following detailed description all are exemplary with indicative, and will provide and of the present inventionly explain further claimed.
Description of drawings
Accompanying drawing can provide to be understood further to of the present invention, and the ingredient of book as an illustration in being included in, and it shows embodiments of the invention, and and instructions be used for explaining principle of the present invention together.Wherein:
Fig. 1 is the structural drawing of LCD according to an embodiment of the invention;
Fig. 2 is the equivalent circuit diagram of the pixel of LCD according to an embodiment of the invention;
Fig. 3 schematically shows the structure of LCD according to an embodiment of the invention;
Fig. 4 is the layout of lower panel according to an embodiment of the invention;
Fig. 5 to Fig. 7 is the sectional view of the lower panel of V-V ' line, VI-VI ' line and the VII-VII ' intercepting in Fig. 4 respectively;
Fig. 8 schematically shows the arrangement of pixel according to another embodiment of the present invention;
Fig. 9 and Figure 10 are the layouts according to the tft array panel of the embodiment of the invention;
Figure 11 is the schematic layout of Fig. 4 to LCD shown in Figure 7;
Figure 12 is the schematic layout of Fig. 8 to LCD shown in Figure 10;
Figure 13 to Figure 18 schematically shows the arrangement of the pixel in LCD according to other embodiments of the present invention.
Embodiment
In order to make those skilled in the art can implement the present invention, describe embodiments of the invention in detail referring now to accompanying drawing.It is multi-form that but the present invention can show as, the embodiment that it is not limited in this explanation.
In the accompanying drawings, for the sake of clarity, enlarged the thickness and the zone of each layer.In full piece of writing instructions, similar elements is enclosed identical label, should be understood that when mention elements such as layer, film, zone or substrate other element " on " time, refer to that it is located immediately on other element, it is mediate perhaps also to have other element.On the contrary, when certain element referred " directly " is positioned on other element, mean that to there is no other element mediate.
Below, with reference to the LCD as display device example (LCD) of accompanying drawing detailed description according to the embodiment of the invention.
Fig. 1 is the structural drawing of LCD according to an embodiment of the invention.Fig. 2 is the equivalent circuit diagram of the pixel of LCD according to an embodiment of the invention.
With reference to Fig. 1, LCD comprises LC display plate component 300 and the gate drivers 400 that is connected with this liquid crystal display board component and data driver 500, the grayscale voltage generator 800 that is connected with data driver 500 and the signal controller 600 of controlling said elements.
With reference to Fig. 1, panel assembly 300 comprises many display signal line G 1-G 2nAnd D 1-D mAnd it is connected and basically with a plurality of pixel PX of arrayed.
With display signal line G 1-G 2nAnd D 1-D mBe arranged on the lower panel 100 and comprise the transmission signal (being also referred to as " sweep signal ") many gate lines G 1-G 2nMany data line D with transmission of data signals 1-D mGate lines G 1-G 2nBasically the direction that follows is extended, and parallel to each other basically, and data line D 1-D mBasically along the direction extension that is listed as and parallel to each other basically.
With reference to Fig. 2, each pixel PX comprises (that is, coupling) the on-off element Q that is connected with data line D with gate lines G, and (that is coupling) the LC capacitor C that is connected with on-off element Q LCWith energy-storage capacitor C STIf desired, can ignore energy-storage capacitor C ST
The on-off element Q that will comprise TFT is arranged on the lower panel 100 and comprises three ends: control end is connected (that is coupling) with gate lines G; Input end is connected (that is coupling) with data line D; And output terminal, with LC capacitor C LCWith energy-storage capacitor C STConnect (that is coupling).
LC capacitor C LCComprise the pixel electrode that is arranged on the lower panel 100 190 and be arranged on common electrode 270 on the upper panel 200 as two ends.The LC layer 3 that is arranged between two electrodes 190,270 plays LC capacitor C LCDielectric effect.Pixel electrode 190 is connected (that is, coupling) with on-off element Q, and common electrode 270 is provided with common-battery pressure V ComAnd cover the whole surface of upper panel 200.It should be understood that common electrode 270 can be arranged on the bottom display board 100, and in two points 190,270 at least one can be approximate stripe shape or bar-shaped.
Energy-storage capacitor C STBe to be used for liquid crystal capacitor C LCAuxiliary capacitor.Energy-storage capacitor C STComprise pixel electrode 190 and independent signal wire, it is arranged on the bottom display board 100, and is overlapping by insulator and pixel electrode 190, and is provided with such as common-battery pressure V ComPredetermined voltage.Alternatively, energy-storage capacitor C ST Comprise pixel electrode 190 and be called adjacent gate line at preceding data line, it is overlapping by insulator and pixel electrode 190.
For color monitor, each pixel PX is a kind of (that is, space segmentation) or each pixel PX display primaries (time is cut apart) sequentially in the display primaries uniquely, so that the space or the summation of time of primary colors is identified as the color of wanting.Fig. 2 illustrates the example of space segmentation, and wherein, each pixel PX is included in the face of a kind of color filter 230 in the expression primary colors in upper panel 200 zones of pixel electrode 190.Alternatively, color filter 230 can be arranged on the top of pixel electrode 190 on the bottom display board 100 or below.
The example of one group of primary colors comprises redness, green and blueness.The pixel PX that comprises the red, green, blue color filter is hereinafter referred to as the red, green, blue pixel.Red, green, blue pixel representational is arranged as bar shaped and arranges, and wherein, each pixel column comprises that successively red, green, blue pixel and each pixel column only represent a kind of color.
One or more polarizer (not shown) are attached in panel 100 and 200 at least one.In addition, can be arranged between polarizer and the panel being used for the anisotropic one or more retardation films of compensatory reflex.
With reference to Fig. 3, the detailed structure of the LCD of one embodiment of the invention is described.
The structure of the schematically illustrated LCD according to an embodiment of the invention of Fig. 3.
As shown in Figure 3, LCD comprises that panel assembly 300, printed circuit board (PCB) (PCB) 550 and at least one are attached to flexible circuit (FPC) film 510 on panel assembly 300 and the PCB 550.
The top portion of PCB 550 vicinal face board components 300 is provided with and installs or be fixed with some circuit components thereon such as signal controller 600, grayscale voltage generator 800 etc.FPC film 510 installation data drive IC 540 and comprise that output terminal a plurality of and data-driven IC540 is connected (promptly, coupling) (that is coupling) input main line (not shown) of being connected of output main line (lead line) 521 and input end a plurality of and data-driven IC 540.
Panel assembly 300 comprises gate line (G 1, G 2...), data line (D 1, D 2...) and pixel, and pixel comprise pixel electrode 190 and with gate line (G 1, G 2...), data line (D 1, D 2...) (that is coupling) on-off element Q and pixel electrode 190 of connecting.Data line (D 1, D 2...) be connected (that is, being coupled) with main line 521 on the FPC film by contact point C1.
Panel assembly 300 also comprises left pseudo-line (dummy line) L1 and right pseudo-line L2, their substantially parallel data line (D 1, D 2...) extend and lay respectively at the most left data line D 1The left side and the rightest data line D mThe right.PCB 550 comprises that also by- pass line 551a and 551b and FPC film 510 also comprise 522a, 522b, 523a, 523b, that is, and and two pairs of connecting lines.
Right pseudo-line L2 is electrically connected (that is, electric coupling) with main line 521, this main line is by connecting line 523a, by-pass line 551a and connecting line 522a and the most left data line D 1Connect.Similarly, left pseudo-line L2 is electrically connected (that is, electric coupling) with another main line 521, and this main line is by connecting line 522b, by-pass line 551b and connecting line 523b and the rightest data line D mConnect.Connecting line 522b is connected (that is coupling) with L2 with pseudo-line L1 at contact point C1 with 523b and connecting line 522a is connected with L2 with pseudo-line L1 at contact point C2 with 523a.Connecting line 522a, 522b, 523a, 523b are connected with 551b with by-pass line 551a at contact point C3.
Each is to gate lines G 2i-1And G 2i(i=1,2 ...) be arranged on pixel electrode 190 row top and below.Data line D j(j=1,2,3 ...) be arranged between the two row adjacent pixel electrodes 190.In other words, every data line D j(j=1,2,3 ...) be arranged between a pair of pixel electrode 190 of contiguous vicinity.The pseudo-line L1 in a left side is arranged on the left side of the most left pixel column and right pseudo-line L2 and is arranged on the right side of right pixel column.
Pixel electrode 190 is by being arranged on on-off element Q and the gate line (G near pixel electrode 190 jiaos (corner) 1, G 2...) and data line (D 1, D 2...) or pseudo-line L1 be connected (that is, coupling) with L2.Because pseudo-line L1 and L2 can be considered to and data line (D 1, D 2...) the formation annexation, so, can omit the annexation between pixel electrode 190 and pseudo-line L1 and the L2.
The corner location of pixel electrode 190 of distributing to each the on-off element Q that is connected in this is according to pixel electrode 190 and gate line (G 1, G 2...) and data line (D 1, D 2...) between connection and with the row or with row mode change.For example, will for pixel electrode 190 will with upper gate line G 2i-1With left data line (D 1, D 2...) connecting the upper left corner setting of the on-off element Q of (that is, being coupled) near pixel electrode 190, it is from upper gate line G 2i-1With left data line (D 1, D 2...) nearest angle.
One-row pixels electrode 190 alternatively with contiguous its pair of grid lines G 2i-1And G 2iConnect (that is coupling) and be connected (that is coupling) with inferior approaching data line with immediate data line alternatively.
Thus, be arranged on a pair of pixel electrode 190 and pair of grid lines and identical data line between two proximity data lines, but different gate lines connects (that is coupling).
Below, discuss being connected of the configuration of the on-off element in picture element matrix and they and each gate line and data line.Pixel in every pixel column has the on-off element that is positioned at alternatively near upper corner and lower corners.Pixel in every pixel column has and is positioned near upper corner and lower corners alternatively and is positioned at the on-off element in corner, left side and corner, right side alternatively.Pair of grid lines be arranged on the top of each pixel column and below, wherein, the on-off element of the pixel in each pixel column is connected (that is, be coupled) with the gate line that approaches most each on-off element.Every data line is arranged between the contiguous a pair of pixel column and the on-off element relevant with a pair of pixel connection (that is coupling).In one embodiment, each of on-off element that has with the identical data line and be connected (that is coupling) is positioned at same pixel column to pixel.In another embodiment, two pixels between two proximity data lines have with same data line the on-off element that is connected (that is coupling) in each pixel column.At last, in another embodiment, two neighborhood pixels in each pixel column have with the different pieces of information line on-off element that is connected (that is coupling).
Above-mentioned configuration is with data line D 1, D 2, D 3... quantity reduce to half of pixel column.The configuration that also can change the pixel electrode 190 shown in Fig. 3 and gate line and data line be connected.
Below, describe LC panel assembly 300 according to an embodiment of the invention in detail with reference to Fig. 4 to Fig. 7.
Fig. 4 is the layout of lower panel according to an embodiment of the invention.Fig. 5 to Fig. 7 is the sectional view of the lower panel of V-V ' line, VI-VI ' line and the VII-VII ' intercepting in Fig. 4 respectively.
With reference to Fig. 4 to Fig. 7, the LC panel comprises tft array panel 100, faces common electrode panel 200, the liquid crystal layer between panel 100 and 200 3 of tft array panel 100.
About tft array panel 100, form on such as the insulating substrate 110 of clear glass or plastics many to gate line 121a, 121b and many energy storage electrode lines 131.
Gate line 121a, 121b are mainly with horizontal expansion and transmission signal.Pair of grid lines 121a, 121b are separated from one another and comprise a plurality of gate electrode 124a, the 124b that (that is, up and down) toward each other extends.Each gate line 121a, 121b also comprise having the end 129 that is used for the enough big zone that contacts with another layer or external drive circuit.
The gate driver circuit (not shown) that is used to produce signal can be installed in flexible print circuit (FPC) film (not shown), and it can be attached on the substrate 110, directly is installed on the substrate 110, or is integrated on the substrate 110. Extensible gate line 121a, 121b with can be integrated into substrate 110 on driving circuit be connected (that is, coupling).
Energy storage electrode 131 can be provided with predetermined voltage, and each energy storage electrode 131 is arranged between the gate line 121 of two vicinities.The energy storage electrode line 133a1-133d's of the energy storage electrode of group more than each energy storage electrode 131 comprises 133a1,133a2,133b1,133b2,133c1,133c2,133d and connection adjacent groups is many to energy storage web member 135a, 135b.
Every group of energy storage electrode 133a1-133d forms a pair of rectangle basically, every each rectangle comprises first energy storage electrode 133a1 or the 133a2 with horizontal expansion, and with the horizontal expansion and second energy storage electrode 133b1 or the 133b2 that be oppositely arranged with the first energy storage electrode 133a1 or 133a2, with longitudinal extension and connect the first and second energy storage electrode 133a1,133a2,133b1, the 3rd energy storage electrode 133c1 of 13,3b2 one end, 133c2, and longitudinal extension and connect the first and second energy storage electrode 133a1,133a2,133b1, the 4th energy storage electrode 133d of the 133b2 other end.A pair of rectangle is shared the 4th energy storage electrode 133d usually and is had 180 ° of rotation symmetries basically with respect to the 4th energy storage electrode 133d center.The first energy storage electrode 133a1,133a2 are near gate electrode 124a and 124b bending.Yet energy storage electrode line 131 can have difformity and configuration.
Gate line 121a, 121b and energy storage electrode line 131 can be made up of the metal that comprises aluminum or aluminum alloy, the metal that comprises silver or silver alloy, the metal that comprises copper or aldary, the metal that comprises molybdenum or molybdenum alloy, chromium, tantalum or titanium.But gate line 121a, 121b and energy storage electrode line 131 can have the sandwich construction of two conductive film (not shown) that comprise that physical property is different.One deck in the film can be made up of low resistivity metal, for example, is made up of the metal that comprises aluminium, the metal that comprises silver, the metal that comprises copper, is used to reduce that signal is delayed or voltage decline.
Other films can be made up of the metal material that comprises such as Cr, Ta or Ti, and this material is consistent with tin indium oxide (ITO) and indium zinc oxide (IZO), has good physics, chemistry and contact characteristics.For example, the combination of double-layer films can comprise bottom Cr film and top Al (alloy) film and bottom Al (alloy) film and top Mo (alloy) film.It should be understood, however, that gate line 121a, 121b and energy storage electrode line 131 can be made up of different metal or conductor.
Gate line 121a, 121b and energy storage electrode line 131 sides are with respect to substrate 110 surface tilt, and its preferred angled angle is about 30-80 °.
On gate line 121a, 121b and energy storage electrode line 131, form by silicon nitride (SiN x) or monox (SiO x) gate insulator 140 formed.
On gate insulator 140, form many to island semiconductor 152,154a, 154b.It is last and comprise the extension at covering gate polar curve 121a, 121b and energy storage web member 135a edge that each island semiconductor 154a, 154b are arranged on grid 124a, 124b.Island semiconductor 152 is arranged on the edge of energy storage web member 135b and coated electrode connecting portion 135b.Island semiconductor 152,154 can be made up of amorphous silicon hydride (being abbreviated as a-Si) or polysilicon.
Form by silicide or with n type impurity at island semiconductor 152,154a, 154b top and heavily to mix a plurality of island Ohmic contact parts 162,163a, the 165a that the n+ amorphous silicon hydride of (phosphorus) is formed.
Island semiconductor 152,154a, 154b and Ohmic contact part 162,163a, 165a, side are also with respect to about 30-80 ° of substrate 110 surface tilt.
Ohmic contact part 162,163a, 165a, and gate insulator 140 on form many data lines 171 and a plurality of drain electrode 175a, 175b respectively.
Data line 171 transmission of data signals and basically with longitudinal extension to intersect with gate line 121a, 121b and energy storage web member 135a, 135b.Each data line 171 comprises that extend and a plurality of source electrode 173a, 173b that bend to similar alphabetical J to gate electrode 124a, 124b.Each source electrode 173a extends in the zone between contiguous two gate electrode 124a, the 124b.
Every data line 171 also comprises end 179, and it has enough big zone and is used for contacting with another layer or external drive circuit.The driving circuit (not shown) that is used to produce data-signal can be installed in the FPC film, and it can be attached on the substrate 110, directly is installed on the substrate 110, or is integrated on the substrate 110.Data line 171 can be connected with the driving circuit on being integrated into substrate 110.
Drain electrode 175a, 175b separate with data line 171 and with respect to gate electrode 124a, 124b, are oppositely arranged with source electrode 173a, 173b.Each drain electrode 175a, 175b comprise wide relatively terminal and narrow relatively end.The end that wide end and energy storage electrode 133a are overlapping and narrow is partly closed by source electrode 173a, 173b.
Gate electrode 124a/124b, source electrode 173a/173b, and drain electrode 175a/175b form TFT with island semiconductor 154a/154b, TFT has raceway groove, is formed among the island semiconductor 154a/154b between source electrode 173a/173b and the drain electrode 175a/175b.
Data line 171 and drain electrode 175a, 175b are by forming such as the refractory metal of molybdenum, chromium, tantalum, titanium or their alloy.Yet data line 171 and drain electrode 175a, 175b can be and comprise infusibility film (not shown) and low-resistivity film (not shown) sandwich construction.For example, sandwich construction can comprise double-decker, and it can comprise bottom Cr/Mo (alloy) film and top Al (alloy) film; And three-decker, it can comprise bottom Mo (alloy) film, middle part A1 (alloy) film and top Mo (alloy) film.Yet gate line 121a, 121b and energy storage electrode 131 can be made up of different metal or conductor.
Data line 171 and drain electrode 175a, 175b have the profile of sloping edge with respect to the surface of substrate, and the angle of inclination is about 30-80 °.
Only Ohmic contact part 162,163a, 165a are arranged between lower floor's island semiconductor 152,154a, 154b and the data line on it 171 and drain electrode 175a, the 175b, and have reduced contact resistance between them.Island semiconductor 152 is set and be positioned at gate line 121a and 121b and energy storage web member 135a, 135b so that the profile on surface is level and smooth or level, thereby avoided the disconnection of data line 171.Island semiconductor 152,154a, 154b comprise some exposed portions, and it is not covered and is stamped data line 171 and drain electrode 175a, 175b, for example, is positioned at source electrode 173a, 173b and drain electrode 175a, 175b.
Can on the expose portion of drain electrode 175a, 175b, data line 171 and island semiconductor 152,154a, 154b, form passivation layer 180.Passivation layer 180 can be by the end face that inorganic insulating material or organic insulation are formed and passivation layer 180 can have level basically.Inorganic insulating material can comprise silicon nitride and monox.Organic insulation can have photonasty and electric medium constant less than 4.0.Passivation layer 180 can comprise lower film that comprises inorganic insulator and the upper film that comprises organic insulator, thus, it has the insulation characterisitic of organic insulator, and organic insulation has prevented the damage of island semiconductor 152,154a, 154b expose portion.
Passivation layer 180 has a plurality of contact holes 185,182, is used for exposing respectively the end 179 of data line 171 and drain electrode 175a, 175b.Passivation layer 180 and gate insulator 140 have a plurality of contact holes 181 of the end 129 that is used to expose gate line 121a, 121b.
On passivation layer 180, form by such as the transparent conductor material of ITO or IZO or a plurality of pixel electrodes of forming such as the reflection conductor material of Ag, Al, Cr or their alloys 190 and a plurality of auxiliary members 81,82 that contact.
Pixel electrode 191 is electrically connected (that is, coupling) by contact hole 185 with drain electrode 175a, 175b physics, thus, and the data voltage that pixel electrode 191 receives from drain electrode 175a, 175b.The pixel electrode 191 that is provided with data voltage produces electric field with the common electrode 270 that provides the common electrode panel that common-battery presses, with the direction of the liquid crystal molecule (not shown) of decision liquid crystal layer 3.Pixel electrode 191 and common electrode 270 form LC capacitor Clc, and after TFT closed, voltage that is provided was provided for it.
Pixel electrode 191 is overlapping with energy storage electrode 133a1-133d.Pixel electrode 191, the drain electrode 175a, the 175b that are connected with pixel electrode 191 and energy storage electrode 131 form energy-storage capacitor C ST, it has increased LC capacitor C LCThe voltage storage capacity.
Pixel electrode 191 has covered the wide end of drain electrode 175a, 175b and has been arranged on longitudinal edge on energy storage electrode 133c1,133c2, the 133d, so that energy storage electrode 133c1,133c2,133d stop in interference between pixel electrode 191 and the data line 171 and the interference between the pixel electrode 191.
Contact auxiliary member 81,82 is connected with the end 129 of gate line 121a, 121b and the end 179 of data line 171 respectively by contact hole 181,182.Adhesion between 81,82 protections terminal 129,179 of contact auxiliary member and improvement terminal 129,179 and the external device (ED).
Below, the common electrode panel 200 according to the embodiment of the invention is described.
The shading piece 220 that is called as black battle array is set on insulating substrate 210.Shading piece 220 is used to prevent or significantly reduce the leakage of light.Shading piece 220 can comprise a plurality of in the face of pixel electrode 191 opening and can have the flat shape identical basically with pixel electrode 191.Alternatively, shading piece 220 can comprise a plurality of in the face of the part that is essentially straight line of data line 171 and in the face of tft array panel 100 top a plurality of parts that broaden to TFT.
Form a plurality of color filter 230 at substrate 210.Color filter 230 be arranged on basically by shading piece 220 limit or region surrounded in.Color filter 230 is basically vertically to extend along pixel electrode 191.Color filter 230 can be represented a kind of such as in the primary colors of red, green, blue.
Form the overlayer of being made up of organic insulator 250 on color filter 230 and shading piece 220, it prevents or prevents basically that color filter 230 is exposed to pollutant, and smooth basically surface is provided.Can omit overlayer 250.
Can on overlayer 250, form by the common electrode of forming such as the transparent conductive material of ITO or IZO 270.
The alignment layer (not shown) can be arranged on the inside surface of panel 100,200 uniformly.
Again with reference to Fig. 1, grayscale voltage generator 800 produces the two group a plurality of grayscale voltages relevant with the pixel transmission rate.Grayscale voltage in one group is pressed V with respect to common-battery ComHave positive polarity, and the grayscale voltage in another group is pressed V with respect to common-battery ComHas negative polarity.
The gate lines G of gate drivers 400 and panel assembly 300 1-G 2nConnect (that is, coupling), comprehensive grid turning-on voltage V from external device (ED) OnClose voltage V with grid OffBe used for gate lines G with generation 1-G 2nSignal.
The data line D of data driver 500 and panel assembly 1-D mConnect (that is, coupling), and select grayscale voltage, be transferred to data line D as data voltage from grayscale voltage generator 800 1-D m
Each gate drivers 400 and data driver 500 can comprise and be installed on the panel assembly 300 or be installed at least one integrated circuit (IC) chip on flexible print circuit (FPC) film with the form of very thin film encapsulation (TCP) that they are attached to liquid crystal display board component 300.Alternatively, driver 400 and 500 can be along display signal line G 1-G 2nAnd D 1-D mIntegrated and integrated with panel assembly 300 with TFT on-off element Q.
The operation of signal controller 600 control gate drivers 400 and data driver 500.
Below, above-mentioned at least operation of LCD is described.
Signal controller 600 from the graphics controller (not shown) (for example is provided with, provide by the outside) received image signal R, G, B and control the input control signal of its demonstration, for example, vertical synchronizing signal Vsync and horizontal-drive signal Hsync, major clock MCLK, data enable signal DE.Produce picture signal R, the G and B that grid control signal CONT1 and data controlling signal CONT2 and processing be applicable to panel assembly 300 operations according to input control signal and received image signal R, G and B after, to gate drivers 400 transmission grid control signal CONT1, to data driver 500 transmission data controlling signal CONT2 and processed images signal DAT.Here, the processing of picture signal R, G, B comprises according to the line of pixels column weight of panel assembly 300 and newly arranges view data R, G, B.
Grid control signal CONT1 comprises and is used for scanning commencing signal STV and the control grid turning-on voltage V that order begins to scan OnThe clock signal of output time.Grid control signal CONT1 also comprises qualification grid turning-on voltage V OnThe output enable signal DE of duration.
Data controlling signal CONT2 comprises that horizontal synchronization commencing signal STH that notice is used for the data transmission of set of diagrams picture and begins, order are to data line D 1-D mApply data voltage load signal LOAD and data clock signal HCLK.Data controlling signal CONT2 also comprises inverted signal RVS, is used for pressing V with respect to common-battery ComBe inverted a plurality of data voltages.
The data controlling signal CONT2 that receives corresponding to slave controller 600, data driver 500 receives the view data DAT packets of information of self-controller 600 for the hemistich pixel, the analog data voltage of selecting in the grayscale voltage that view data DAT is provided by grayscale voltage generator 800, and data voltage imposed on data line D 1-D mBe to be understood that packets of information can comprise the view data DAT of different amounts.
Corresponding to the grid control signal CONT1 that receives from signal controller 600, gate drivers 400 is with grid turning-on voltage V OnBe applied to gate lines G 1-G 2n, thus, open connected on-off element Q.To impose on data line D 1-D mData voltage impose on pixel by the on-off element Q that activates.
Data voltage and common-battery are pressed V ComDifference show as by LC capacitor C LCVoltage, be known as pixel voltage.At LC capacitor C LCIn liquid crystal molecule have direction according to the pixel voltage size, and the direction of molecule has determined the polarisation of light by liquid crystal layer 3.Polarizer changes into transmittance with light polarization.
(equaling the half period of horizontal synchronization letter Hsync or data enable signal DE) is unit this program repeatedly with 1/2 horizontal cycle (or " 1/2H ").In a frame to all gate lines G 1-G 2nApply grid turning-on voltage V successively On, to apply data voltage to all pixels.When finishing behind the frame beginning next frame, the inversion control signal RVS that control imposes on data driver 500 thus, is inverted a plurality of data voltages, and it is known as " frame inversion ".
Except frame is inverted, change the polarity of a plurality of data voltages that flow into each data line at an intraframe data driver 500, change the polarity of pixel voltage thus.As shown in Figure 3, because pixel and data line D 1-D mBetween connection very complicated, so the pixel voltage polarity inversion pattern of the polarity that data driver 500 produces on being inverted pattern and appearing at panel assembly 300 is different.Hereinafter, will be called " driver inversion ", the pixel voltage polarity inversion that appears on the panel assembly 300 is called " obviously (apparent) is inverted " in the inversion of data driver 500.
Polarity inversion pattern shown in Fig. 3 is the inverted driver inversion of row and is 1 * 2 inverted obvious inversion.Driver row be inverted that the data voltage polarity of indication in every data line is fixed or constant and adjacent two data lines in data voltage polarity opposite.
Each row of indication is inverted on 1 * 2 on surface, per two row are inverted polarity.
The above-mentioned configuration of the on-off element of pixel has realized the obvious inversion for inverted 1 * 2 point type of the driver of given row formula.The driver of row formula is inverted to make the material variation that can be used for data line and find at an easy rate thus and is applicable to the material of simplifying production run.In addition, because the Kickback voltage between positive polarity pixel voltage and negative polarity pixel voltage, point type obviously is inverted and is disperseed the poor of brightness, thus, has reduced the defective of vertical line.
Now, the pixel of describing among the LCD according to another embodiment of the present invention with reference to Fig. 8 is arranged.
Fig. 8 schematically shows the arrangement of pixel according to another embodiment of the present invention.
Pixel shown in Fig. 8 is arranged the pixel arrangement that is similar to shown in Fig. 3.
At length, each is to gate lines G 2i-1And G 2i(i=1,2 ...) be arranged on pixel electrode 190 row top and below.Every data line D j(j=1,2,3 ...) be arranged between the two row adjacent pixel electrodes 190.
And two on-off element Q of (that is the coupling) that is connected with a pair of pixel electrode 190 in pixel column are arranged on two adjacent data line D j, D J+1Between and with different gate lines G 2i-1, G 2iConnect.For example, as shown in Figure 8, near the on-off element Q and the upper gate line G of angle setting on the pixel electrode 190 2i-1Connect (that is, coupling), near the on-off element Q and the bottom gate lines G of pixel electrode 190 inferior horns setting 2iConnect (that is coupling).
Each connection that connects on-off element Q and data line is arranged between two adjacent gate lines.
Yet the on-off element Q position that is connected with each pixel electrode 190 among Fig. 8 is far away than the position among the embodiment shown in Fig. 3.At length, near the longitudinal edge of pixel electrode 190 each on-off element Q is set, this longitudinal edge is from a data line longitudinal edge far away in two longitudinal edges of pixel electrode 190.
In a word, pixel and on-off element Q are set so that between two proximity data lines, be provided be expert in the on-off element Q of a pair of neighborhood pixels be connected (that is coupling) with single data line.In addition, the pixel of a pair of vicinity in row connects (that is, coupling) with different data lines, and the on-off element of the pixel of a pair of vicinity is arranged on the opposite of pixel electrode 190 along the direction of row.In pixel column, it is right to repeat to be provided with the pixel with same structure.
Below, describe tft array panel in detail with reference to Fig. 9 and Figure 10 with pixel arrangement shown in Figure 8.
Fig. 9 and Figure 10 are the layouts according to the tft array panel of the embodiment of the invention.
With reference to Fig. 9 and Figure 10, the layer structure of tft array panel and the layer similar shown in Fig. 4 to Fig. 7 according to an embodiment of the invention, and thus, for convenience's sake, omit the xsect of TFT panel.
Many gate line 121a, 121b that comprise gate electrode 124a, 124b are set on substrate 110 and gate insulator 140, comprise the many energy storage electrode lines 131 of energy storage electrode 133a1-133d and energy storage web member 135a, 135b.Set gradually a plurality of island semiconductors 152,154a, 154b and a plurality of Ohmic contact part 162,163a, 163b, 165a, 165b thereon.On Ohmic contact part 162,163a, 163b, 165a, 165b and gate insulator 140, form many data lines 171 and a plurality of drain electrode 175a, the 175b that comprise source electrode 173a, 173b and terminal 179.And form passivation layer 180 thereon.Passivation layer 180 and gate insulator 140 are provided with a plurality of contact holes 181,182,185.On passivation layer 180, form a plurality of pixel electrodes 190 and a plurality of auxiliary members 82,81 that contact.
Tft array panel shown in Fig. 9 and Figure 10 also comprise a plurality of island semiconductors 153 and be arranged on island semiconductor 153 and data line 171 between Ohmic contact part (not shown).This island semiconductor 153 is arranged on the infall of gate line 121a, 121b and data line 171, so that the profile on surface is level and smooth or level, thereby has avoided the disconnection of data line 171.
And each source electrode 173a, the 173b shown in Figure 10 has the shape of U-shaped basically or crooked letter.Drain electrode 175a, 175b extend longitudinally the top edge with crossgrid electrode 124a, 124b.Because the top edge of gate electrode 124a, 124b is arranged essentially parallel to the bearing of trend of gate line 121a, 121b, so, when drain electrode 175a, 175b when the bearing of trend of gate line 121a, 121b moves, the overlapping region of drain electrode 175a, 175b and gate electrode 124a, 124b is consistent basically.
Situation shown in Fig. 8 to Figure 10 has reduced vertical stripes than the embodiment shown in Fig. 4 to Fig. 7, below with reference to Figure 11 and Figure 12 this is elaborated.
Figure 11 is the schematic layout of Fig. 4 to LCD shown in Figure 7.Figure 12 is the schematic layout of Fig. 8 to LCD shown in Figure 10.Figure 11 and Figure 12 bend zone are the zones of being blocked by shading piece.
Distance between two adjacent pixel electrodes 190, between pixel electrode 190 during configuration data line 171 and between pixel electrode 190 difference during the layout data line not.For configuration data line 171 between pixel electrode 190, zone that need be wideer than data line 171.
Because the width difference between this pixel electrode 190, whether according to configuration data line 171 decides the width of shading piece.For example, for 15 feet WXGA LCD, the width that is arranged on the shading piece width segments on the data line 171 is about 29 microns, and is arranged between the pixel electrode 190, and the width that the shading piece part of data line is not set is about 18 microns.
With reference to Figure 11, the area of the shading piece of cover data line 171 " A " part is greater than the area of shading piece " B " part that does not have data line.The a pair of pixel that is arranged between the data line 171 has less than the effective display area that data line is not set therein, thereby produces the longitudinal stripe defective.
But, among the LCD shown in Fig. 8 to Figure 10, do not comprise and arrange on-off element Q between the pixel electrode 190 of data line 171.Therefore, the area of shading piece part D comprises the area in gap between area that on-off element Q occupies and the pixel electrode 190, and comprises that the area of the portion C of data line 171 does not comprise the area that on-off element Q occupies.The area that is occupied by on-off element Q can compensate the area that increases owing to insertion data line 171, thereby has reduced the difference of area between portion C and the D, has reduced the longitudinal stripe defective.
Below, describe pixel arrangement according to another embodiment of the present invention in detail with reference to Figure 13 to Figure 15.
The arrangement of the schematically illustrated pixel in LCD according to other embodiments of the present invention of Figure 13 to Figure 15, wherein, the arrangement of pixel and the homotaxy of the pixel shown in Fig. 8.
Each is to gate lines G 2i-1And G 2iBe arranged on pixel electrode 190 row top and below.Every data line D jBe arranged between the two row adjacent pixel electrodes 190.
Two on-off element Q of (that is the coupling) that is connected with a pair of pixel electrode 190 in pixel column are arranged on two adjacent data line D j, D J+1Between and with different gate lines G 2i-1, G 2iConnect.For example, as shown in figure 13, near the on-off element Q and the upper gate line G of angle setting on the pixel electrode 190 2i-1Connect (that is, coupling), near the on-off element Q and the bottom gate lines G of pixel electrode 190 inferior horns setting 2iConnect (that is coupling).
In addition, the longitudinal edge of neighborhood pixels electrode 190 is provided with on-off element Q, and this edge is relatively away from data line, and each interconnection of on-off element Q and data line is arranged between two adjacent gate polar curves.
Yet the on-off element Q shown in Figure 13 to Figure 15 is different with the interconnection shown in Fig. 8 with the interconnection between the data line, and will be described this structure below.
According to the arrangement shown in Figure 13, the on-off element Q in contiguous every pair of pixel on line direction (hereinafter, be called pixel to) connects (that is, being coupled) with different data lines.Connect with different data line and relative position on column direction is provided with on-off element Q in adjacent two pixels of column direction.Be connected (that is, being coupled) and on column direction, be arranged on relative position with the data line of homonymy not at the on-off element Q of the respective pixel of two contiguous pixel centerings of line direction.As a result, obtaining pixel shown in Figure 13 by 2 * 4 picture element matrixs of repeated arrangement in line direction and column direction arranges.
In the arrangement shown in Figure 14, be connected (that is coupling) with single data line at the on-off element Q of each pixel centering.Two contiguous in column direction pixels are provided with on-off element Q with different data line connections and in same position.Two contiguous in line direction pixels are to having identical structure.As a result, obtaining pixel shown in Figure 14 by 2 * 2 picture element matrixs of repeated arrangement in line direction and column direction arranges.
In the arrangement shown in Figure 15, be connected (that is coupling) with single data line at the on-off element Q of each pixel centering.Two contiguous in column direction pixels are provided with on-off element Q with different data line connections and in same position.On-off element Q in the respective pixel of two contiguous pixel centerings of line direction is connected (that is, being coupled) and is arranged on relative position on column direction with the data line of the same side.As a result, obtaining pixel shown in Figure 15 by 2 * 4 picture element matrixs of repeated arrangement in line direction and column direction arranges.
Below, arrange with reference to the pixel that Figure 16 to Figure 18 describes in detail according to other embodiments of the present invention.
Figure 16 to Figure 18 schematically shows the arrangement of the pixel in LCD according to other embodiments of the present invention, wherein, and the arrangement of pixel and the homotaxy of the pixel shown in Fig. 8.
Each is to gate lines G 2i-1And G 2iBe arranged on pixel electrode 190 row top and below.Every data line D jBe arranged between the two row adjacent pixel electrodes 190.
Two on-off element Q and different gate lines G 2i-1, G 2iConnect (that is coupling).For example, on-off element Q and the upper gate line G that is provided with near angle on the pixel electrode 190 2i-1Connect (that is, coupling), near the on-off element Q and the bottom gate lines G of pixel electrode 190 inferior horns setting 2iConnect (that is coupling).
Each on-off element Q is near the longitudinal edge setting of pixel electrode 190, this longitudinal edge from data line farthest, and each interconnection (interconnection) 174 of on-off element Q and data line is arranged between two adjacent gate polar curves.
On-off element Q shown in Figure 13 to Figure 15 is different with the interconnection shown in Fig. 8 with the interconnection between the data line.Two on-off element Q and single interconnection 174.For example, as shown in figure 16, the contiguous upper and lower pixel centering of column direction, the lower switches element Q that top pixels is right is connected (that is coupling) with single data line with the right upper switches element Q of bottom pixel.
In the arrangement shown in Figure 16, in the on-off element Q of each pixel centering and different data line connections (that is coupling).Two contiguous in column direction pixels are provided with on-off element Q with different data line connections and in same position.Two contiguous in line direction pixels are to having identical structure.As a result, obtaining pixel shown in Figure 16 by 2 * 2 picture element matrixs of repeated arrangement in line direction and column direction arranges.
In the arrangement shown in Figure 17, in the on-off element Q of each pixel centering and different data line connections (that is coupling).Two contiguous in column direction pixels are provided with on-off element Q with different data line connections and in same position.Be connected (that is, being coupled) and on column direction, be arranged on relative position with the data line of homonymy not at the on-off element Q of the respective pixel of two contiguous pixel centerings of line direction.As a result, obtaining pixel shown in Figure 17 by 2 * 4 picture element matrixs of repeated arrangement in line direction and column direction arranges.
In the arrangement shown in Figure 18, in the on-off element Q of each pixel centering and different data line connections (that is coupling).Contiguous two pixels and single or different data line connection and on-off element Q is set in column direction in same position or relative position.Be connected (that is, being coupled) and on column direction, be arranged on relative position with the data line of homonymy not at the on-off element Q of the respective pixel of two contiguous pixel centerings of line direction.As a result, obtaining pixel shown in Figure 180 by 4 * 4 picture element matrixs of repeated arrangement in line direction and column direction arranges.
Below, will the polarity invert form of the data voltage of Figure 13 to the LCD shown in Figure 180 be described.
Figure 13 is inverted to the driver among the LCD shown in Figure 180 and is the row inversion.
Figure 13 and inversion shown in Figure 17 are 1 * 1 inversion, and Figure 14 extremely inversion shown in Figure 16 is 1 * 2 inversion.Inversion shown in Figure 180 is 2 * 1 inversions.
As mentioned above, the above-mentioned setting of pixel switch element realized obviously being inverted for inverted 1 * 2 shape of given row type driver.Row shape driver is inverted and can be changed the material that is used for data line, thereby may reduce cost and simplify production run.Disperse the poor of brightness because the Kickback voltage between positive polarity pixel voltage and negative polarity pixel voltage, point type obviously are inverted, thus, reduced the defective of vertical line.
Quantity according to the said structure and the drive scheme of the embodiment of the invention reduced data-driven IC chip has guaranteed picture quality simultaneously.
It should be understood that above-mentioned discussion is not limited thereto and can be used for other display device such as the OLED device.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (20)

1. display device comprises:
With a plurality of pixels of arranged, the on-off element that each pixel comprises pixel electrode and is connected in described pixel electrode;
Many gate lines are connected with described on-off element and extend along the direction of the row of described matrix; And
Many data lines are connected with described on-off element, and every data line extends along the direction of described matrix column,
Wherein, two gate lines are arranged between two adjacent lines of pixels, and
Described each pixel electrode have first side and than described first side more away from next-door neighbour's second side of data line, and described on-off element is near the second side setting of described pixel electrode.
2. display device according to claim 1, wherein, be arranged at least two neighbors in every row between two adjacent data lines and the formation pixel groups, and form described two neighbors of described pixel groups and different gate line connections.
3. display device according to claim 2, wherein, the described pixel of each in described pixel groups is connected with same data line.
4. display device according to claim 2, wherein, the described pixel in described pixel groups connects with different data lines.
5. display device according to claim 2, wherein, the neighbor in row is connected with same data line.
6. display device according to claim 2, wherein, the neighbor in row connects with different data lines.
7. display device according to claim 2, wherein, the described different gate lines that will connect with the described pixel in each pixel groups are arranged in the upper side and the lower side of described pixel.
8. display device according to claim 1, wherein, two neighbors in every row are arranged between two adjacent data lines and form pixel groups, and the on-off element of two neighbors of described pixel groups is positioned opposite to each other.
9. display device according to claim 8, wherein, the described on-off element of neighbor that will be in row is arranged on the mutually the same position.
10. display device according to claim 8, wherein, the described on-off element of neighbor that will be in row is arranged on the position respect to one another.
11. display device according to claim 8, wherein, the described on-off element of the respective pixel in will being expert in two sets of adjacent pixels is arranged in respectively on the mutually the same position.
12. display device according to claim 8, wherein, the described on-off element of the respective pixel in will being expert in two sets of adjacent pixels is arranged in respectively on the position respect to one another.
13. display device according to claim 1 wherein, is connected described data line by interconnection with described on-off element.
14. display device according to claim 13 wherein, is arranged each interconnection between two adjacent gate lines.
15. display device according to claim 13, wherein, with each the interconnection with described on-off element in two link to each other.
16. display device according to claim 1, wherein, each described on-off element comprises:
Gate electrode is connected with in the described gate line one, and has parallel with a described gate line basically side;
Source electrode is connected with in the described data line one; And
Drain electrode is connected with in the described pixel electrode one and intersects with a side of described gate electrode.
17. display device according to claim 1, wherein, the driver of described display device is inverted and is the row inversion.
18. display device according to claim 17, wherein, the obvious inversion of described display device is inverted for point.
19. display device according to claim 1 also comprises:
Shading piece is arranged between the described pixel electrode.
20. display device according to claim 19, wherein, described shading piece comprises:
First extends and overlapping with described data line along the direction of described row;
Second portion extends and not overlapping with described data line along the direction of described row; And
Third part, overlapping with described on-off element,
Wherein, described first is wideer than described second portion.
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Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101358827B1 (en) 2006-07-24 2014-02-06 삼성디스플레이 주식회사 Liquid crystal display
KR101461016B1 (en) * 2006-12-21 2014-11-13 엘지디스플레이 주식회사 Liquid crystal display and driving method thereof
KR101354406B1 (en) * 2008-05-23 2014-01-22 엘지디스플레이 주식회사 Liquid Crystal Display
CN101726941B (en) * 2008-10-28 2011-07-20 瀚宇彩晶股份有限公司 Vertical alignment liquid crystal display and pixel structure thereof
KR101543632B1 (en) * 2009-04-20 2015-08-12 삼성디스플레이 주식회사 Display device
KR101604140B1 (en) * 2009-12-03 2016-03-17 엘지디스플레이 주식회사 Liquid crystal display
KR101292046B1 (en) * 2009-12-29 2013-08-01 엘지디스플레이 주식회사 Liquid crystal display device
KR20120010777A (en) * 2010-07-27 2012-02-06 엘지디스플레이 주식회사 Liquid crystal display
KR20120111684A (en) * 2011-04-01 2012-10-10 엘지디스플레이 주식회사 Liquid crystal display device
US9362546B1 (en) 2013-01-07 2016-06-07 Quantumscape Corporation Thin film lithium conducting powder material deposition from flux
EP3055269B1 (en) 2013-10-07 2020-09-09 QuantumScape Corporation Garnet materials for li secondary batteries
EP3283450A4 (en) 2015-04-16 2018-10-17 QuantumScape Corporation Setter plates for solid electrolyte fabrication and methods of using the same to prepare dense solid electrolytes
US9966630B2 (en) 2016-01-27 2018-05-08 Quantumscape Corporation Annealed garnet electrolyte separators
CN105789220B (en) 2016-03-24 2019-05-14 京东方科技集团股份有限公司 A kind of double grid linear array substrate, test method, display panel and display device
BR112018012685A2 (en) * 2016-03-28 2018-12-04 Apple Inc. light emitting diode display
KR102486413B1 (en) * 2016-06-15 2023-01-10 삼성디스플레이 주식회사 Display panel and display apparatus including the same
CN105974702A (en) * 2016-07-08 2016-09-28 深圳市华星光电技术有限公司 Array substrate and display device
WO2018075809A1 (en) 2016-10-21 2018-04-26 Quantumscape Corporation Lithium-stuffed garnet electrolytes with a reduced surface defect density and methods of making and using the same
US11489193B2 (en) 2017-06-23 2022-11-01 Quantumscape Battery, Inc. Lithium-stuffed garnet electrolytes with secondary phase inclusions
US10347937B2 (en) 2017-06-23 2019-07-09 Quantumscape Corporation Lithium-stuffed garnet electrolytes with secondary phase inclusions
WO2019090360A1 (en) 2017-11-06 2019-05-09 Quantumscape Corporation Lithium-stuffed garnet thin films and pellets having an oxyfluorinated and/or fluorinated surface and methods of making and using the thin films and pellets
CN207380420U (en) * 2017-11-17 2018-05-18 京东方科技集团股份有限公司 A kind of array substrate and display device
CN110221489B (en) * 2019-05-06 2022-04-15 北海惠科光电技术有限公司 Array substrate and display device
CN112394578B (en) * 2019-08-16 2023-06-27 京东方科技集团股份有限公司 Array substrate, display panel and driving method thereof
CN114063358A (en) * 2020-08-07 2022-02-18 深超光电（深圳）有限公司 Thin film transistor array substrate and display panel

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10173838A (en) * 1996-12-05 1998-06-26 Citizen Watch Co Ltd Facsimile equipment

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