CN100535813C - Embedded movement control card based on ARM - Google Patents
Embedded movement control card based on ARM Download PDFInfo
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- CN100535813C CN100535813C CNB2008100361502A CN200810036150A CN100535813C CN 100535813 C CN100535813 C CN 100535813C CN B2008100361502 A CNB2008100361502 A CN B2008100361502A CN 200810036150 A CN200810036150 A CN 200810036150A CN 100535813 C CN100535813 C CN 100535813C
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Abstract
An embedded motion control card which is based on an ARM chip pertains to the field of the design technology of the motion control cards, a main control module in the invention is respectively connected with an FPGA module, an expansion interface module, a memory module, a watchdog, a reset system module and a power supply module, the FPGA module is respectively connected with a system clock system, a GPIO module, a JTAG interface module, a dual-port communication module, a DA module and an AD module, the dual-port communication module is connected with an upper computer by a PC104 bus module to be responsible for the communication between the main control module and the upper computer; the input and output signals of the DA module, the AD module and the GPIO module are connected with an external servo driver and a switch etc. by an input and output signal interface module; the embedded motion control card adopts the ARM microprocessor as a core part, thus realizing the high-speed and high-precision motion control, reducing the number of the elements, reducing the size and adopting the FPGA module to carry out the decoding planning of the hardware address.
Description
Technical field
The present invention relates to a kind of motion control card of fields of numeric control technique, specifically is a kind of embedded movement control card based on ARM.
Background technology
In fields of numeric control technique, motion controller is the core component of Digital Control.Motion controller often adopts the structure of " motion control card+PC ", PC partly is mainly used in the function that realizes man-machine interaction, comprise numerical control programming input, condition monitoring, manual control etc.,, can select to adopt common PC or Industrial PC at different application scenarios.And motion control card is the core cell of motion control, and the mechanical motion that it can be transformed into the instruction of expectant control scheme expectation realizes the accurate position of mechanical motion, speed or torque control.
Find through literature search prior art, in " based on the realization of robot motion's controller of ARM and FPGA " literary composition that Li Li etc. delivered on " computer measurement and control " the 15th phase in 2007, provided a kind of embedded robot motion's controller architecture based on arm processor and FPGA (field programmable gate array), comprised with ARM chip S3C44BOX as compute chip, connect the decoding of fpga chip EP2C8 hardware, control motor, and the motion controller that carries out communication by 485 serial ports that are connected with the S3C44BOX chip.But this controller has following shortcoming: (1) systematic microprocessor adopts the processor of ARM7 framework, and speed is slower.System adopts serial ports and outside to carry out communication, and speed is slower, and transmission range is limited, and transmission mode falls behind; (2) less, the Flash storer 12MB of this system configuration storer, SDRAM storer 32MB if software systems are constantly upgraded, can not adapt to growth requirement; (3) system adopts μ c-OS II operating system, and the user API that this operating system provides is less, and extensibility is not strong.
Summary of the invention
The present invention is directed to above-mentioned the deficiencies in the prior art, a kind of embedded movement control card based on ARM (advanced Reduced Instruction Set Computing collection chip) is provided, making its chip with the ARM framework is core, adopt FPGA (field programmable gate array) chip to carry out hardware decoding, and adopt dual-port communication module and host computer to carry out communication.Low-power consumption of the present invention, many interfaces, strong arithmetic capability, low cost.
The present invention is achieved through the following technical solutions, the present invention includes: main control module, FPGA module (field programmable gate array module), memory module, house dog and resetting system module, expansion connection module, system clock module, GPIO module (GIO), JTAG (combined testing action group standard) interface module, dual-port communication module, DA module (D/A converter module), AD module (analog-to-digital conversion module), power module, input/output signal interface module, wherein:
The main control module is the ARM microcontroller, be responsible for the control that conducts interviews of memory module, GPIO module, and the look-at-me that dual-port communication module, JTAG module, input/output signal interface module, expansion connection module are transferred to the main control module is responded; The main control module enters the FPGA module with data transmission, also control information is imported into the FPGA module simultaneously;
The FPGA module sends in dual-port communication module, DA module, AD module, GPIO module, the jtag interface module according to the control information of the main control module data with input according to the logical operation function of its inside; Because FPGA module peripheral interface is many, has expanded hardware and can distribute the address, FPGA module and main control module have constituted the core of total system jointly;
Whether house dog and reseting module are responsible for monitoring the main control module locked, and power module is of short duration stops to the main control module for power supply in control when the main control module breaks down, and realizes restarting of main control module;
The jtag interface module reads the data message of main control module in real time by the FPGA module, realizes functions such as the on-line debugging of software systems and single step run when exploitation;
Expansion connection module obtains external information (CLIENT PROGRAM, parameter, network hard disc data are set), and external information is transferred to the main control module;
System clock module is responsible for providing crystal oscillator to the main control module;
The GPIO module is responsible for exporting the data latching of FPGA module to the input/output signal interface module, is responsible for simultaneously external switch amount and servosignal are latched input FGPA module;
Become analog signals after the digital quantity signal conversion of DA module with the transmission of FPGA module, and be transferred to input/output interface module;
The AD module is a digital quantity signal with the external analog amount conversion of signals of input/output interface module input, and transmission enters the FPGA module;
The input/output signal interface module is exported to outside servo-driver and PLC (programmable logic controller (PLC)) control circuit after the signal of DA module, GPIO module output is amplified, and external switch amount signal and servo feedback signal and external analog amount signal are anticipated the back is transferred to the FPGA module by the AD module;
Power module is to the main control module for power supply, and gives other modules by the main control module for power supply.
Described memory module comprises FLASH storer (flash memories), SDRAM storer (synchronous dynamic random access memory), NVRAM storer (non-volatile random access memory), wherein: the FLASH storer is used for the storage system program, and the NVRAM storer is used for the operation that storage system configuration file, SDRAM storer are used for program.
Described expansion connection module comprises: serial port module, usb interface module, Network Interface Module, wherein:
Serial port module is responsible for serial communication, is transferred to the FPGA module after outside rs 232 serial interface signal is handled;
Usb interface module is responsible for and extraneous USB communication, according to usb protocol external information is transferred to the FPGA module;
Being connected of Network Interface Module realization and external ethernet, external information is transferred to the FPGA module according to procotol.
When the present invention works, the dual-port communication module reads motion control instruction from host computer, enter the main control module by the transmission of FPGA module and carry out the relevant interpolation computing of motion control, obtain motion feeding data, these data are entered the DA module by the transmission of FPGA module, the analog signals that obtains enters servo-driver by input/output interface module output, the work of control servo-driver; During servo-driver work, outside servo-driver position detection signal feedback signal enters the GPIO module by the input/output interface module transmission again, and final transmission enters the main control module, the main control module is carried out processing such as movement position correction, sports limiting judgement according to feedback information, the real time kinematics information (movement locus, speed, acceleration etc.) that obtains according to feedback information in the module of main control simultaneously enters the dual-port communication module via the transmission of FPGA module, is transferred to host computer again and feeds back to the user.During the Collaborative Control motion state, the AD module is converted into digital quantity signal with this signal, and sends into the main control module by the FPGA module when there is analog signals the outside, and the main control module is handled according to the adjustment that this signal carries out kinematic parameter.In said process, the main control module is responsible for and the host computer interactive information, be responsible for interpolation operation, draws the motion amount of feeding, is responsible for according to the motion correction of feedback information etc.; The FPGA module is the mutual transfer platform of most of module and main control module information, and data are all advanced (going out) main control module by the FPGA module.
The present invention compares with prior art, has following advantage:
(1) the present invention adopts ARM kernel microprocessor as core component, arm processor has advantages such as volume is little, power consumption is little, cost is low, speed is fast, the standard interface kind that it provides is abundant, make whole device can satisfy the requirement of high-speed, high precision motion control, strengthened the real-time of system, reduce the components and parts number simultaneously, made components and parts use decreased number 90%; Dwindle volume, made the integrated circuit board volume-diminished three times, improved the stability of system, made this invention can be applied to various embedded occasions.
(2) the present invention adopts the FPGA module that hardware address is deciphered planning, has guaranteed the abundance of hardware address, has solved in the past that some motion control card hardware can distribute the few problem in address, makes motion control card constantly to expand.The use of FPGA module has also reduced the design flow of logical circuit widely, has reduced the application of logic circuit module more than 60% in the circuit, has reduced the use of other chip, and cost has been reduced more than 50%, and stability obtains increasing.
Description of drawings
Fig. 1 is a system architecture diagram of the present invention;
Fig. 2 is a dual-port communication module frame chart of the present invention;
Fig. 3 is a DA module frame chart of the present invention;
Fig. 4 is a GPIO module frame chart of the present invention;
Fig. 5 is an input/output signal interface module block diagram of the present invention;
Fig. 6 is a motion control process flow diagram of the present invention.
Embodiment
Below in conjunction with accompanying drawing embodiments of the invention are elaborated: present embodiment is being to implement under the prerequisite with the technical solution of the present invention, provided detailed embodiment and concrete operating process, but protection scope of the present invention is not limited to following embodiment.
As shown in Figure 1, present embodiment comprises: main control module, FPGA module, memory module, house dog and reseting module, expansion connection module, system clock module, GPIO module, jtag interface module, dual-port communication module, DA module, AD module, power module, input/output signal interface module, wherein:
The main control module links to each other with FPGA module, expansion connection module, memory module, house dog and resetting system module, power module respectively, the FPGA module links to each other with system clock module, GPIO module, jtag interface module, dual-port communication module, DA module, AD module respectively, the dual-port communication module links to each other with host computer by the PC104 bus module, is responsible for the communication between main control module and the host computer; Input/output signal in DA module, AD module, the GPIO module links to each other with outside servo-driver and switch by the input/output signal interface module.
The main control module is the ARM microcontroller, adopt the AT91RM9200 chip of atmel corp, be responsible for the control that conducts interviews of memory module, GPIO module, and the look-at-me that dual-port communication module, JTAG module, input/output signal interface module, expansion connection module are transferred to the main control module is responded; And exercise data calculates in real time in system under the software scheduling; The module of main control simultaneously enters the FPGA module with data transmission, also control information is imported into the FPGA module simultaneously;
Fpga chip in the FPGA module is the EP1K30 chip of altera corp, sends in dual-port communication module, DA module, AD module, GPIO module, the jtag interface module according to the control information of the main control module data with input according to the logical operation function of its inside; FPGA module peripheral interface is many simultaneously, has expanded hardware and can distribute the address, and FPGA module and main control module have constituted the core of total system jointly;
House dog and reseting module link to each other with power module, and whether be responsible for monitoring main control module locked, and power module is of short duration stops to the main control module for power supply in control when the main control module breaks down, and realizes restarting of main control module;
The jtag interface module reads the data message of main control module in real time by the FPGA module, realizes functions such as the on-line debugging of software systems and single step run when exploitation.
The GPIO module is a GIO, is responsible for exporting the data latching of FPGA module to the input/output signal interface module, is responsible for simultaneously external switch amount and servosignal are latched input FGPA module;
Become analog signals after the digital quantity signal conversion of DA module with the transmission of FPGA module, and be transferred to input/output interface module;
AD module AD conversion chip wherein is the AD7862-10 cake core, with the external analog amount conversion of signals of input/output interface module input is digital quantity signal, and transmission enters the FPGA module, and the AD module is converted to 12 significant figure amount with analog quantity, supports two-way AD to change simultaneously.
Export to outside servo-driver after the input/output signal interface module is amplified the signal of DA module, GPIO module output and state shows, and external switch amount signal and servo feedback signal and external analog amount signal are anticipated the back be transferred to the FPGA module by the AD module.
Power module is to the main control module for power supply, and give other modules by the main control module for power supply, power module provides three kinds of DC voltage to be "+5V ", "+12V " and " 12V ", and a ground power supply " GND ", and power module will carry out supplying with each module after the filtering to voltage.
The described memory module data of storing moving control card, and carry out data write by the main control module and operate, comprise: Flash storer, SDRAM storer, NVRAM storer, wherein: the Flash storer is used for deposit operation system and application program etc., the Flash storer adopts the AT49BV6416 chip, this chip has the 64M storage space, can place complete linux kernel and application program; The SDRAM storer uses as internal memory, and concrete model is HY57V571620, stores its size and is 16M; It is the chip of UL635H256 that the NVRAM storer adopts model, is mainly used in storage system configuration file etc.
Described system clock module is responsible for providing crystal oscillator to the main control module, is a 32.768k quartz crystal oscillator device, is connected with the external clock interface of ARM chip, and the crystal oscillator signal of main control module is provided.
As shown in Figure 2, described dual-port communication module is a communication chip, and communication chip adopts the IDT7024 chip.This communication chip has two marking devices to be called left side marking device and right side marking device, for communication two party provides marked effect.Communication chip is responsible for the FPGA module of main control module controls and the communication between the host computer, its communication modes is specific as follows: communication adopts the marking device logical course to carry out, if the main control module will read and write data to communication chip, then by the FPGA module to the left marking device apply for, then main control module is carried out the mutual of data stream by FPGA module and dual-port module communication chip, lock the right side marking device simultaneously, make the right side can not carry out the mutual of data stream between host computer and the dual-port module communication chip, guarantee that confusion does not take place the data in the dual-port communication module.After data stream and semaphore were finished alternately, the marking device in left side also needed the locking release with the right-side signal lamp, prevents locked phenomenon.If the right side host computer wishes to read and write data to dual-port module communication chip by bus, then same need apply for by the marking device on right side.Data stream between host computer and the dual-port module communication chip and semaphore transmission are transmitted by the PC104 bus.The communication modes of dual-port communication module has guaranteed the efficiently and accurately communication of motion control card and master system.
As shown in Figure 3, described DA module comprises DA conversion chip and operational amplifier, and the DA conversion chip adopts the TLV5630 chip, and digital quantity signal is converted to the analog signals of 0-2.5v, supports maximum 8 road analog signals passages outputs; The digital quantity input signal is exported according to passage after entering the DA conversion chip by the FPGA module, and every two paths enters same operational amplifier, and its model of operational amplifier is MC33179.Through after the voltage amplification, the output of the analog quantity of realization-10V to 10V, analog quantity supports 8 the road to export simultaneously at most, can control eight servo-drivers.
As shown in Figure 4, described GPIO module comprises 4 input data latch and 4 output data latch, be responsible for to handle main switching value signal in the motion control, comprise servo driving start-stop, spacing, just change counter-rotating, decelerations, signal such as time zero.Bus data is 16, and per eight switching value signals are exported by an output data latch, and one is switching signal amount of representative.Output data latch adopts 7,4HC,377 six rising edge D flip-flops, and output data latch all is 8, and two output data latch are one group, and 16 bit data in the lucky corresponding bus are carried out gating output by the chip selection signal in the address wire.Equally, input data latch adopts 7,4HC,244 eight road ternary bufferings to drive, and corresponding every group of data are imported with one group of two input data latch.Carry out gating output by the chip selection signal in the address wire.Two-way input bus signal and two-way output bus signal be can expand like this, 32 inputs and 32 output signals amounted to.
As shown in Figure 5, described input/output interface module, mainly comprise driving amplifier LM1413, drive comparer LM139, optocoupler, high speed photo coupling, the signal that AD module, DA module, the transmission of GPIO module are come is divided into common output signal, high speed output signal, common input signal, high speed input signal, shaft encoder signals by function, wherein normal signal is a slow speed signal, does not require the system high-speed response; High speed signal needs system to respond fast.Common output signal inserts driving amplifier again through light-coupled isolation, amplifies output through signal, and the difference of high speed output signal and common output signal is that it adopts high speed photo coupling to isolate, and speed is faster.External input signal will enter motion control card, also need this module to carry out light-coupled isolation, wherein common input signal is through light-coupled isolation, high speed input signal is isolated through high speed photo coupling, after the axle grating encoder signal feedback, through driving the conversion of comparer, be converted into motion control card inner shaft code device signal.
As shown in Figure 6, during present embodiment work, host computer enters the dual-port communication module with movable information by the PC104 bus transfer, motion control card reads information by the FPGA module from the dual-port communication module, be transferred to the main control module and handle, the digital signal of controlled servo driving, sending to the DA module converts by the FPGA module again is analog signals, via the input/output signal interface module, the control servo-driver.Servo-driver has feedback signal, feedback signal is by the input/output signal interface module, change the GPIO module again over to and latch back input FPGA module, send the main control module back to by the FPGA module, the main control module is carried out next step control according to this feedback signal, the module of main control simultaneously sends the actual motion information that feedback obtains to host computer by the dual-port communication module, allows the user understand the motion real-time condition.
Present embodiment is when practical application, only it need be connected by the two-port RAM communication modes with Industrial PC, the operation controlling application program, the corresponding man-machine interface interactive program of establishment on Industrial PC Computer just can be realized motion control function by the host computer interface simultaneously.Present embodiment has strengthened the real-time of system, has reduced the components and parts number simultaneously, makes components and parts use decreased number 90%; Dwindle volume, made the integrated circuit board volume-diminished three times, improved the stability of system, made this present embodiment can be applied to various embedded occasions.
Claims (7)
1, a kind of embedded movement control card based on ARM, comprise: main control module, FPGA module, memory module, it is characterized in that, also comprise: house dog and resetting system module, expansion connection module, system clock module, GPIO module, jtag interface module, dual-port communication module, DA module, AD module, power module, input/output signal interface module, wherein:
The main control module is the ARM microcontroller, be responsible for the control that conducts interviews of memory module, GPIO module, and the look-at-me that dual-port communication module, JTAG module, input/output signal interface module, expansion connection module are transferred to the main control module is responded; The main control module enters the FPGA module with data transmission, also control information is imported into the FPGA module simultaneously;
The FPGA module sends in dual-port communication module, DA module, AD module, GPIO module, the jtag interface module according to the control information of the main control module data with input according to the logical operation function of its inside; FPGA module peripheral interface is many simultaneously, has expanded hardware and can distribute the address, and FPGA module and main control module have constituted the core of total system jointly;
Whether house dog and reseting module are responsible for monitoring the main control module locked, and power module is of short duration stops to the main control module for power supply in control when the main control module breaks down, and realizes restarting of main control module:
The jtag interface module reads the data message of main control module in real time by the FPGA module, realizes the on-line debugging and the single step run of software systems when exploitation;
Expansion connection module obtains external information, and external information is transferred to the main control module;
System clock module is responsible for providing crystal oscillator to the main control module;
The GPIO module is responsible for exporting the data latching of FPGA module to the input/output signal interface module, is responsible for simultaneously external switch amount and servosignal are latched input FGPA module;
Become analog signals after the digital quantity signal conversion of DA module with the transmission of FPGA module, and be transferred to input/output interface module;
The AD module is a digital quantity signal with the external analog amount conversion of signals of input/output interface module input, and transmission enters the FPGA module;
Export to outside servo-driver after the input/output signal interface module is amplified the signal of DA module, GPIO module output and state shows, and external switch amount signal and servo feedback signal and external analog amount signal are anticipated the back be transferred to the FPGA module by the AD module;
Described GPIO module, comprise 4 input data latch and 4 output data latch, be responsible for handling main switching value signal in the motion control, bus data is 16, and per eight switching value signals are exported by an output data latch, one is switching signal amount of representative, output data latch adopts 7,4HC,377 six rising edge D flip-flops, output data latch is 8, two output data latch are one group, 16 bit data in the corresponding bus are carried out gating output by the chip selection signal in the address wire; Input data latch adopts 7,4HC,244 eight road ternary bufferings to drive, corresponding every group of data are imported with one group of two input data latch, carry out gating output by the chip selection signal in the address wire, expand two-way input bus signal and two-way output bus signal, amount to 32 inputs and 32 output signals.
2, the embedded movement control card based on ARM according to claim 1, it is characterized in that, described memory module comprises FLASH storer, SDRAM storer, NVRAM storer, wherein: the FLASH storer is used for the storage system program, the NVRAM storer is used for the storage system configuration file, and the SDRAM storer is used for the operation of program.
3, the embedded movement control card based on ARM according to claim 1, it is characterized in that described expansion connection module obtains external information, and external information is transferred to the main control module, comprise: serial port module, usb interface module, Network Interface Module, wherein:
Serial port module is responsible for serial communication, is transferred to the FPGA module after outside rs 232 serial interface signal is handled;
Usb interface module is responsible for and extraneous USB communication, according to usb protocol external information is transferred to the FPGA module;
Being connected of Network Interface Module realization and external ethernet, external information is transferred to the FPGA module according to procotol.
4, the embedded movement control card based on ARM according to claim 1 is characterized in that, described main control module is the AT91RM9200 chip of atmel corp.
5, the embedded movement control card based on ARM according to claim 1 is characterized in that, described FPGA module is the EP1K30 chip of altera corp.
6, the embedded movement control card based on ARM according to claim 1 is characterized in that, described system clock module is a 32.768k quartz crystal oscillator device, is connected with the external clock interface of ARM microprocessor.
7, the embedded movement control card based on ARM according to claim 1, it is characterized in that described dual-port communication module is a communication chip, be responsible for the communication of main control module and host computer, communication chip has two marking devices to be respectively left side marking device and right side marking device.
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