CN104765321B - A kind of motion controller of compatible multiple fieldbus agreement - Google Patents
A kind of motion controller of compatible multiple fieldbus agreement Download PDFInfo
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- CN104765321B CN104765321B CN201510030821.4A CN201510030821A CN104765321B CN 104765321 B CN104765321 B CN 104765321B CN 201510030821 A CN201510030821 A CN 201510030821A CN 104765321 B CN104765321 B CN 104765321B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/18—Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form
- G05B19/414—Structure of the control system, e.g. common controller or multiprocessor systems, interface to servo, programmable interface controller
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Abstract
A kind of motion controller of compatible multiple fieldbus agreement provided by the invention,Including ARM cores and interface,Fpga core and interface and power supply interface module,ARM cores and interface,Fpga core and interface are connected with power supply interface module,ARM cores and interface include kernel scheduling modules A RM,Fpga core and interface include kernel scheduling module FPGA,Using kernel scheduling modules A RM and kernel scheduling module FPGA Embedded Double core architectures,Unified hardware and software platform suitable for various field bus protocols,Most field bus protocol can be compatible with,With good compatibility and wide applicability,The equipment that a variety of different agreements can be connected simultaneously,Improve the flexibility of kinetic control system,Real-time link layer data is handled using FPGA,Improve the stability and fast-response of link.
Description
Technical field
The invention belongs to field bus communication fields, and in particular to a kind of motion control of compatible multiple fieldbus agreement
Device.
Background technology
With the progress of electronics and the communication technology, industrial automatic control is from traditional point-to-point analog quantity or pulse
The control mode of signal is developing progressively the full-digital control for fieldbus.It sets the control of industry spot, monitoring etc.
It is standby to be integrated in by way of serial signal in a communication network, field bus control system can be built, and can lead to
It crosses procotol and establishes industrial informationization control management level.Motion controller is the core of Fieldbus Control, upwards can be with
Compatible Ethernet realizes the network management of industry, can be compatible with fieldbus networks downwards, therefore, motion controller is compatible with
Field bus protocol directly determine the flexibility and applicability of a whole set of control system.
The field bus protocol type that existing motion control field includes is various, and is based on various protocol development equipment
Also emerge one after another, but up to the present made there are no a kind of unified software and hardware control platform that can be compatible with various agreements
The single, wasting of resources at the interface of various kinds of equipment, it is difficult to realize the extensive compatibility of motion controller and applicable sex chromosome mosaicism.
Invention content
Problem to be solved by this invention is to provide a kind of motion controller of compatible multiple fieldbus agreement, is analyzing
On the similitude of various field bus protocol types and the basis of intercommunity, the embedded dual core based on ARM+FPGA has been invented
The motion controller of architecture, and using the specification of various field bus protocol interfaces, devise various fieldbus and be based on
The solution of double-core system realizes the motion controller that can be compatible with multiple fieldbus agreement simultaneously, solves at present
Bus type motion controller supported protocol type is relatively simple, it is difficult to realize the extensive compatibility and applicability of motion controller
The problem of.
Scheme of the present invention in order to solve the above problem：
A kind of motion controller of compatible multiple fieldbus agreement, including ARM cores and interface, fpga core and interface
And power supply interface module, the ARM cores and interface, fpga core and interface are connected with power supply interface module, the ARM
Core and interface include that kernel scheduling modules A RM, SD card interface, VGA display interfaces, the Ethernet Ethernets of motion control connect
Mouth, the first USB interface, secondary USB interface, ARM debugging serial ports and CAN interface, function module directly by ARM cores and
Interface operation (SuSE) Linux OS is controlled and is managed, and the kernel scheduling modules A RM and the SD card interface are direct
Connection, the kernel scheduling modules A RM are connected by one piece of PHY chip with Ethernet Ethernet interfaces, the core
Scheduler module ARM is directly connected with first USB interface, and the kernel scheduling modules A RM directly connects with the 2nd USB
Mouth is connected, and the kernel scheduling modules A RM debugs serial ports with the ARM by one piece of RS232 driving chip and is connected, described
Kernel scheduling modules A RM is connected by one piece of CAN driving chip with the CAN interface, the kernel scheduling modules A RM
It is connected with VGA display interfaces by one piece of VGA driving chip, the fpga core and interface include kernel scheduling module
FPGA, JTAG mode interface, the first Industrial Ethernet interface, the second Industrial Ethernet interface, optical fiber interface, RS485 interfaces,
The fieldbus expansion of RS232 interface, the fpga core and interface as motion control core scheduler module ARM,
Parallel processing is carried out by the IP kernel of fpga core and interface internal, the processing of data link layer is carried out to corresponding interface, and
It is controlled by GPMC buses and interrupt signal and carries out data interaction, the core tune with motion control core scheduler module ARM
Degree module FPGA is connected with the first Industrial Ethernet mouth by PHY chip+isolating transformer, the kernel scheduling mould
Block FPGA is connected with the second Industrial Ethernet mouth by PHY chip+isolating transformer, the kernel scheduling module
FPGA is connected with the optical fiber interface by PHY chip+photoelectric converter, the kernel scheduling module FPGA with it is described
RS485 interfaces are connected by RS485 driving chips, and the kernel scheduling module FPGA passes through with the RS232 interface
RS232 driving chips are connected, and the kernel scheduling module FPGA is connected directly with the JTAG mode interfaces, the core
Heart scheduler module FPGA is connected by controls such as GPMC bus protocols and interrupt signals with kernel scheduling modules A RM.
A kind of motion controller of above-mentioned compatible multiple fieldbus agreement, wherein the kernel scheduling module
For FPGA as fieldbus extensible modules, function is to handle the signal identified from fieldbus networks, carries out data
The processing of link layer includes being selected with the data-interface part of ARM, data link layer and physical layer link, the physical layer
Link selection includes network interface automated topology identification forwarding module and serial ports Link selection module, be used for processing network interface data respectively and
Serial data, the data link layer include that the processing of network interface data link layer data and serial data link layer data are handled,
For handling the data link layer of network interface and the data link layer of serial ports respectively, the data-interface part with ARM includes
It is logical to be used for network interface communication frame and serial ports that caching respectively sends and receives for network interface data frame buffer zone and serial data frame buffer zone
Believe frame, and data interaction is carried out with kernel scheduling modules A RM.
The advantageous effect of this programme：
1. running (SuSE) Linux OS on ARM cores and interface, application program is controlled according to caused by human-computer interaction
Demand and the real-time status of actuator feedback calculate the fieldbus to the director data of actuator, being compatible with by actuator
Protocol interface is transferred to each motion actuators by communication cable, simultaneously also by communication cable by the data and state of feedback
To application program, fortune control is realized, support program runs VGA Display interface and debugging mouth, while also supporting USB device, serial ports
The peripheral expansion of equipment etc..
2. fpga core and interface internal support the physical layer interface of existing most of bus, including serial communication and
Network interface communication physical layer carries out communication level conversion by the driving chip of different communication protocol physical layer and realizes different buses
Interface, such as RS485 interfaces and RS232 interface can also answer the same bus interface by changing field bus communication
The agreement of variety classes field bus communication is realized with layer, for example, Industrial Ethernet interface can construct identical network interface chain
It is numerous based on real-time industrial ether that EtherCAT, Powerlink etc. may be implemented by different application layer protocol drivings in road floor
Therefore the agreement of net physical layer can fully realize the flexibility of motion controller and extensive by the method for software reconfiguration
Applicability, in addition, since the fieldbus IP kernel expansion module based on FPGA can make full use of the advantage of FPGA parallel work-flows,
Multiple field bus protocol networks can be controlled simultaneously in a controlling cycle, can really realize while be compatible with multiple scenes
Bus network agreement.
3. kernel scheduling module FPGA passes through the controls such as GPMC bus protocols and interrupt signal and kernel scheduling module
ARM is connected, and realizes data interaction and the control function of fieldbus extension IP kernel and ARM, user can be according to different control
It needs, selects the line of field-bus interface progress control system in different motion controllers, then pass through application program tune
Corresponding bus is operated with the driving interface of different agreement, to realize the different fieldbus built as needed
Network.
4. using kernel scheduling modules A RM and kernel scheduling module FPGA Embedded Double core architectures, it is suitable for various
The unified hardware and software platform of field bus protocol, can be compatible with most field bus protocol, have well compatibility and
Wide applicability, the equipment that can connect a variety of different agreements simultaneously, improves the flexibility of kinetic control system, using FPGA
Real-time link layer data is handled, the stability and fast-response of link are improved.
Description of the drawings
Fig. 1 is the general structure schematic diagram of the motion controller of the present invention.
Fig. 2 is the connection diagram between each function module of the present invention.
Fig. 3 is that the concrete signal of FPGA module of the present invention and peripheral hardware flows to schematic diagram.
Fig. 4 is the structural schematic diagram inside FPGA module of the present invention.
Fig. 5 is that the concrete signal of ARM modules of the present invention and peripheral hardware flows to schematic diagram.
Fig. 6 is the structural schematic diagram of ARM inside modules of the present invention.
Specific implementation mode
As shown, a kind of motion controller of compatible multiple fieldbus agreement, including ARM cores and interface 1, FPGA
Core and interface 2 and power supply interface module 3, the ARM cores and interface 1, fpga core and interface 2 and power supply interface module
3 are connected, and the ARM cores and interface 1 include that kernel scheduling modules A RM11, SD card interface 16, the VGA of motion control are shown
Interface 17, Ethernet Ethernet interfaces 12, the first usb 1 31, secondary USB interface 132, ARM debugging serial ports 14 and CAN
Bus interface 15, function module directly runs (SuSE) Linux OS by ARM cores and interface 1 and is controlled and managed, described
Kernel scheduling modules A RM11 be directly connected to the SD card interface 16, the kernel scheduling modules A RM11 passes through one piece
PHY chip 121 is connected with Ethernet Ethernet interfaces 12, and the kernel scheduling modules A RM11 is directly with described first
Usb 1 31 is connected, and the kernel scheduling modules A RM11 is directly connected with the secondary USB interface 132, the core
Heart scheduler module ARM11 debugs serial ports 14 with the ARM by one piece of RS232 driving chip 141 and is connected, the kernel scheduling
Modules A RM11 is connected by one piece of CAN driving chip 151 with the CAN interface 15, the kernel scheduling module
ARM11 is connected by one piece of VGA driving chip 171 with VGA display interfaces 17, and the fpga core and interface 2 include core
Scheduler module FPGA21, JTAG mode interface 26, the first Industrial Ethernet interface 221, the second Industrial Ethernet interface 222, light
Fine interface 23, RS485 interfaces 24, RS232 interface 25, the fpga core and interface 2 dispatch mould as motion control core
The fieldbus expansion of block ARM11 carries out parallel processing, to corresponding by the IP kernel inside fpga core and interface 2
Interface carries out the processing of data link layer, and is controlled with motion control core scheduler module by GPMC buses and interrupt signal
ARM11 carries out data interaction, and the kernel scheduling module FPGA21 passes through PHY with the first Industrial Ethernet mouth 221
Chip+isolating transformer 211 is connected, and the kernel scheduling module FPGA21 is logical with the second Industrial Ethernet mouth 222
It crosses PHY chip+isolating transformer 211 to be connected, the kernel scheduling module FPGA21 passes through PHY with the optical fiber interface 23
Chip+photoelectric converter 231 is connected, and the kernel scheduling module FPGA21 is driven with the RS485 interfaces 24 by RS485
Dynamic chip 241 is connected, and the kernel scheduling module FPGA21 passes through RS232 driving chips 251 with the RS232 interface 25
It is connected, the kernel scheduling module FPGA21 is connected directly with the JTAG modes interface 26, the kernel scheduling mould
Block FPGA21 is connected by controls such as GPMC bus protocols and interrupt signals with kernel scheduling modules A RM11.
A kind of motion controller of above-mentioned compatible multiple fieldbus agreement, wherein the kernel scheduling module
FPGA21 is as fieldbus extensible modules, and function is to handle the signal identified from fieldbus networks, into line number
According to the processing of link layer, include and the data-interface part 211 of ARM, data link layer 212 and physical layer link selection 213, institute
The selection of physical layer link 213 stated includes that network interface automated topology identifies forwarding module 2131 and serial ports Link selection module 2132,
For handling network interface data and serial data respectively, the data link layer 212 includes the processing of network interface data link layer data
2121 and serial data link layer data processing 2122, be used for respectively processing network interface data link layer and serial ports data link
Layer, the data-interface part 211 with ARM include network interface data frame buffer zone 2111 and serial data frame buffer zone
2112, it is used for network interface communication frame and serial communication frame that caching respectively sends and receives, and with kernel scheduling modules A RM into line number
According to interaction.
ARM cores and interface 1 run (SuSE) Linux OS and are controlled and managed, and Ethernet Ethernet interfaces 12 can be with
Full duplex receives and sends ethernet data frame simultaneously, and kernel scheduling modules A RM11 is entered after the processing of PHY chip 121
System bottom TCP/IP drivers, enable compatible Ethernet, the first usb 1 31, secondary USB interface 132 and core
Heart scheduler module ARM11 directly carries out the interaction of data by differential signal, and ARM debugs serial ports 14 and passes through RS232 driving chips
141 232 signals for being converted into ARM compatibility Transistor-Transistor Logic levels are debugged for ARM or as field bus communication mouth, CAN bus
Interface 15 is interacted by CAN driving chips 151 and kernel scheduling modules A RM11, and the CAN that can integrate motion controller is total
Line interface.
Kernel scheduling module FPGA21 can receive the first industrial ether in interfaces such as peripheral expansion net mouth, serial ports and optical ports
Data in network interface 221, the second Industrial Ethernet interface 222, at the same can also into network transmission data, realize full duplex
Network communication, the electric signal in network is converted to differential signal by isolating transformer 2212 and is connected with PHY chip 2211, use
In shielding the interference in network, the stability of communication is improved, PHY chip 2211 passes through RMII MII modes and kernel scheduling
Module FPGA21 carries out data exchange；In a full-duplex mode, photoelectric converter 2312 is to optical fiber for the equally work of optical fiber interface 23
Optical signal in communication network is handled, and is converted to differential electric signal for the processing of PHY chip 2311, is passed through RMII or MII
Mode carries out data exchange with kernel scheduling module FPGA21；RS485 interfaces 24, the signal of communication in RS485 networks pass through
The be compatible with TTL232 signals of 241 Switching Core scheduler module FPGA21 of RS485 driving chips carry out the exchange of data；RS232 connects
Signal of communication in mouth 25, RS232 networks passes through 251 the be compatible with TTL of Switching Core scheduler module FPGA21 of RS232 driving chips
232 signals carry out the exchange of data.
Structure inside kernel scheduling modules A RM11 includes ARM motion control programs 111,112 and of application programming interfaces layer
Device drive layer 113, the core of the system in order to control of ARM motion control programs 111, by effective control of application programming interfaces layer 112
Data and feedback data processed carry out corresponding calculating iterative processing according to demand for control, to realize whole scene bus motion control
The function of system is realized, in addition, the control instruction of application program can be inputted by man-machine interactive interface；Application program connects
Mouth layer 112 realizes a total integrated interface library of various kinds of equipment driving, is supported which includes motion controller
The driving interface of all field-bus interface operations, provides operation entry for application program upwards, can directly build answer downwards
The bridge communicated with hardware device with program, including three classes, one kind is the driving that Linux is supported, has Ethernet application layers to connect
1121 and CAN of mouth Applied layer interfaces 1122, another kind of is the device drives extended based on IP kernel network interface, including EtherCAT applications
The Applied layer interface 1125 of routine interface 1123, Powerlink Applied layer interfaces 1124 and remaining Industrial Ethernet, user can be with
Expand the Applied layer interface of different types of field bus protocol network interface according to their needs, last one kind is to be based on IP and string
The device drives of mouth extension, including Modbus Applied layer interfaces 1126 and all kinds of serial communication protocol Applied layer interfaces 1127, are used
Family can expand the Applied layer interface of different types of field bus protocol serial ports according to their needs；Device drive layer 113
Driving 1131, IP kernel FPGA network interfaces external drive 1132 and the IP kernel serial ports expansion driving 1133 supported including Linux, it is main
Function is operation driver, directly drives the hardware device of plate grade, carries out the driving task of hardware device.
(SuSE) Linux OS is run in ARM cores and interface, application program is according to demand for control caused by human-computer interaction
The field bus protocol to the director data of actuator, being compatible with by actuator is calculated with the real-time status feedback of actuator
Interface is transferred to each motion actuators by communication cable, is answered the data of feedback and state simultaneously also by communication cable
With program, fortune control is realized, support program runs VGA Display interface and debugging mouth, while also supporting USB device, serial equipment
Deng peripheral expansion.
Fpga core and interface internal support the physical layer interface of existing most of bus, including serial communication and network interface
Communication physical layer carries out communication level conversion by the driving chip of different communication protocol physical layer and realizes that different buses connects
Mouthful, such as RS485 interfaces and RS232 interface can also be by changing field bus communication application for the same bus interface
Layer realizes the agreement of variety classes field bus communication, for example, Industrial Ethernet interface can construct identical network interface link
It is numerous based on real-time industrial ethernet that EtherCAT, Powerlink etc. may be implemented by different application layer protocol drivings in layer
Therefore the agreement of physical layer can fully realize the flexible of motion controller by the method for software reconfiguration and widely fit
With property, in addition, since the fieldbus IP kernel expansion module based on FPGA can make full use of the advantage of FPGA parallel work-flows, it can
To control multiple field bus protocol networks simultaneously in a controlling cycle, it can really realize while compatible multiple scenes are total
Line procotol.
Kernel scheduling module FPGA passes through GPMC bus protocols and interrupt signal control and kernel scheduling modules A RM phases
Even, realize fieldbus extension IP kernel and ARM data interaction and control function, user can according to different control needs,
The line for selecting field-bus interface progress control system in different motion controllers, then passes through application call difference
The driving interface of agreement operates corresponding bus, to realize the different fieldbus networks built as needed.
Using kernel scheduling modules A RM and kernel scheduling module FPGA Embedded Double core architectures, it is suitable for various existing
The unified hardware and software platform of field bus agreement, can be compatible with most field bus protocol, have compatible and wide well
General applicability, the equipment that can connect a variety of different agreements simultaneously, improves the flexibility of kinetic control system, at FPGA
Real-time link layer data is managed, the stability and fast-response of link are improved.
It is merely preferred embodiments of the present invention, but scope of protection of the present invention is not limited thereto, it is any to be familiar with
In the technical scope disclosed by the present invention, the change or replacement that can be readily occurred in should all be covered those skilled in the art
Within the scope of the present invention.Therefore, the scope of protection of the invention shall be subject to the scope of protection specified in the patent claim.
Claims (2)
1. a kind of motion controller of compatible multiple fieldbus agreement, including ARM cores and interface, fpga core and interface and
Power supply interface module, it is characterized in that, the ARM cores and interface, fpga core and interface are connected with power supply interface module, institute
The ARM cores and interface stated include kernel scheduling modules A RM, SD card interface, VGA display interfaces, the Ethernet of motion control
Ethernet interface, the first USB interface, secondary USB interface, ARM debugging serial ports and CAN interface, function module directly by
ARM cores and interface operation (SuSE) Linux OS are controlled and are managed, the kernel scheduling modules A RM and SD
Card interface is directly connected to, and the kernel scheduling modules A RM is connected by one piece of PHY chip with Ethernet Ethernet interfaces,
The kernel scheduling modules A RM is directly connected with first USB interface, and the kernel scheduling modules A RM is directly and institute
It states secondary USB interface to be connected, the kernel scheduling modules A RM debugs serial ports by one piece of RS232 driving chip and the ARM
It is connected, the kernel scheduling modules A RM is connected by one piece of CAN driving chip with the CAN interface, the core
Scheduler module ARM is connected by one piece of VGA driving chip with VGA display interfaces, and the fpga core and interface include core
Scheduler module FPGA, JTAG mode interface, the first Industrial Ethernet interface, the second Industrial Ethernet interface, optical fiber interface,
RS485 interfaces, RS232 interface, the fieldbus of the fpga core and interface as motion control core scheduler module ARM
Expansion, parallel processing is carried out by the IP kernel of fpga core and interface internal, and data link layer is carried out to corresponding interface
Processing, and controlled by GPMC buses and interrupt signal and carry out data interaction with motion control core scheduler module ARM, it is described
Kernel scheduling module FPGA be connected by PHY chip+isolating transformer with the first Industrial Ethernet mouth, the core
Heart scheduler module FPGA is connected with the second Industrial Ethernet mouth by PHY chip+isolating transformer, the core tune
Degree module FPGA be connected by PHY chip+photoelectric converter with the optical fiber interface, the kernel scheduling module FPGA and
The RS485 interfaces are connected by RS485 driving chips, the kernel scheduling module FPGA and the RS232 interface
It is connected by RS232 driving chips, the kernel scheduling module FPGA is connected directly with the JTAG mode interfaces, described
Kernel scheduling module FPGA controlled by GPMC bus protocols and interrupt signal and be connected with kernel scheduling modules A RM.
2. a kind of motion controller of compatible multiple fieldbus agreement as described in claim 1, it is characterized in that, the core
For heart scheduler module FPGA as fieldbus extensible modules, function is to handle the letter identified from fieldbus networks
Number, the processing of data link layer is carried out, includes being selected with the data-interface part of ARM, data link layer and physical layer link, institute
The physical layer link selection stated includes network interface automated topology identification forwarding module and serial ports Link selection module, for handling respectively
Network interface data and serial data, the data link layer include the processing of network interface data link layer data and serial data link layer
Data processing is used for the data link layer of the data link layer and serial ports of processing network interface respectively, the data-interface with ARM
Part includes network interface data frame buffer zone and serial data frame buffer zone, is used for the network interface communication frame that caching sends and receives respectively
With serial communication frame, and data interaction is carried out with kernel scheduling modules A RM.
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