CN100530635C - 将存储器元件贴附到相关器件的方法和堆叠结构 - Google Patents

将存储器元件贴附到相关器件的方法和堆叠结构 Download PDF

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CN100530635C
CN100530635C CNB2006101603923A CN200610160392A CN100530635C CN 100530635 C CN100530635 C CN 100530635C CN B2006101603923 A CNB2006101603923 A CN B2006101603923A CN 200610160392 A CN200610160392 A CN 200610160392A CN 100530635 C CN100530635 C CN 100530635C
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杰拉尔德·K·巴特利
保罗·E·达伦
马克·O·马克森
菲利普·R·杰曼
安德鲁·B·马基
达里尔·J·贝克
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International Business Machines Corp
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Abstract

本发明提供了一种用于将存储器元件贴附到球栅阵列(BGA)器件的堆叠方法和结构。专用载体包含多个存储器器件，例如存储器管芯，或芯片级封装(CSP)存储器。该专用载体被贴附到配对支持载体以形成堆叠结构。该配对支持载体包含用于该专用载体的多个器件的相关球栅阵列(BGA)器件。

Description

将存储器元件贴附到相关器件的方法和堆叠结构
技术领域
本发明总地涉及电子封装领域，更具体而言，涉及用于将存储器元件贴附到相关器件例如球栅阵列封装(BGA)类型器件的堆叠方法。
背景技术
在说明书和权利要求中，术语球栅阵列(BGA)器件和BGA连接不限于BGA焊接(solder connection)，而应理解成包含多个各种其他芯片承载技术，包含例如焊盘栅格阵列(Land Grid Array，LGA)、引脚栅格阵列以及铜-铜热压合连接和器件。
对于许多处理器类型产品的限制为对存储器密度以及存储器带宽的限制。在其它的技术中，对于该挑战的传统解决方法涉及例如使用多层存储器体系(包含管芯上存储器缓存)、大的离线(off)模块总线结构(其驱动成本、噪声、卡片水平的复杂度、以及更大的芯片)、或者传统的多芯片封装等。
涉及多芯片封装的方法通常存在产率限制和测试考虑、已知为良好的管心的成本加和等。常规方法具有成本、卡至模块复杂度、性能限制等问题。
需要一种用于存储器及类似元件与相关器件的改善封装布置。
发明内容
本发明的一个主要方面是提供用于将存储器元件贴附到球栅阵列(BGA)器件的堆叠方法。本发明的其他重要方面是提供用于将存储器元件贴附到球栅阵列(BGA)器件的这种堆叠结构，其基本上没有负面效应且克服了现有技术布置的许多缺点。
简而言之，提供了用于将存储器元件贴附到球栅阵列(BGA)器件的堆叠方法和结构。专用载体包含多个存储器器件，例如存储器管芯，或者芯片级封装(CSP)存储器。该专用载体贴附到配对支持载体以形成堆叠结构。该配对支持载体包含相关的球栅阵列(BGA)器件，以用于该专用载体的多个器件。
根据本发明的特征，该专用载体包含通常置于中心的开口，其通常对准并围绕该堆叠结构内的配对支持载体的相关球栅阵列(BGA)器件。该多个存储器器件置成围绕该专用载体上的置于中心的开口。
根据本发明的特征，该多个存储器器件置于专用载体的上表面和下表面的一个或两个上。该多个存储器器件由专用载体支持以及电学连接。
附图说明
通过对在附图中示出的本发明优选实施方案的下述详细描述，可以最佳地理解本发明以及上述和其他目标及优点。
图1为分解透视图，其未按比例地示出了根据优选实施方案的用于将存储器或类似元件贴附到球栅阵列(BGA)类型器件的堆叠结构；以及
图2为剖面侧视图，其未按比例地示出了根据优选实施方案将存储器或类似元件贴附到球栅阵列(BGA)类型器件的图1的堆叠结构。
具体实施方式
根据优选实施方案的特征，提供了一种专用载体以用于标准芯片载体技术，从而实现并入多个器件，诸如存储器管芯，或芯片级封装(CSP)存储器。CSP存储器封装使用电学连接通过位于该封装的配对或下侧的球栅阵列(BGA)连接到印刷电路板(PCB)，而不是通过引脚将芯片连接到该印刷电路板(PCB)。将该专用载体贴附到标准芯片载体可以是焊料，例如使用BGA技术，或铜-铜热压合，或者潜在的焊盘栅格阵列(LGA)技术。
现在参考图示，在图1和2中，示出了根据优选实施方案的堆叠结构，其总地用参考数字100表示，用于将存储器或类似元件贴附到球栅阵列(BGA)类型的器件。堆叠结构100包含总地用参考数字102表示的专用载体，用于与总地用参考数字104表示的配对芯片载体堆叠接合。
如图所示，专用载体102包含多个器件110和112，例如存储器管芯，或者芯片级封装(CSP)存储器，分别被支持在该载体的相对表面上。专用载体102包含通常位于中心的开口或切口114。多个器件110、112被分别安装在该专用载体102的顶面116和底面118上并靠近该切口114。
应该理解，本发明不限于所示的器件110、112的配置，而是可以提供各种其他配置，例如，其中存储器器件110、112布置成非对称方式以围绕该专用载体102内稍偏离中心的开口。
配对芯片载体104包含通常位于中心的管芯120，例如存储器管芯。该专用载体102内的切口114提供来容纳该配对芯片载体104的位于中心的管芯120、底胶、散热装置、上覆成型(overmold)化合物等。
配对芯片载体104包含位于上表面126上的电学连接124的预定图案，该预定图案总地用参考数字122表示，例如布置成用于电学连接到专用载体102的球栅阵列(BGA)。配对芯片载体104包含位于下表面130上的多个电学连接128，也布置成例如球栅阵列(BGA)。
还参考图2，如图所示，单侧或双侧存储器器件110、112例如通过各自的球栅阵列(BGA)或其他类似电学连接例如管芯凸块或引线200、202，电连接到专用载体102。专用载体102和配对芯片载体104每个由例如基板或印刷电路板(PCB)形成。
专用载体102和配对芯片载体104可选地具有内部水平布线层和垂直连接，在图示中为了简单而被省略这些布线。该堆叠结构100实现了该存储器器件110、112和置于中心的相关管芯120之间的短的信号路径，其中该相关管芯120为例如处理器器件，由配对芯片载体104支持。置于中心的管芯120例如通过各自的球栅阵列(BGA)204而电学连接到配对芯片载体104。
堆叠结构100可选地进一步包含耦合到置于中心的管芯120的分隔体(spreader)或罩206。配对芯片载体104通过下表面130上的电学连接128而安装到印刷电路板等(未示出)。
应该理解，本发明不限于堆叠结构100的所示布置。根据本发明可以提供堆叠结构100的各种形状和其他布置。例如，置于中心的管芯120可以是一个以上的器件或芯片。
根据优选实施方案的优点，分离的载体102、104有利地被测试并适合于独立生产。分离的载体102、104有利地避免最终组件与/或堆叠结构100出现通常由存储器管芯修正或技术迁移所致的问题。
根据优选实施方案的优点，堆叠结构100消除了对离线模块的需求或者通过PCB存储器输入/输出(I/O)，以及其通常引发的电学问题。堆叠结构100降低了专用载体102和配对芯片载体104的所需的复杂度，将存储器信号保持在该堆叠结构100的组件内。
根据优选实施方案的优点，应该理解，堆叠结构100可以提供用于堆叠结构100的多个潜在存储器载体实施，例如分别具有不同的速度、容量，或者具有基本上相同或相似的专用载体102的硅技术。
尽管已经参考附图所示本发明实施方案的细节描述了本发明，但是这些细节并非旨在限制所附权利要求中所主张的本发明的范围。

Claims (10)

1.一种用于将存储器元件贴附到球栅阵列器件的堆叠结构，包含：
专用载体，包含多个存储器器件；
配对支持载体，被贴附到所述专用载体以形成所述堆叠结构；以及
所述配对支持载体包含相关的球栅阵列器件用于所述专用载体的多个器件，
其中所述专用载体包含通常置于中心的开口，所述开口通常对准并围绕所述堆叠结构内的配对支持载体的所述相关球栅阵列器件，所述多个存储器器件置成靠近所述专用载体内的置于中心的开口。
2.如权利要求1所述的堆叠结构，其中所述多个存储器器件包含存储器管芯。
3.如权利要求1所述的堆叠结构，其中所述多个存储器器件包含芯片级封装存储器。
4.如权利要求1所述的堆叠结构，其中所述多个存储器器件置于所述专用载体的上表面和下表面的至少一个上。
5.如权利要求1所述的堆叠结构，其中所述多个存储器器件由所述专用载体支持以及电学连接。
6.如权利要求1所述的堆叠结构，其中所述专用载体包含印刷电路板。
7.如权利要求1所述的堆叠结构，其中所述专用载体包含基板。
8.一种用于将存储器元件贴附到相关球栅阵列器件的方法，包含：
提供专用载体，所述专用载体包含多个存储器器件；
提供配对支持载体，所述配对支持载体包含相关的球栅阵列器件用于所述专用载体的多个器件；以及
将所述配对支持载体贴附到所述专用载体以形成堆叠结构，
其中提供所述专用载体包含，提供通常置于中心的开口，所述开口通常对准并围绕所述堆叠结构内的配对支持载体的所述相关球栅阵列器件，且提供所述多个存储器器件以靠近所述专用载体上置于中心的开口。
9.如权利要求8所述的用于贴附存储器元件的方法，其中所述多个存储器器件包含存储器管芯。
10.如权利要求8所述的用于贴附存储器元件的方法，其中所述多个存储器器件包含芯片级封装存储器。
CNB2006101603923A 2005-11-17 2006-11-15 将存储器元件贴附到相关器件的方法和堆叠结构 Expired - Fee Related CN100530635C (zh)

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KR20150019268A (ko) * 2013-08-13 2015-02-25 에스케이하이닉스 주식회사 데이터 입출력 장치 및 이를 포함하는 시스템
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