CN100525072C - High-precision high-linearity digital-analoge mixed signal loop pressure control oscillator - Google Patents
High-precision high-linearity digital-analoge mixed signal loop pressure control oscillator Download PDFInfo
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- CN100525072C CN100525072C CNB2005100112953A CN200510011295A CN100525072C CN 100525072 C CN100525072 C CN 100525072C CN B2005100112953 A CNB2005100112953 A CN B2005100112953A CN 200510011295 A CN200510011295 A CN 200510011295A CN 100525072 C CN100525072 C CN 100525072C
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Abstract
The disclosed oscillator consists of two parts: delay cells connected in ring, and control circuit for digital-analog composite signal (scheme 1); or delay cells connected in ring, and a digital control circuit (scheme 2). In scheme 1, delay cell is a common difference inverter; the control circuit for digital-analog composite signal is composed of a set of constant current sources with different currents and an active load MOS tube. In scheme 2, the digital control circuit is same as the part of digital control circuit in scheme 1; load tube of delay unit is composed of multiple pairs of load tube. Being controlled by digital signal control circuit, one pair of load tube is in use for presetting frequency or coarse adjusting frequency; being controlled by analog signal, another pair of load tube is in use for adjusting frequency accurately. The invention is applicable to modern communication, digital circuit, and other electronic information processing system.
Description
Technical field
The present invention relates to be used for the PHASE-LOCKED LOOP PLL TECHNIQUE field of command, control, communications, and information treatment system, particularly a kind of high-precision high-linearity digital-analoge mixed signal loop pressure control oscillator.
Background technology
Voltage controlled oscillator (VCO) is most important building block in phase-locked loop, in order to obtain high frequency, high-precision output frequency, generally all adopts the form of LC voltage controlled oscillator or circulation circuit voltage-controlled oscillator.The LC phase noise of voltage controlled oscillator is low, and the wireless communication field of having relatively high expectations at noise objective has obtained extensive use, and power consumption is big, reference frequency output is not wide, the integrated inductor area occupied big and the not high shortcoming of precision of manufacturing process but it also exists.Advantage has obtained extensive use equally in communication and digital circuit and circulation circuit voltage-controlled oscillator is because its low-power consumption, wide reference frequency output, chip occupying area be little etc.Along with CMOS integrated circuit technology level improves by the mole law, the phase noise performance of circulation circuit voltage-controlled oscillator gradually can be comparable with the phase noise of LC voltage controlled oscillator.
Common circulation circuit voltage-controlled oscillator is made of the N that connects into a ring-type delay cell, and delay cell can be single-ended, also can be difference.For single-ended delay cell, N can only be the odd number greater than 1; For the differential delay unit, N can be the odd number greater than 1, also can be even number.How many its number N decides on the frequency height of required generation.In fact the structure of common delay cell is exactly inverting amplifier, their load pipe is controlled by external voltage Vc, change control voltage Vc, just changed the conducting degree of load pipe, thereby changed the inverse delayed time of differential inverter, made the frequency of oscillation of whole loop change, Here it is circulation circuit voltage-controlled oscillator output signal frequency is with the principle of change in voltage, output signal frequency is called the gain of voltage controlled oscillator with the rate of change of voltage, represents with Kv.
The gain Kv that a shortcoming of above-mentioned common circulation circuit voltage-controlled oscillator is VCO is too high, extraneous small change in voltage will cause that big output signal frequency changes, in application as phase-locked loop, cause the noise resistivity of the charge pump of coming to power-supply fluctuation, substrate noise and from loop filter and phase discriminator poor, this requires the application in the extremely low radio communication at phase noise is very disadvantageous.
People proposed the VCO of many digit presets or digital coarse adjustment, but they all exist digital coarse adjustment or the not high shortcoming of digit preset precision in order to reduce Kv, to accelerate the lock speed of phase-locked loop simultaneously, and this will reduce the effect of accelerating lock speed greatly.
In order to overcome above shortcoming, we propose the VCO of a kind of high accuracy, high linearity.It is made of a plurality of delay cells that connect into ring-type and a digital-to-analogue mixed signal control circuit two large divisions, or is made of a plurality of delay cells that connect into ring-type and a digital signal control circuit two large divisions.
Summary of the invention
The technical problem to be solved in the present invention is: provide a kind of digital-to-analogue mixed signal loop pressure-control oscillator of high accuracy high linearity, so that accelerate the lock speed of phase-locked loop and strengthen antijamming capability by the gain that reduces VCO by digit preset or digital coarse adjustment.
A kind of technical solution provided by the invention is: a kind of circulation circuit voltage-controlled oscillator; constitute by a plurality of delay cells that connect into ring-type and digital-to-analogue mixed signal control circuit two large divisions; the digital-to-analogue mixed signal control circuit is by a fixing constant-current source; the constant-current source of a plurality of Digital Signals; the constant-current source of an analog signal control and a load transistor constitute; digital signal and analog signal are controlled corresponding constant-current source respectively; make the electric current of constant-current source flow through load transistor; acting in conjunction produces the conducting degree of an aanalogvoltage control lag unit loads pipe, thus the output signal frequency of control voltage controlled oscillator.
Described circulation circuit voltage-controlled oscillator, the constant-current source of Digital Signals have the current compensation network of high-order digit control end to the low order digit control end, and output signal frequency is increased with digit order number highly linear ground.In the digital control part, the frequency that digit order number is controlled is not to increase by common binary one, 2,4,8,16,32,64,128, the such frequency of 256MHz, but 1,1,2,5,10,20,40,80, the such frequency of 160MHz increases, do like this help making minimum transistor and the size of largest transistor ratio in a zone of reasonableness, help under the production technology error condition of complexity, still having the high accuracy of 1 ‰ (under the 1GHz centre frequencies).In the simulation control part, the constant-current source of analog signal control has the current compensation network of high-order digit control end, and the gain Kv of voltage controlled oscillator is remained unchanged substantially.
Second kind of technical solution is: a kind of circulation circuit voltage-controlled oscillator, constitute by a plurality of delay cells that connect into ring-type and a digital signal control circuit two large divisions, digital control circuit is by a fixing constant-current source, the constant-current source of a plurality of Digital Signals and a load transistor constitute, digital signal is controlled corresponding constant-current source respectively, make the electric current of constant-current source flow through load transistor, acting in conjunction produces an aanalogvoltage, the wherein a pair of load pipe of control lag unit, reach the digit preset of frequency or the purpose of digital coarse adjustment, delay cell load pipe is made up of the load pipe the many of parallel connection, the wherein a pair of load pipe of Digital Signals delay cell, as frequency preset or frequency coarse adjustment, analog signal control wherein another to the load pipe, as the accurate adjusting of frequency.Compare with first kind of scheme, the control ability of analog control signal is stronger, promptly can increase Kv, in the application of phase-locked loop, makes it to cover the frequency shift (FS) that large-scale variations in temperature is brought.
Described circulation circuit voltage-controlled oscillator, the constant-current source of Digital Signals have the current compensation network of high-order digit control end to the low order digit control end, and output signal frequency is increased with digit order number highly linear ground.In the digital control part, the frequency that digit order number is controlled is not to increase by common binary one, 2,4,8,16,32,64,128, the such frequency of 256MHz, but 1,1,2,5,10,20,40,80, the such frequency of 160MHz increases, do like this help making minimum transistor and the size of largest transistor ratio in a zone of reasonableness, help under the production technology error condition of complexity, still having the high accuracy of 1 ‰ (under the 1GHz centre frequencies).In simulation control part, because that the Kv of this scheme is influenced by numerical portion is very little, the constant-current source of analog signal control no longer needs the current compensation network of high-order digit control end.
The constant-current source of analog signal control has the current compensation network of high-order digit control end, and the gain Kv of voltage controlled oscillator is remained unchanged substantially.
Description of drawings
Below in conjunction with drawings and Examples the present invention is elaborated
The digital-to-analogue mixed signal voltage controlled oscillator block diagram that Fig. 1 proposes for the present invention;
The digital-to-analogue mixed signal voltage controlled oscillator structured flowchart (scheme one) that Fig. 2 proposes for the present invention;
Fig. 3 is that the digital-to-analogue of scheme one is mixed the control circuit schematic diagram
Fig. 4 is the digital constant-current source compensating network circuit theory diagrams of scheme one;
Fig. 5 is simulation constant-current source (Kv) the compensating network circuit theory diagrams of scheme one;
The digital-to-analogue mixed signal voltage controlled oscillator structured flowchart (scheme two) that Fig. 6 proposes for the present invention;
Fig. 7 is the digital control circuit schematic diagram of scheme two;
Fig. 8 is the delay unit circuit schematic diagram of scheme two;
Embodiment
Fig. 1 is the high-precision high-linearity digital-analoge mixed signal loop pressure control oscillator block diagram that the present invention proposes, and it has analog voltage input Ca; Digital input end C0 ', C0, C1, C2, Cn; Oscillator signal output Fout, Fout.Digital input end C0 ', C0, C1, C2 ... the supplied with digital signal of Cn is by inner control circuit, make voltage controlled oscillator output and the very approaching signal frequency of expection signal frequency, because the quantization error of digital signal, the signal frequency of this signal frequency and expection has certain error, this frequency error is transformed into error voltage by phase-locked loop, again by input end of analog signal Ca, the control voltage controlled oscillator makes its output frequency more near expected frequence, circulation finally accurately is locked on the signal frequency of expection so repeatedly.Like this, both accelerated lock speed by digit preset or digital coarse adjustment, again can analog regulation locking frequency accurately, this is the major advantage of digital-to-analogue mixed signal control voltage controlled oscillator of the present invention.Fout, Fout are two anti-phase signal frequency outputs.
Fig. 2 is the structured flowchart of first kind of scheme of the digital-to-analogue mixed signal voltage controlled oscillator that proposes of the present invention, and it is made of a plurality of delay cells that are connected into ring-type and digital-to-analogue mixed signal control circuit.The digital-to-analogue mixed signal control circuit have digital signal input end C0 ', C0, C1 ... Cn, input end of analog signal Ca and analog signal output Vc.The analog signal output Vc of digital-to-analogue mixed signal control circuit directly connects and controls each delay cell; The number of n is determined by the frequency range and the precision of the required adjusting of digital control end; Simulation control end Ca T-Ring path filter output in phase-locked loop.Digital input signals and analog input signal acting in conjunction produce aanalogvoltage Vc, and the conducting degree that Vc controls each delay cell changes time of delay, thereby change output signal frequency.
Fig. 3 is first kind of digital-to-analogue mixed signal control circuit schematic diagram in the scheme, and it is made of one group of constant-current source, load transistor and compensating network circuit.The grid of load transistor MN0 and drain electrode are connected together, and constitute an active load.Transistor MP1 and MP2 constitute a fixing constant-current source; MP3, MP4, MP5, MP6, MP7, MP8, MP9, MP10, MP11, MP12, MP13, MP14, MP15, MP16, MP17, MP18, MP19, MP20 constitute one group of constant-current source by external digital signal control, wherein the PMOS transistor of even-numbered is made switching tube, respectively by digital input end C0 ', C0, C1, C2, C3, C4, C5, C6, C7 control, the PMOS transistor of odd-numbered is made constant current tube, and the constant-current source size of current is determined by corresponding constant current tube size; Transistor MP21 and MP22 constitute a constant-current source by external analog input Ca control, the aanalogvoltage control that its size of current is connect by the Ca end, and in phase-locked loop, the output of Ca termination loop filter.Bias voltage can be obtained by any common biasing circuit, as long as can guarantee the transistor saturation conduction that they are controlled.
With the frequency range of 1GHz frequency range is that 320MHz, control precision are that the circulation circuit voltage-controlled oscillator of 1MHz is an example, and the principle of 9 position digital signal frequency preset voltage controlled oscillators is described.Allow the identical and proportional relation of width grid: the W of grid length of transistor MP9, MP11, MP13, MP15, MP17, MP19
19/ W
17=W
17/ W
15=W
15/ W
13=W
13/ W
11=W
11/ W
9=2.When we add logical signal ' 0 ' to digital signal input end C2, C3, C4, C5, C6, C7 respectively, we can distinguish turn-on transistor MP10, MP12, MP14, MP16, MP18, MP20, allow the electric current of corresponding constant-current source flow into load transistor MN0, make voltage controlled oscillator produce 5MHz, 10MHz, 20MHz respectively, the frequency change of 40MHz, 80MHz, 160MHz, we just can accomplish the variation precision of 5MHz like this.We design the proportional relation of width of grid length with the identical and grid of MP9 of transistor MP7: W
9/ W
7=2.5, when digital signal input end C1 logical signal changed, output Vc analog signal changed, and made the output signal frequency of voltage controlled oscillator produce the frequency change of 2MHz; The grid length of design transistor MP5 and the proportional relation of width of the identical and grid of MP7: W
7/ W
5=2, when digital signal input end C0 logical signal changed, output Vc analog signal changed, and made the output signal frequency of voltage controlled oscillator produce the frequency change of 1MHz; The grid length of design transistor MP3 and width are identical with MP5's: W
5/ W
3=1, when digital signal input end C0 ' logical signal changed, output Vc analog signal changed, and made the output signal frequency of voltage controlled oscillator produce the frequency change of 1MHz.The logical signal of control figure signal input part C0 ', C0 and C1 changes output Vc analog signal, just can make the output signal frequency generation 1,2,3 of voltage controlled oscillator, the variation of 4MHz.Like this, the logical signal combination of our control figure signal input part C0 ', C0, C1, C2, C3, C4, C5, C6, C7, change output Vc analog signal, just can make the output signal frequency of voltage controlled oscillator produce the variation of 1MHz to 319MHz, the minimum change of its frequency is 1MHz.
As mentioned above, we have illustrated the situation of frequency change when digital signal input end C0 ', C0, C1, C2, C3, C4, C5, C6, C7 add logical signal separately.But because the nonlinear characteristic of side circuit, the relation between digital signal input end C0 ', C0, C1, C2, C3, C4, C5, C6, C7 and output signal frequency change also is non-linear.For example, C7 and C2 add logical signal ' 0 ' simultaneously, and the growth of frequency can't equal 165MHz exactly, this be because: (1) constant-current source is not desirable constant-current source, and the voltage change that Vc is ordered can cause the change of constant-current source size of current.C7 adds logical signal ' 0 ', makes MP19, MP20 conducting, causes voltage Vc to change, and at this moment C2 adds logical signal ' 0 ', the constant-current source MP9 that C2 controlled, the size of current I of Mp10
2When not adding logical signal ' 0 ' with C7 is different; (2) even being similar to, we think that the constant-current source size of current does not change, because active load resistance MN0 does not have the linear relationship of desirable U=IR, identical electric current changes delta I can not produce identical change in voltage increment Delta Vc yet under the situation that voltage Vc varies in size; (3) even MN0 is desirable resistance, because non-linear, the identical voltage increment Δ Vc of VCO output signal frequency and input voltage Vc can not cause identical frequency increment Δ f yet.Because above all imperfection factors, cause the linearity between output signal frequency and the digital input signals relatively poor, therefore the current compensation network that needs constant-current source comes Mi to mend nonlinearity erron, finally makes to become linear relationship highly between output signal frequency and the supplied with digital signal.
Fig. 4 is the current compensation network of digital constant-current source.The principle of compensation is based on following circuit feature: (1) is quadratic relationship owing to flow through electric current I and the voltage Vc of active load MN0, and electric current I and voltage Vc are approximately linear relationship in a little electric current excursion; (2) pass of VCO output signal frequency and input voltage Vc ties up near the bigger Vc scope of centre frequency and can be approximated to be linear relationship.Consider above circuit feature, have only when the signal change of digital signal input end C0 ', C0, C1, C2, C3, C4, C5, C6, C7 causes the electric current I of MN0 to have greatly changed that we just compensate circuit.
In principle, digital signal input end C0 ', C0, C1, C2, C3, C4, C5, C6, when the constant-current source that C7 controlled is opened from the low level to a high position one by one, when opening, the constant-current source that each high-order digit signal is controlled all to carry out current compensation to the constant-current source of corresponding all low order digit signal controlling, for example, will be when the constant-current source of C7 control is opened to C6, C5, C4, C3, C2, C1, C0, the constant-current source that C0 ' controlled carries out current compensation, and the constant-current source of C6 control will be to C5 when opening, C4, C3, C2, C1, C0, the constant-current source that C0 ' controlled compensates, equally to C5, C4, C3, C2, the constant-current source of C1 control also will compensate the constant-current source of corresponding low order digit signal controlling when opening.Equally, when the constant-current source of being controlled when two high-order digit signals is opened simultaneously, also to the constant-current source that corresponding low order digit signal is controlled be compensated; Further, when the constant-current source of being controlled when three, four, five, six, seven high-order digit signals is opened simultaneously, still to the constant-current source that corresponding low order digit signal is controlled be compensated.Do like this,, hardly may yet circuit structure is very complicated though can reach high precision.
Therefore, we need between the complexity of current compensation network and precision, do one compromise.Because our predetermined frequency required precision is in the 1MHz scope, and near some Vc points among a small circle in electric current I and voltage Vc be approximately linear relationship, we are like this compensation: when the constant-current source of being controlled as high-order digit signal C5, C6, C7 is opened, will the constant-current source that corresponding low order digit signal is controlled be compensated; The constant-current source that C0 ', C0 controlled since little, the caused frequency change of electric current in 1MHz, so which kind of situation all need not compensate.
Among Fig. 4, when transistor MP31, MP32, MP33, MP34, MP35 have constituted the constant-current source that C5 controlled and open, to the current compensation of the constant-current source that C4, C3, C2, C1 controlled.We at first illustrate when C5 opens the compensation to C4: when C5 adds logical signal ' 0 ', and the MP31 conducting, this moment, the electric current of constant-current source branch road MP13, MP14 was I if C4 adds logical signal ' 0 '
4(see figure 3) compensates the also conducting of transistor MP32 of constant-current source simultaneously, and an electric current Δ I is then arranged
45Flow down Δ I from MP32, MP31
45Just constituted I when C5 opens
4Compensation rate, make I
4+ Δ I
45Produce the frequency increment of 20MHz, add logical signal ' 0 ' separately by I with having only C4
4The frequency increment 20MHz that produces is identical.In like manner we can illustrate when constant-current source that C5 controls is opened, to the compensation method of the constant-current source that C3, C2, C1 controlled.In the above transistor, MP31 makes switching tube, and breadth length ratio is bigger, and the ratio of the breadth length ratio of transistor MP32, the MP33 of compensation constant-current source, MP34, MP3 equals 8:4:2:1.
Among Fig. 4, transistor MP36, MP37 ... when MP41 had constituted the constant-current source that C6 controlled and opens, to the current compensation of the constant-current source that C5, C4, C3, C2, C1 controlled, the principle of compensation was the same.
Among Fig. 4, transistor MP47, MP38 ... when MP53 had constituted the constant-current source that C7 controlled and opens, to the current compensation of the constant-current source that C6, C5, C4, C3, C2, C1 controlled, the principle of compensation was the same.
Among Fig. 4, when transistor MN1, MP42, MP43, MP44, MP45, MP46 have constituted the constant-current source that C5 and C6 controlled and open simultaneously, to the compensation of the constant-current source that C4, C3, C2, C1 controlled.Respectively C4, C3, C2, C1 have been had current compensation although C5 and C6 open separately, when they are opened simultaneously, also needed a new current compensation amount, for predetermined frequency more accurately, this part also is necessary.From figure, see, if C6, C5 add logical signal ' 0 ', MN1 and MP42 conducting, this moment is if C4 also adds logical signal ' 0 ', then MP43 conducting has electric current to flow down from MP43, MP42 and MN1, and this electric current is C6, the C5 newly-increased compensation rate to C4 when opening simultaneously.In like manner, we can illustrate when constant-current source that C5 and C6 control is opened simultaneously, to the compensation of the constant-current source that C3, C2, C1 controlled.Wherein MN1 and MP42 make switch usefulness, and its breadth length ratio is bigger, and the ratio of the breadth length ratio of constant current tube MP43, MP44, MP45, MP46 equals 8:4:2:1.
Among Fig. 4, when transistor MP54, MP55, MP56, MP57, MP63, MN2 have constituted the constant-current source that C7 and C5 controlled and open simultaneously, to the compensation of the constant-current source that C4, C3, C2, C1 controlled; When transistor MP54, MP55, MP56, MP57, MP58, MP64, MN2 have constituted the constant-current source that C7 and C6 controlled and have opened simultaneously, to the compensation of the constant-current source that C5, C4, C3, C2, C1 controlled.Here, C7, C5 open simultaneously to open simultaneously with C7, C6 transistor MP54, MP55, MP56, MP57 have all been used in the compensation of C4, C3, C2, C1, this requires the transistor MP63 of digital signal input end C5, C6 control, the breadth length ratio of MP64 to get smaller value, make them not only have on-off action, and has a metering function, and the ratio of getting the breadth length ratio of MP63, MP64 is 1:2, just accomplished that both electric currents of compensation are inequality.Also have a current branch among the figure: electric current flows down from MP58, MP63, MN2, and the electric current of this a part of electric current and MP49, MP47 branch road merges as the compensation when C7 and C5 open.
Among Fig. 4, when transistor MN3, MN4, MP59, MP60, MP61, MP62, MP65 have constituted the constant-current source that C7, C6, C5 controlled and open simultaneously, to the compensation of the constant-current source that C4, C3, C2, C1 controlled.The principle of compensation is still identical with the front.
In sum, each the digital input signals point after open the C5 position all compensates.Also can after open C4 position, C3 position, C2 position, begin compensation, can reach the higher frequency accuracy and the linearity like this.
For the more high-precision signal frequency that digital signal can't be regulated, Ca finishes by the simulation control end.The output of simulation control end Ca T-Ring path filter in phase-locked loop, digital signal presets or the frequency error of coarse adjustment is transformed into output voltage on the loop filter through phase-locked loop, change in voltage on the loop filter causes the variation of this constant-current source branch current of MP21, MP22 by analog signal control end Ca, thereby cause the variation of total Vc, thereby simulation control VCO signal frequency changes.Along with the constant-current source conducting gradually of Digital Signals, the voltage that Vc is ordered changes, and the constant-current source of analog signal control changes with same big Δ I and no longer causes the same variation of Δ Vc greatly, also promptly can not cause the variation of same big frequency, and this will cause Kv to reduce.Therefore, Kv can compensate as shown in Figure 5: when C7 end adds logical signal ' 0 ', can increase the control that constant-current source branch road MP23, a MP24 are subjected to simulating control end Ca; When C6 end adds logical signal ' 0 ', can increase the control that constant-current source branch road MP25, a MP26 are subjected to simulating control end Ca; When C5 end adds logical signal ' 0 ', can increase the control that constant-current source branch road MP27, a MP28 are subjected to simulating control end Ca.In a word, when the constant-current source than big electric current of controls such as C7, C6, C5 is opened, have the control that more constant-current source is subjected to aanalogvoltage.Thereby increased Kv, its size is consistent in the frequency range of whole Digital Signals substantially, this is very useful to stability and the robustness that keeps phase-locked loop.
Fig. 6 is second kind of solution of the present invention, it is made up of a digital signal control circuit and a plurality of delay cell two parts that connect into ring-type, wherein the constant-current source and the current compensation complete network thereof of the Digital Signals among Digital Signals circuit and Fig. 3 are identical, as shown in Figure 7.An embodiment of the delay cell of formation scheme two as shown in Figure 8, its delay cell is on the basis of common whole range differential inverter, two couples of PMOS pipe in parallel on its load pipe: MP3, MP4 and MP5, MP6, wherein MP3, MP4 are used to accelerate the reversal rate of delay cell to improve output frequency; MP5, MP6 are used for aanalogvoltage control.Therefore this structure can no longer need the compensating network of Kv because the constant-current source of Digital Signals is very little, promptly very little to the influence of Kv to the constant-current source influence of aanalogvoltage control.
The operation principle of scheme two and scheme one complete class are together.Compare with scheme one, scheme two is separated the simulation control end with digital control end, change time-delay change output signal frequency thereby the simulation control end is placed on delay cell inside, and its advantage is, the gain Kv of VCO is bigger, can cover the frequency change that variations in temperature is in a big way brought.And that the advantage of scheme one is Kv is less, and needed loop filter capacitance is little, more helps integrated.
The voltage controlled oscillator (VCO) that the present invention sets forth has the following advantages:
1. have very high precision and the linearity, in the application of phase-locked loop, be convenient to accurately Digit preset or digital coarse adjustment are to accelerate lock speed.
2. with respect to common VCO, greatly reduce the gain of VCO, outside this is conducive to reduce The impact of bound pair VCO strengthens antijamming capability, reduces phase noise.
Also having brought another benefit 3.VCO gain descends, is exactly the electric capacity in the loop filter Value has descended pro rata. In integrated circuit, electric capacity will account for very big chip area, The reduction of capacitance may make external electric capacity be integrated in the integrated circuit and go, and perhaps make The shared chip area of integrated electric capacity is littler.
4.VCO gain substantially remain unchanged, guarantee in the application of phase-locked loop, loop Stability and robustness.
The loop VCO of the high accuracy that the present invention proposes, high-linearity digital-analoge mixed signal control Device be very suitable for that voltage presets or the phaselocked loop of voltage coarse adjustment in, it improves precision, the linearity Method can also be applied in the LC voltage controlled oscillator.
Claims (5)
1. circulation circuit voltage-controlled oscillator, constitute by a plurality of delay cells that connect into ring-type and digital-to-analogue mixed signal control circuit two large divisions, it is characterized in that, the digital-to-analogue mixed signal control circuit is by a fixing constant-current source, the constant-current source of a plurality of Digital Signals, the constant-current source of an analog signal control and a load transistor constitute, digital signal and analog signal are controlled corresponding constant-current source respectively, make the electric current of constant-current source flow through load transistor, acting in conjunction produces the conducting degree of an aanalogvoltage control lag unit loads pipe, thus the output signal frequency of control voltage controlled oscillator; Wherein
The analog signal output of digital-to-analogue control signal control circuit directly connects and controls each delay cell.
2. circulation circuit voltage-controlled oscillator, constitute by a plurality of delay cells that connect into ring-type and a digital signal control circuit two large divisions, the digital control end of the output of Digital Signals circuit and each delay cell load pipe links, it is characterized in that, the load pipe of delay cell is made of the load pipe the many of parallel connection, a pair of load pipe wherein is by the output signal control of digital control circuit, play the effect of frequency preset or frequency coarse adjustment, wherein another plays the accurate regulating action of frequency to the analog signal control of load pipe by the external world; Fixedly constant-current source and a load transistor of constant-current source, a plurality of Digital Signals constitute digital control circuit by one, digital signal is controlled corresponding constant-current source respectively, make the electric current of constant-current source flow through load transistor, acting in conjunction produces an aanalogvoltage, the wherein a pair of load pipe of control lag unit reaches the digit preset of frequency or the purpose of digital coarse adjustment.
3. circulation circuit voltage-controlled oscillator as claimed in claim 1 or 2 is characterized in that, the constant-current source of Digital Signals has the current compensation network of high-order digit control end to the low order digit control end, and output signal frequency is increased with digit order number highly linear ground.
4. circulation circuit voltage-controlled oscillator as claimed in claim 1 is characterized in that, the constant-current source of analog signal control has the current compensation network of high-order digit control end, and the gain Kv of voltage controlled oscillator is remained unchanged.
5. circulation circuit voltage-controlled oscillator as claimed in claim 1 or 2 is characterized in that, in the digital control part, and the frequency that digit order number is controlled, the frequency of be 1,1,2,5,10,20,40,80,160MHz is such increases.
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|---|---|
| CN1815878A (en) | 2006-08-09 |
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