CN100492675C - Optical detection field effect transistor containing quantum point and manufacturing method - Google Patents
Optical detection field effect transistor containing quantum point and manufacturing method Download PDFInfo
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- CN100492675C CN100492675C CNB2005100538299A CN200510053829A CN100492675C CN 100492675 C CN100492675 C CN 100492675C CN B2005100538299 A CNB2005100538299 A CN B2005100538299A CN 200510053829 A CN200510053829 A CN 200510053829A CN 100492675 C CN100492675 C CN 100492675C
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Abstract
This invention relates to an optical detection field effect transistor containing quantum points and its manufacturing method characterizing: 1, longitudinally integrating a compound semiconductor optical detector and a metal-semiconductor field effect transistor to grow on a same substrate material, 2, separating the active region mesa of InAs quantum points under the grating and the source/drain region to connect the modulated conduction channel under the quantum points with the source/drain to constitute a conducting loop to realize the effective integration of optical devices and electric appliances.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly is to belong to the compound semiconductor FET device.
Background technology
Semiconductor field effect transistor (FET) is the basic device cell of modern very lagre scale integrated circuit (VLSIC) (ULSI), occupies extremely important status in information technology and microelectronics field.The basic structure of field-effect transistor (FET) is one three electrode device, comprises source electrode, drain and gate, can regulate the size of raceway groove electric current between source electrode and drain electrode by the variation that is applied to voltage on the grid, thereby realizes the basic function of device.
FET device is divided into metal-oxide-semi-conductor type (MOSFET) and metal-semi-conductor type (MESFET) transistor usually.Present most of metal-oxide-semi-conductor type (MOSFET) is made by elemental semiconductor silicon (Si), and this is because silicon materials have cheap price and ripe good characteristics such as device technology.And III-V group iii v compound semiconductor material (as GaAs (GaAs)) has high electron mobility, therefore have switching speed and the cut-off frequency higher, occupy very critical role in high speed, frequency applications field than silicon based metal-oxide-semi-conductor type (MOSFET).In addition, because the GaAs compound semiconductor materials such as (GaAs) of direct band gap has good photoelectric characteristic, also be the preferred material of realizing light-electric integrated circuit (OEIC).
Light-electric integrated circuit (OEIC) is the product that optoelectronics and microelectronics combine, and is the needs of information-intensive society future development.In monolithic light-electric integrated circuit (OEIC) structure, general in the interconnection that includes simultaneously on the same backing material between optical device, electronic device and each device, no matter be that optical device (as semiconductor laser, photo-detector, fiber waveguide) or electronic devices and components (as field-effect transistor (FET), resistance, electric capacity) all adopt compound semiconductor materials to make usually.From the practicability angle, light-electric integrated circuit (OEIC) still is in initial stage, and its main cause is; Therefore the structure of optical device and electronic devices and components, device elemental motion characteristics, manufacturing process and different with the interconnection of other components and parts also have many difficulties to overcome.Particularly, in light-electric integrated circuit (OEIC) structured light probe assembly, usually optical semiconductor detector (PD) and metal-semiconductor field effect transistor (MESFET) are grown on the same backing material, and, realize transformation and the transmission of light signal to the signal of telecommunication by lateral wave conducting shell and electronic circuit coupling.Because photo-detector structure (as PIN pipe, avalanche photodide APD etc.) is different with the manufacture craft of metal-semiconductor field effect transistor (MESFET), therefore need to adopt relatively independent processing step, increased the manufacture difficulty and the complexity of light-electric integrated circuit (OEIC).And the processing and preparing of coupling waveguide layer is also wayward.In addition, because the intrinsic noise source (as dark current noise, quantum noise etc.) of optical semiconductor panel detector structure itself also makes and realizes that high-quality light-integrated difficulty of electric integrated circuit (OEIC) is bigger.
Summary of the invention
The present invention seeks to the problem that exists in light-electric integrated circuit (OEIC) optical detection assembly preparation process, propose a kind of photo-detector field-effect transistor (PD-MESFET) that comprises quantum dot and preparation method thereof, be characterized on the device vertical structure, compound semiconductor light detector (PD) and modulation doping metal-semiconductor field effect transistor (MESFET) being integrated.This basic device structure is near indium arsenide (InAs) quantum dot (QD) of one or more layers self-organizing growth of growth GaAs MESFET active area channel layer, the quantum dot that this layer is similar to floating gate structure can respond the incident light of near infrared band and fetter photo-generated carrier, can be used as near the coulomb electron scattering center of modulation doping metal-semiconductor field effect transistor (MESFET) two-dimensional electron gas conductivity channel layer.Under the modulating action of grid voltage, absorb the infrared photon of incident when indium arsenide (InAs) quantum dot, the energy state of quantum dot layer changes, cause the variation of coulomb potential field on every side, metal-semiconductor field effect transistor (MESFET) source-drain electrode conducting channel electric current to the neighbour can produce remarkable influence, thereby realizes that optical detection absorbs the control action to metal-semiconductor field effect transistor (MESFET) channel current.
For achieving the above object, technical solution of the present invention provides a kind of optical detection field effect transistor that comprises quantum dot, it is vertical sandwich construction: at substrate top surface order growth one deck resilient coating, resilient coating upper surface growth modulation-doped structure layer, structure sheaf upper surface growth one deck barrier layer, regrowth one deck comprises active layer and one deck cover layer of self-organized quantum dot, the last highly doped ohmic contact layer of growing on cover layer;
At specimen material surface preparation field-effect transistor structure, source region and drain region are positioned at the active area table top both sides that comprise quantum dot, and cut off with active area; Surfaces of active regions prepares gate electrode, and the source region upper surface prepares the source electrode, and the drain region upper surface prepares drain electrode.
Described optical detection field effect transistor, its described substrate is N p type gallium arensidep (100) crystal orientation substrate; Resilient coating is a gallium arsenide layer; The doped structure layer is the algaas layer of doped silicon, and doping content is 1 * 10
18Cm
-3Barrier layer is an aluminium arsenide layer; Quantum dot layer is the indium arsenic quanta point layer of self-organizing growth; Cover layer is the intrinsic algaas layer; Contact layer is the gallium arsenide layer of doped silicon, and doping content is 1 * 10
18Cm
-3Gate electrode is a conductivity gate, long≤5 μ m of the grid of translucent golden grid; Source, drain electrode with golden nickel germanium/gold as Ohm contact electrode.
Described optical detection field effect transistor, its described modulation-doped structure layer comprises one deck doped layer, with and go up one deck quantum well conductivity channel layer of growth, conductivity channel layer is the intrinsic gallium arsenide quantum well layer; Channel layer upper surface growth barrier layer.
Described optical detection field effect transistor, its described field effect conducting channel and top thereof, for comprising the active area mesa structure of quantum dot, table top is long to be≤20 μ m, wide is≤5 μ m.
Described optical detection field effect transistor, its described active area table top that contains indium arsenic quanta point that isolates, the embedded floating gate structure that makes quantum dot layer formation and source, not conducting of drain electrode.
Described optical detection field effect transistor, its described source, drain electrode, with golden nickel germanium/gold preparation and alloying, the conductivity channel layer that constitutes with GaAs quantum trap is communicated with, and forms the galvanic circle in fieldtron source region and drain region.
The described preparation method who comprises the optical detection field effect transistor of quantum dot is characterized in that, comprising:
The growth of the first step, specimen material, the substrate sample rotation that remains a constant speed in the growth course:
A, on substrate, epitaxial growth one deck GaAs buffer layer under 600 ℃ of temperature;
B, on resilient coating, deposit one layer thickness≤40nm, doped silicon concentration is 1 * 10
18Cm
-3Gallium aluminium arsenic doping layer;
C, on doped layer, growth thickness≤20nm intrinsic gallium arsenide quantum well channel layers;
D, on channel layer, growth thickness≤20nm aluminium arsenide barrier layer;
E, on barrier layer, under 500 ℃ of temperature with S-K pattern one or more layers self-organizing indium arsenic quanta point layer of growing;
F, on quantum dot layer, growth thickness≤60nm gallium aluminium arsenic intrinsic cover layer;
G, on cover layer, it is last that growth thickness≤30nm doped silicon concentration is 1 * 10
18Cm
-3The GaAs ohmic contact layer;
Second step, device architecture preparation:
A, employing photoetching and wet corrosion technique etch the active area table top that comprises the indium arsenic quanta point layer, and table top is long to be≤20 μ m, and wide is≤5 μ m;
B, aluminium arsenide barrier layer stop layer as the selective corrosion of wet etching, with assurance indium arsenic quanta point layer and source, drain regions partition are opened;
C, in active area table top both sides, prepare golden nickel germanium/golden source electrode and drain electrode with adopting conventional ohmic contact craft on the isolated source region of table top, the drain region;
D, source region, drain region are communicated with modulation doping GaAs quantum trap layer, form the conducting channel path of fieldtron by alloying;
E, prepare the conductivity gate of metal-semiconductor rectifier contact on the active area table top, grid are long to be≤5 μ m;
F, on grid, evaporation thickness is≤the translucent golden film of 10nm;
G, welding three electrode pins get finished product.
Described method, the wet etching liquid that its described wet corrosion technique is used, proportioning is a citric acid: water: hydrogen peroxide=1:7:8, etching time are≤40 seconds, and corrosion depth reaches the aluminium arsenide barrier layer.
Device architecture of the present invention has utilized the compound semiconductor different material layer that the selectivity of incident light is absorbed, and constraint light induced electron and cause the effect of the quantum effect that the Coulombian field changes in the quantum dot.Therefore, having that simple in structure, preparation technology is relatively easy, little, the characteristics such as noise is low, response device efficient height of crosstalking, is light-a kind of more practicable implementation method of electric integrated circuit (OEIC) optical detector component part.
Description of drawings
Fig. 1. be specimen material structure schematic side view of the present invention;
Fig. 2. be material band structure schematic diagram shown in Figure 1;
Fig. 3. be the electricity connection diagram of device shown in Figure 1.
Embodiment
Below in conjunction with the drawings and specific embodiments the present invention is described in further detail:
1. specimen material growth:
Device material of the present invention is grown on Solid State Source molecular beam epitaxy (MBE) equipment.Device architecture shown in Figure 1 is on N p type gallium arensidep (GaAs) (100) crystal orientation substrate 1, epitaxial growth one deck GaAs (GaAs) resilient coating 2 under 600 ℃ of temperature; The modulation-doped structure AlGaAs/GaAs layer of growing then at first is that the thick doping content of deposition one deck 40nm is 1 * 10
18Cm
-3(Si) AlGaAs layer 3,20nm intrinsic gallium arsenide (GaAs) quantum well (QW) of growing subsequently channel layer 4.After the modulation doping layer growth finishes, with 20nm aluminium arsenide (AlAs) as barrier layer 5, follow under 500 ℃ of temperature with S-K pattern growth one deck self-organizing indium arsenide (InAs) quantum dot (QD) layer 6, after Quantum Dots Growth finishes, regrowth 60nm AlGaAs intrinsic cover layer 7 and the highly doped GaAs of 30nm (GaAs) (1 * 10
18Cm
-3) ohmic contact layer 8.The substrate sample rotation that remains a constant speed in the growth course is to obtain the even quantum dot of high-quality and other epitaxial layer structures.
As mentioned above, material preparation growth of the present invention has mainly comprised two kinds of structures, the near infrared light panel detector structure that the first is made of indium arsenide (InAs) quantum dot and surperficial grid; It two is metal-semiconductor field effect transistor (MESFET) structures that the GaAs/AlGaAs conducting channel of modulation doping and surperficial grid constitute; Two kinds of vertical integrated being grown on the same backing material of structure.
2. device architecture preparation:
Conventional metal-semiconductor field effect transistor (MESFET) device, source electrode and drain electrode can directly be communicated with by the conducting channel below the grid.And the necessary in the present invention unique preparation process technology that adopts, as shown in Figure 3, indium arsenide (InAs) quantum dot layer 6 table tops and source 9, leakage 11 electrode districts of grid 13 belows are kept apart, and make source-leakage current be communicated with (as shown in Figure 1) by GaAs (GaAs) the quantum well conductivity channel layer 4 of quantum dot layer 6 belows, to realize basic device function of the present invention.
Fieldtron structure of the present invention is in preparation process, (citric acid: water: hydrogen peroxide=1:7:8) etches the active area table top that comprises indium arsenide (InAs) quantum dot layer 6 at first to adopt photoetching and wet corrosion technique, etching time is 40 seconds, corrosion depth reaches the aluminium arsenide barrier layer, and the area of active area table top is 5 * 20 μ m
2Adopted aluminium arsenide (AlAs) layer 5 of high potential barrier not only to can be used as the barrier layer, interval of indium arsenide (InAs) quantum dot layer 6 and conductivity channel layer 4 in the structure, simultaneously also utilize aluminium arsenide (AlAs) to stop layer, to guarantee that indium arsenide (InAs) quantum dot layer 6 and source-drain electrode are separated disconnection as the selective corrosion of wet etching.Prepare nickel germanium gold/gold (AuGeNi/Au) source electrode 10 and drain electrode 12 with adopting conventional ohmic contact craft on the isolated source region 9 of table top, the drain region 11, make source region 9, drain region 11 and modulation doping channel layer GaAs (GaAs) quantum well layer 4 UNICOMs by alloying, form the conducting channel loop of fieldtron.Comprising the conductivity gate 13 for preparing metal-semiconductor rectifier contact on the active area table top of quantum dot then, grid length is 5 μ m, and for the printing opacity responsiveness that guarantees that device is good, evaporation thickness is that the translucent gold of 10nm (Au) film is as gate electrode 13.
Characteristic and device band structure figure of the present invention (Fig. 2) and device electricity connection layout (Fig. 3) below in conjunction with field-effect transistor illustrate basic functional principle of the present invention.
According to a kind of execution mode, near infrared light (λ
Ex=1.3 μ m) before the illumination test, the source electrode 10 of Fig. 3 metal-semiconductor field effect transistor (MESFET) and drain electrode 12 external impressed current sources 15, external voltage source device 14 on the grid 13.At this moment, the electric current that injects by external circuit in the channel layer 4 can obtain the I-V output characteristic curve of common FET device under grid 13 voltage modulated effects.
Keep gate electrode 13 to be in a constant back bias voltage state, the raceway groove saturation current will be maintained a steady state value substantially.At this moment, as near infrared light (λ
ExWhen=1.3 μ m) inciding the device active region surface (as shown in Figure 2), owing to the band-gap energy of incident photon energy (E=0.954eV) less than device other materials layer, and only right in indium arsenide (InAs) quantum dot layer 6 generation light induced electron-holes.Photohole is under the modulating action that adds the negative sense grid voltage, tunnelling goes out gallium aluminium arsenic (AlGaAs) cover layer 7 and is extracted by gate electrode 13, light induced electron then since the restriction on the high potential barrier barrier layer of aluminium arsenide (AlAs) layers 5 be limited to be strapped in indium arsenide (InAs) quantum dot layer 6.
Capacitance C with quantum dot of nanoscale
QDUsually very little, its electrostatic energy can be expressed as behind the constraint charge carrier:
Q represents electronic charge, and C is quantum dot layer 6 and 7 capacitances of cover layer; The statcoulomb repulsive energy E of electronics is more a lot of greatly than electronics energy of thermal motion under the low temperature in this quantum dot.
Therefore, under illumination and grid voltage modulating action, each electronic state in indium arsenide (InAs) quantum dot layer 6 is filled by light induced electron gradually, make on quantum dot layer 6 each energy state the wave function of electronics intercouple and expand, thereby cause quantum dot layer 6 and around the marked change of static potential field; Under certain condition, the injection of charge carrier will exhaust the two-dimensional electron gas (2DEG) of conducting channel GaAs (GaAs) layer 4 of neighbour's metal-semiconductor field effect transistor (MESFET) in the lasting light irradiation formation quantum dot, make in the channel layer 4 electric current by pinch off, thereby realized under the near infrared light effect this device by of the switching of " opening " state, the actual needs that the threshold limit value condition of " opening " and " pass " can be used according to this integrated optoelectronic device and is selected definite to photic " pass " state.
Therefore, this device structurally vertically integrates the detection and the metal-semiconductor field effect transistor (MESFET) of near infrared light, can realize the control of near infrared light to metal-semiconductor field effect transistor conducting state, be a kind of photoelectricity integrated (OEIC) compound semiconductor FET device that comprises quantum dot.
Claims (8)
1. optical detection field effect transistor that comprises quantum dot, it is characterized in that, be vertical sandwich construction: at substrate top surface order growth one deck resilient coating, resilient coating upper surface growth modulation-doped structure layer, structure sheaf upper surface growth one deck barrier layer, regrowth one deck comprises active layer and one deck cover layer of self-organized quantum dot, the last highly doped ohmic contact layer of growing on cover layer; Described modulation-doped structure layer comprises one deck doped layer, with and go up one deck quantum well conductivity channel layer of growth, conductivity channel layer is the intrinsic gallium arsenide quantum well layer;
The source region of described optical detection field effect transistor and drain region are positioned at the active area table top both sides that comprise quantum dot, and cut off with active area; Surfaces of active regions prepares gate electrode, and the source region upper surface prepares the source electrode, and the drain region upper surface prepares drain electrode.
2. optical detection field effect transistor as claimed in claim 1 is characterized in that, described substrate is N p type gallium arensidep (100) crystal orientation substrate; Resilient coating is a gallium arsenide layer; The doped structure layer is the algaas layer of doped silicon, and doping content is 1 * 10
18Cm
-3Barrier layer is an aluminium arsenide layer; Quantum dot layer is the indium arsenic quanta point layer of self-organizing growth; Cover layer is the intrinsic algaas layer; Contact layer is the gallium arsenide layer of doped silicon, and doping content is 1 * 10
18Cm
-3Gate electrode is a conductivity gate, long≤5 μ m of the grid of translucent golden film grid; Source, drain electrode with golden nickel germanium/gold as Ohm contact electrode.
3. optical detection field effect transistor as claimed in claim 1 is characterized in that, field effect conducting channel and top thereof, and for comprising the active area mesa structure of quantum dot, table top is long to be≤20 μ m, wide is≤5 μ m.
4. optical detection field effect transistor as claimed in claim 1 or 2 is characterized in that, the described active area table top that contains indium arsenic quanta point that isolates, the embedded floating gate structure that makes quantum dot layer formation and source, not conducting of drain electrode.
5. optical detection field effect transistor as claimed in claim 1 or 2, it is characterized in that described source, drain electrode are with golden nickel germanium/gold preparation and alloying, thereby the conductivity channel layer that constitutes with GaAs quantum trap is communicated with, and forms the galvanic circle in fieldtron source region and drain region.
6. a preparation method who comprises the optical detection field effect transistor of quantum dot as claimed in claim 1 is characterized in that, comprising:
The growth of the first step, specimen material, the substrate sample rotation that remains a constant speed in the growth course:
A, on substrate, epitaxial growth one deck GaAs buffer layer under 600 ℃ of temperature;
B, on resilient coating, deposit one layer thickness≤40nm, doped silicon concentration is 1 * 10
18Cm
-3Gallium aluminium arsenic doping layer;
C, on doped layer, growth thickness≤20nm intrinsic gallium arsenide quantum well channel layers;
D, on channel layer, growth thickness≤20nm aluminium arsenide barrier layer;
E, on barrier layer, under 500 ℃ of temperature with S-K pattern one or more layers self-organizing indium arsenic quanta point layer of growing;
F, on quantum dot layer, growth thickness≤60nm gallium aluminium arsenic intrinsic cover layer;
G, on cover layer, it is last that growth thickness≤30nm doped silicon concentration is 1 * 10
18Cm
-3The GaAs ohmic contact layer;
Second step, device architecture preparation:
A, employing photoetching and wet corrosion technique etch the active area table top that comprises the indium arsenic quanta point layer, and table top is long to be≤20 μ m, and wide is≤5 μ m;
B, aluminium arsenide barrier layer stop layer as the selective corrosion of wet etching, with assurance indium arsenic quanta point layer and source, drain regions partition are opened;
C, in active area table top both sides, prepare golden nickel germanium/golden source electrode and drain electrode with adopting conventional ohmic contact craft on the isolated source region of table top, the drain region;
D, source region, drain region are communicated with modulation doping GaAs quantum trap layer, form the conducting channel path of fieldtron by alloying;
E, prepare the conductivity gate of metal-semiconductor rectifier contact on the active area table top, grid are long to be≤5 μ m;
F, on grid, evaporation thickness is≤the translucent golden film of 10nm;
G, welding three electrode pins get finished product.
7. method as claimed in claim 6 is characterized in that, the wet etching liquid that described wet corrosion technique is used, and proportioning is a citric acid: water: hydrogen peroxide=1:7:8, etching time are≤40 seconds, and corrosion depth reaches the aluminium arsenide barrier layer.
8. method as claimed in claim 7 is characterized in that, the wet etching liquid that described wet corrosion technique is used, and proportioning is a citric acid: water: hydrogen peroxide=1:7:8, etching time are≤40 seconds, and corrosion depth reaches the aluminium arsenide barrier layer.
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| CN107359221B (en) * | 2017-07-21 | 2019-03-01 | 中国科学院上海微系统与信息技术研究所 | A kind of infrared detector preparation method based on SOI- quantum dot heterostructures |
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| CN109065660B (en) * | 2018-08-22 | 2023-11-14 | 广东省半导体产业技术研究院 | Photosensitive device of waveguide type photovoltaic field effect transistor structure and manufacturing method |
| CN110896115B (en) * | 2018-09-12 | 2022-06-28 | 上海新微技术研发中心有限公司 | Phototransistor, infrared detector and method for manufacturing phototransistor |
| CN109698207B (en) * | 2018-12-21 | 2021-03-23 | 电子科技大学 | Quantum dot near-infrared detector based on field effect transistor and preparation method thereof |
| CN114335235B (en) * | 2021-12-30 | 2022-11-22 | 中国科学院半导体研究所 | Intelligent optical detector and using method and preparation method thereof |
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