CN100477473C - A state tracking simulation controlled power inverter - Google Patents
A state tracking simulation controlled power inverter Download PDFInfo
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- CN100477473C CN100477473C CNB2006101253864A CN200610125386A CN100477473C CN 100477473 C CN100477473 C CN 100477473C CN B2006101253864 A CNB2006101253864 A CN B2006101253864A CN 200610125386 A CN200610125386 A CN 200610125386A CN 100477473 C CN100477473 C CN 100477473C
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Abstract
This invention discloses one status trace analogue control inverter power, which comprises status trace controller, inverter, direct power, voltage sensor, current sensor and abstract device, wherein, the output voltage from inviter is sent to abstract device through voltage sensor to generate voltage error signals by comparing with reference to trace controller; the voltage error signals and current from inverter generate current signal through current sensor to status trace controller; status trace controller computes the voltage error signal and current signals to form control on inverter.
Description
Technical field
The present invention relates to a kind of power conversion circuit, particularly a kind of inverter of status tracking simulation control.
Background technology
In recent years along with some important departments and power consumption equipment increase day by day to the requirement of high quality power supply, and a large amount of uses of power electronic equipment cause harmonic pollution in electric power net serious, for stability and the power supply quality that improves electric power system, research and development High Performance PWM inverter enjoys attention.
It is constant that the dicyclo control of early stage PWM inverter outer voltage current inner loop adopts output voltage effective value outer shroud to keep the output voltage effective value mostly, this control mode can only guarantee that the effective value of output voltage is constant, can not guarantee the waveform quality of output voltage, particularly harmonic wave of output voltage content is big under the nonlinear load condition, the serious distortion of waveform; The dynamic response process of voltage effective value outer shroud control is very slow in addition, and output waveform fluctuates greatly when impact, anticlimax load, and recovery time is longer.
Present many Instantaneous Control schemes receive numerous scientific workers' concern, and the Instantaneous Control scheme can be regulated and control output voltage waveforms in real time in running, make power supply quality improve greatly.The instant voltage PID control mode have algorithm simple, be easy to realize, robustness is good and characteristics such as reliability height.For an inverter, overload fault is unusual one of common faults, must have the ability of it being implemented safeguard measure, and current-limiting function is the conventional measure of adopting.Although instant voltage PID is controlled at its superiority is arranged on the circuit structure, the control of PID monocycle can't realize the current-limiting protection function automatically, and the control of the dicyclo of outer voltage current inner loop has the automatic current limiting defencive function.
The dicyclo control of existing outer voltage current inner loop improves the dynamic property of inverter by current inner loop, make the output performance of inverter obtain bigger improvement, but weak point is that current inner loop is in order to suppress the nonlinear load disturbance, must possess enough bandwidth, could obtain satisfied performance, this has strengthened the difficulty that controller is realized.The controller parameter of dicyclo control system designs according to conventional method in addition, need to consider the influencing each other and coordinating of response speed, frequency bandwidth between two adjusters, and design of Controller step complexity also needs to try repeatedly to gather checking.
Summary of the invention
The objective of the invention is to overcome above-mentioned the deficiencies in the prior art part, a kind of inverter of status tracking simulation control is provided, this inverter stable state accuracy height, dynamic response fast, steadily, the total percent harmonic distortion of output voltage (THD) is low under the nonlinear load situation, and simple in structure, cost is lower.
The inverter of status tracking simulation control provided by the invention, it is characterized in that: it comprises status tracking controller, inverter, DC power supply, voltage sensor, current sensor and subtracter, the output of status tracking controller and the input of inverter join, the output of inverter joins with the input of voltage sensor and load, the electric current of drawing in the inverter and the input of current sensor join, second input of the output of current sensor and status tracking controller joins, the output of voltage sensor, reference quantity u
rNegative input end, positive input terminal with subtracter joins respectively, and the first input end of the output of subtracter and status tracking controller joins, and inverter connects DC power supply; The output voltage u of inverter
0Feed back to the negative input end of subtracter through overvoltage sensor, with reference quantity u
rRelatively back formation voltage error signal e sends the status tracking controller to; The electric current of drawing in voltage error signal e and the inverter sends the status tracking controller to through the current signal i ' that over-current sensor generates; Voltage error signal e that the status tracking controller is accepted two inputs and current signal i ' carry out forming control signal u then based on status tracking functional operation POLE PLACEMENT USING, employing ratio and integration
1Inverter is implemented control.
The present invention compared with prior art has the following advantages:
(1) under the various loading conditions from the zero load to the nominal load, all within 0.18%, steady-state error reduces the precision of voltage regulation greatly.
When (2) load changing was near rated power, dynamic transition process was no more than 0.5ms, and the output voltage rate of change is no more than 7%, and workload-adaptability strengthens.
(3) under specified nonlinear load situation, the load current crest factor surpasses 3 o'clock total percent harmonic distortion THD=0.46% of output voltage, the load current crest factor surpasses 5 o'clock total percent harmonic distortion THD=0.63% of output voltage, the total percent harmonic distortion of output voltage (THD) greatly reduces, and shows the wave distortion that nonlinear load is caused and has stronger inhibition ability.
(4) the present invention is in the design to inverter status tracking controller Control Parameter, Control Parameter and inverter performance index are required to set up quantitative relationship, this method has been simplified design process greatly, can satisfy the high performance index requirement simultaneously, has obvious superiority.Whole power-supply system has stronger robustness and higher steady-state adjustment precision, under various load disturbance situation, and all can the good interchange stabilized power supply of output quality.
(5) circuit structure of the present invention is simple, and cost is low, is easy to realize.
Description of drawings
Fig. 1 is the structural representation of the inverter of status tracking simulation control of the present invention;
Fig. 2 is one of circuit theory diagrams of inverter of the present invention;
Fig. 3 is two of the circuit theory diagrams of inverter of the present invention;
Fig. 4 is three of the circuit theory diagrams of inverter of the present invention;
Fig. 5 is a kind of specific implementation circuit diagram of status tracking controller;
Fig. 6 is the another kind of specific implementation circuit diagram of status tracking controller.
Embodiment
Come the present invention is described in further detail below in conjunction with accompanying drawing.
As shown in Figure 1, the structure of the inverter of status tracking simulation control of the present invention is: the input of the output of status tracking controller 1 and inverter 2 joins, the input of the output of inverter 2 and voltage sensor 5 and load 3 are joined, the input of electric current of drawing in the inverter 2 and current sensor 6 joins, second input of the output of current sensor 6 and status tracking controller 1 joins, the output of voltage sensor 5, reference quantity u
rNegative input end, positive input terminal with subtracter 7 joins respectively, and the first input end of the output of subtracter 7 and status tracking controller 1 joins, and inverter 2 connects DC power supply 4.
Voltage error signal e that status tracking controller 1 is accepted two inputs and current signal i ' carry out the status tracking functional operation based on POLE PLACEMENT USING, form control signal u then
1Inverter 2 is implemented control.
As shown in Figure 2, the current i of drawing in inverter 2 is the filter capacitor current i
c, reference quantity u
rWith output voltage u
0Compare back formation voltage error signal e through subtracter 7, the filter capacitor current i that voltage error signal e and inverter 2 transmit
cAll input to status tracking controller 1, status tracking controller 1 is finished function f
1(e, i
c) computing, function f
1(e, i
c) pass through voltage error signal e and filter capacitor current i
cCarry out computing, form control signal u
1 Inverter 2 is implemented control.
Function f
1(e, i
c) can adopt formula (I) or (II) be provided with.
f
1(e，i
c)＝(K
3+K
4/s)*i
c-
Formula (I)
[K
1*K
3+(K
1*K
4+K
2*K
3)/s+K
2*K
4/s
2]*e
K in the following formula
1Be voltage ratio coefficient, K
2Be the voltage integrating meter coefficient; K
3Be current ratio coefficient, K
4Be the current integration coefficient.With ζ and ω
nDamping ratio and the natural frequency of representing inverter response performance index request correspondence respectively, the parameter of the method design point tracking control unit 1 of employing POLE PLACEMENT USING,
Wherein:
K
3＝L(2+m+n)ζω
n-r
K
4Be the real number root of following equation:
CK
4 3+(1-a
2)K
4 2+a
1K
3K
4-K
3 2LCmnζ
2ω
n 4＝0
A in the formula
1=LC (m+n+2mn ζ
2) ζ ω
n 3, a
2=LC[1+ (2m+2n+mn) ζ
2] ω
n 2
K
1＝(a
2-CK
4-1)/K
3
K
2＝LCmnζ
2ω
n 4/K
4
Wherein L is the filter inductance of inverter 2, and C is the filter capacitor of inverter 2, and r is the equivalent damping resistance of inverter 2, and m, n are respectively the multiple of two non-dominant limits with respect to the response speed of dominant pole, and its span is generally 5～10.
This moment function f
1(e, i
c) also can adopt formula (II) mode to be provided with:
f
1(e, i
c)=K '
3* i
c-(K '
1* K '
3+ K '
2* K '
3/ s) * e formula (II)
K ' in the following formula
1Be voltage ratio coefficient, K '
2Be voltage integrating meter coefficient, K '
3Be the current ratio coefficient.Adopt the parameter of the method design point tracking control unit 1 of POLE PLACEMENT USING, wherein:
K′
3＝(2+n)ζω
nL-r
K′
1((1+2nζ
2)ω
n 2LC-1)/K′
3
K′
2＝nζω
n 3LC/K′
3
N is the multiple of non-dominant limit with respect to the response speed of dominant pole in the formula, and its span is generally 5～10.
The current i of drawing in inverter 2 is the filter inductance current i
1, as shown in Figure 3, its structure is similar to Fig. 2, and difference is that the electric current that inverter 2 is drawn among Fig. 2 is the filter capacitor current i
c, and the electric current that inverter 2 is drawn among Fig. 3 is the filter inductance current i
1 Status tracking controller 1 is finished function f among Fig. 3
1(e, i
1) computing, function f
1(e, i
1) setting suc as formula (III) or formula (IV), with the f among Fig. 2
1(e, i
c) identical, all adopt the parameter of the method design point tracking control unit 1 of POLE PLACEMENT USING.This implementation method is not capacitor current feedback control as shown in Figure 2 aspect the inhibition load disturbance.
f
1(e，i
1)＝(K
3+K
4/s)*i
1-
Formula (III)
[K
1*K
3+(K
1*K
4+K
2*K
3)/s+K
2*K
4/s
2]*e
f
1(e, i
1)=K '
3* i
1-K '
1* K '
3+ K '
2* K '
3/ s) * e formula (IV)
As shown in Figure 4, the current i of drawing in inverter 2 is the filter inductance current i
1With feedforward load current i
0The time, its structure is similar to Fig. 2, and difference is that the electric current that inverter 2 is drawn among Fig. 2 is the filter capacitor current i
c, and the electric current that inverter 2 is drawn among Fig. 4 comprises the filter inductance current i
1, and the load current i that feedovers in addition
0, status tracking controller 1 according to formula (V) or (VI) is finished function f
2(e, i
1, i
0) computing.This implementation method is at a kind of improvement of inductor current feedback control shown in Figure 3, has and suppresses the load disturbance performance preferably.
f
2(e，i
1，i
0)＝(K
3+K
4/s)*i
1-(K
3+K
4/s)*i
0-
Formula (V).
[K
1*K
3+(K
1*K
4+K
2*K
3)/s+K
2*K
4/s
2]*e
f
2(e, i
1, i
0)=K '
3* i
1-K '
3* i
0-(K '
1* K '
3+ K '
2* K '
3/ s) * e formula (VI)
Example:
According to the statement formula of above-mentioned each functional operation, status tracking controller 1 can adopt multiple specific implementation circuit to be implemented, and Fig. 5 and Fig. 6 have enumerated a kind of example and given further detailed explanation.
As shown in Figure 5, status tracking controller 1 comprise resistance R 1, R2 ..., R9, operational amplifier A 1, A2 and A3 and capacitor C 1, C2.One end of resistance R 1 and the output of subtracter 7 join, the other end of resistance R 1, one end of resistance R 2 and the end of oppisite phase of first operational amplifier A 1 join, the other end of resistance R 2 and resistance R 3, one end of capacitor C 1 joins, resistance R 3, one end of the other end of capacitor C 1 and resistance R 4 and the output of first operational amplifier A 1 join, the in-phase end ground connection of first operational amplifier A 1, one end of resistance R 5 and the output of current sensor 6 join, the other end of resistance R 4, one end of the other end of resistance R 5 and resistance R 6 and the end of oppisite phase of second operational amplifier A 2 join, the output of the other end of resistance R 6 and second operational amplifier A 2 joins, the in-phase end ground connection of second operational amplifier A 2, one end of resistance R 7 and the output of second operational amplifier A 2 join, the other end of resistance R 7, one end of resistance R 8 and the end of oppisite phase of the 3rd operational amplifier A 3 join, the in-phase end ground connection of the 3rd operational amplifier A 3, the other end of resistance R 8 and resistance R 9, one end of capacitor C 2 joins, resistance R 9, the output of the other end of capacitor C 2 and the 3rd operational amplifier A 3 joins.
Wherein R3 and C1, R9 and C2 constitute a big inertial element, the saturation problem of avoiding pure integral element to cause respectively.
First operational amplifier A 1, second operational amplifier A 2 and the 3rd operational amplifier A 3 all can select for use commercially available general operational amplifier to get final product, as TL084, and LM324 etc.
According to function f
1(e, i
c) expression formula (I), resistance R among Fig. 5 be set
1, R
2And R
3And capacitor C
1Selection should satisfy following relation:
R
2/R
1＝K
1，R
1*C
1＝1/K
2，R
3*C
1≥3.2ms；
Resistance R
7, R
8And R
9And capacitor C
2Selection should satisfy following relation:
R
8/R
7＝K
3，R
7*C
2＝1/K
4，R
9*C
2≥3.2ms；
Resistance R
4, R
5And R
6Selection should satisfy following relation:
R
4＝R
5＝R
6。
Equally, can explain formula (III) and (V) according to function, obtain resistance R 1, R2 ..., R9 and capacitor C 1, the C2 condition that should satisfy.
As shown in Figure 6, status tracking controller 1 comprise resistance R 10, R11 ..., R17, operational amplifier A 4, A5 and A6 and capacitor C 3.One end of resistance R 10 and the output of subtracter 7 join, the other end of resistance R 10, one end of resistance R 11 and the end of oppisite phase of four-operational amplifier A4 join, the other end of resistance R 11 and resistance R 12, one end of capacitor C 3 joins, resistance R 12, one end of the other end of capacitor C 3 and resistance R 13 and the output of four-operational amplifier A4 join, the in-phase end ground connection of four-operational amplifier A4, one end of resistance R 14 and the output of current sensor 6 join, the other end of resistance R 13, one end of the other end of resistance R 14 and resistance R 15 and the end of oppisite phase of the 5th operational amplifier A 5 join, the output of the other end of resistance R 15 and the 5th operational amplifier A 5 joins, the in-phase end ground connection of the 5th operational amplifier A 5, one end of resistance R 16 and the output of the 5th operational amplifier A 5 join, one end of the other end of resistance R 16 and resistance R 17 and the end of oppisite phase of the 6th operational amplifier A 6 join, the in-phase end ground connection of the 6th operational amplifier A 6, the output of the other end of resistance R 17 and the 6th operational amplifier A 6 joins.
Wherein R12 and C3 constitute a big inertial element, the saturation problem of avoiding pure integral element to cause.
Four-operational amplifier A4, the 5th operational amplifier A 5 and the 6th operational amplifier A 6 all can select for use commercially available general operational amplifier to get final product, as TL084, and LM324 etc.
Corresponding to function f
1(e, i
c) expression formula (II), resistance R among Fig. 6 be set
10, R
11, R
12And R
16, R
17And capacitor C
3Selection should satisfy following relation:
R
11/R
10＝K′
1，R
10*C
3＝1/K′
2，R
12*C
3≥3.2ms；
R
17/R
16＝K′
3
Resistance R
13, R
14And R
15Selection should satisfy following relation:
R
13＝R
14＝R
15。
Equally, can explain formula (IV) and (VI), obtain resistance R according to function
10, R
11, R
12And R
16, R
17And capacitor C
3The selection condition that should satisfy.
Persons skilled in the art can also adopt the multiple physical circuit except that above-mentioned example to implement the present invention according to content disclosed by the invention.
Claims (7)
1, a kind of inverter of status tracking simulation control, it is characterized in that: it comprises status tracking controller (1), inverter (2), DC power supply (4), voltage sensor (5), current sensor (6) and subtracter (7), the input of the output of status tracking controller (1) and inverter (2) joins, the input of the output of inverter (2) and voltage sensor (5) and load (3) are joined, the input of electric current of drawing in the inverter (2) and current sensor (6) joins, second input of the output of current sensor (6) and status tracking controller (1) joins, the output of voltage sensor (5), reference quantity u
rNegative input end, positive input terminal with subtracter (7) joins respectively, and the first input end of the output of subtracter (7) and status tracking controller (1) joins, and inverter (2) connects DC power supply (4); The output voltage u of inverter (2)
0Feed back to the negative input end of subtracter (7) through overvoltage sensor (5), with reference quantity u
rRelatively back formation voltage error signal e sends status tracking controller (1) to; The electric current of drawing in voltage error signal e and the inverter (2) sends status tracking controller (1) to through the current signal i that over-current sensor (6) generates; Voltage error signal e that status tracking controller (1) is accepted two inputs and current signal i carry out forming control signal u then based on status tracking functional operation POLE PLACEMENT USING, employing ratio and integration
1Inverter (2) is implemented control.
2, inverter according to claim 1 is characterized in that: the current i of drawing in inverter (2) is the filter capacitor current i
cOr filter inductance current i
1, status tracking controller (1) is provided with function f according to following formula
1(e, i), wherein, i equals i
cOr i
1, function f
1(e i) passes through voltage error signal e and filter capacitor current i
cOr filter inductance current i
1Carry out computing, form control signal u
1Inverter (2) is implemented control:
f
1(e，i)＝(K
3+K
4/s)*i-
[K
1*K
3+(K
1*K
4+K
2*K
3)/s+K
2*K
4/s
2]*e
K in the following formula
3Be current ratio coefficient, K
3=L (2+m+n) ζ ω
n-r, wherein, ζ and ω n represent the damping ratio and the natural frequency of inverter response performance index request correspondence respectively, and L is the filter inductance of inverter (2), r is the equivalent damping resistance of inverter (2), and m, n are respectively the multiple of two non-dominant limits with respect to the response speed of dominant pole;
K
4Be current integration coefficient, K
4Value equal the real number root of following equation:
CK
4 3+(1-a
2)K
4 2+a
1K
3K
4-K
3 2LCmnζ
2ω
n 4＝0；
A in the formula
1=LC (m+n+2mn ζ
2) ζ ω
n 3, a
2=LC[1+ (2m+2n+mn) ζ
2] ω
n 2, C is the filter capacitor of inverter (2);
K
2Be voltage integrating meter coefficient, K
2=LCmn ζ
2ω
n 4/ K
4
K
1Be voltage ratio coefficient, K
1=(a
2-CK
4-1)/K
3
3, inverter according to claim 1 is characterized in that: the current i of drawing in inverter (2) is the filter capacitor current i
cOr filter inductance current i
1, status tracking controller (1) is provided with function f according to following formula
1(e, i), wherein, i equals i
cOr i
1, function f
1(e i) passes through voltage error signal e and filter capacitor current i
cOr filter inductance current i
1Carry out computing, form control signal u
1Inverter (2) is implemented control:
f
1(e，i)＝K′
3*i-(K′
1*K′
3+K′
2*K′
3/s)*e
K ' in the following formula
3Be current ratio coefficient, K '
3=(2+n) ζ ω
nL-r, wherein, ζ and ω
nDamping ratio and the natural frequency of representing inverter response performance index request correspondence respectively, L is the filter inductance of inverter (2), and r is the equivalent damping resistance of inverter (2), and n is the multiple of non-dominant limit with respect to the response speed of dominant pole;
K '
1Be voltage ratio coefficient, K '
1=((1+2n ζ
2) ω
n 2LC-1)/K '
3, wherein C is the filter capacitor of inverter (2);
K '
2Be voltage integrating meter coefficient, K '
2=n ζ ω
n 3LC/K '
3
4, inverter according to claim 1 is characterized in that: the current i of drawing in inverter (2) is the filter inductance current i
1With feedforward load current i
0The time, status tracking controller (1) is provided with function f according to following formula
2(e, i
1, i
0), function f
2(e, i
1, i
0) pass through voltage error signal e, filter inductance current i
1With feedforward load current i
0Carry out computing, form control signal u
1Inverter (2) is implemented control:
f
2(e，i
1，i
0)＝(K
3+K
4/s)*i
1-(K
3+K
4/s)*i
0-
[K
1*K
3+(K
1*K
4+K
2*K
3)/s+K
2*K
4/s
2]*e
K in the following formula
3Be current ratio coefficient, K
3=L (2+m+n) ζ ω
n-r, wherein, ζ and ω
nDamping ratio and the natural frequency of representing inverter response performance index request correspondence respectively, L is the filter inductance of inverter (2), r is the equivalent damping resistance of inverter (2), and m, n are respectively the multiple of two non-dominant limits with respect to the response speed of dominant pole;
K
4Be current integration coefficient, K
4Value equal the real number root of following equation:
CK
4 3+(1-a
2)K
4 2+a
1K
3K
4-K
3 2LCmnζ
2ω
n 4＝0；
A in the formula
1=LC (m+n+2mn ζ
2) ζ ω
n 3, a
2=LC[1+ (2m+2n+mn) ζ
2] ω
n 2, C is the filter capacitor of inverter (2);
K
2Be voltage integrating meter coefficient, K
2=LCmn ζ
2ω
n 4/ K
4
K
1Be voltage ratio coefficient, K
1=(a
2-CK
4-1)/K
3
5, inverter according to claim 1 is characterized in that: the current i of drawing in inverter (2) is the filter inductance current i
1With feedforward load current i
0The time, status tracking controller (1) is provided with function f according to following formula
2(e, i
1, i
0), function f
2(e, i
1, i
0) pass through voltage error signal e, filter inductance current i
1With feedforward load current i
0Carry out computing, form control signal u
1Inverter (2) is implemented control:
f
2(e，i
1，i
0)＝K′
3*i
1-K′
3*i
0-(K′
1*K′
3+K′
2*K′
3/s)*e
K ' in the following formula
3Be current ratio coefficient, K '
3=(2+n) ζ ω
nL-r, wherein, ζ and ω
nDamping ratio and the natural frequency of representing inverter response performance index request correspondence respectively, L is the filter inductance of inverter (2), and r is the equivalent damping resistance of inverter (2), and n is the multiple of non-dominant limit with respect to the response speed of dominant pole;
K '
1Be voltage ratio coefficient, K '
1=((1+2n ζ
2) ω
n 2LC-1)/K '
3, wherein C is the filter capacitor of inverter (2);
K '
2Be voltage integrating meter coefficient, K '
2=n ζ ω
n 3LC/K '
3
6, according to claim 2 or 4 described inverters, it is characterized in that: status tracking controller (1) comprise resistance R 1, R2 ..., R9, operational amplifier A 1, A2 and A3 and capacitor C 1, C2; Wherein, the output of one end of resistance R 1 and subtracter (7) joins, the other end of resistance R 1, one end of resistance R 2 and the end of oppisite phase of first operational amplifier A 1 join, the other end of resistance R 2 and resistance R 3, one end of capacitor C 1 joins, resistance R 3, one end of the other end of capacitor C 1 and resistance R 4 and the output of first operational amplifier A 1 join, the in-phase end ground connection of first operational amplifier A 1, the output of one end of resistance R 5 and current sensor (6) joins, the other end of resistance R 4, one end of the other end of resistance R 5 and resistance R 6 and the end of oppisite phase of second operational amplifier A 2 join, the output of the other end of resistance R 6 and second operational amplifier A 2 joins, the in-phase end ground connection of second operational amplifier A 2, one end of resistance R 7 and the output of second operational amplifier A 2 join, the other end of resistance R 7, one end of resistance R 8 and the end of oppisite phase of the 3rd operational amplifier A 3 join, the in-phase end ground connection of the 3rd operational amplifier A 3, the other end of resistance R 8 and resistance R 9, one end of capacitor C 2 joins, resistance R 9, the output of the other end of capacitor C 2 and the 3rd operational amplifier A 3 joins.
7, according to claim 3 or 5 described inverters, it is characterized in that: status tracking controller (1) comprise resistance R 10, R11 ..., R17, operational amplifier A 4, A5 and A6 and capacitor C 3; Wherein, the output of one end of resistance R 10 and subtracter (7) joins, the other end of resistance R 10, one end of resistance R 11 and the end of oppisite phase of four-operational amplifier A4 join, the other end of resistance R 11 and resistance R 12, one end of capacitor C 3 joins, resistance R 12, one end of the other end of capacitor C 3 and resistance R 13 and the output of four-operational amplifier A4 join, the in-phase end ground connection of four-operational amplifier A4, the output of one end of resistance R 14 and current sensor (6) joins, the other end of resistance R 13, one end of the other end of resistance R 14 and resistance R 15 and the end of oppisite phase of the 5th operational amplifier A 5 join, the output of the other end of resistance R 15 and the 5th operational amplifier A 5 joins, the in-phase end ground connection of the 5th operational amplifier A 5, one end of resistance R 16 and the output of the 5th operational amplifier A 5 join, one end of the other end of resistance R 16 and resistance R 17 and the end of oppisite phase of the 6th operational amplifier A 6 join, the in-phase end ground connection of the 6th operational amplifier A 6, the output of the other end of resistance R 17 and the 6th operational amplifier A 6 joins.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101253864A CN100477473C (en) | 2006-12-08 | 2006-12-08 | A state tracking simulation controlled power inverter |
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|---|---|---|---|
| CNB2006101253864A CN100477473C (en) | 2006-12-08 | 2006-12-08 | A state tracking simulation controlled power inverter |
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| CN100477473C true CN100477473C (en) | 2009-04-08 |
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| 基于极点配置的DC/DC变换器PID参数优化设计. 陈青昌，彭力，康勇.通信电源技术，第22卷第2期. 2005 * |
| 逆变器电压反馈单环PID控制器参数极点配置实现研究. 孔学娟，彭力，康勇.武汉市首届学术年会论文集，第2004年卷. 2004 * |
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