CN108075657A - Small-power APFC circuits - Google Patents
Small-power APFC circuits Download PDFInfo
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- CN108075657A CN108075657A CN201711372630.1A CN201711372630A CN108075657A CN 108075657 A CN108075657 A CN 108075657A CN 201711372630 A CN201711372630 A CN 201711372630A CN 108075657 A CN108075657 A CN 108075657A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/1566—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Rectifiers (AREA)
Abstract
The present invention proposes a kind of small-power APFC circuits, including：Boost main circuits and control circuit, wherein, control circuit includes control chip, for according to default current control mode, by gathering main circuit current and voltage after the output voltage in Boost main circuits, rectification, and computing and compensation are carried out to the data collected in the inside of control chip, final modulated signal is obtained, to make the undistorted no phase following difference input voltage of the input current of Boost main circuits according to final modulated signal driving power grade metal-oxide-semiconductor.The present invention can efficiently reduce Harmfulness Caused by Harmonics, ensure the operation of electricity net safety stable.
Description
Technical field
The present invention relates to power electronics field, more particularly to a kind of small-power APFC circuits.
Background technology
With the fast development of Power Electronic Technique, start to widely apply power electronic devices in various electrical equipments, from
And so that harmonic current is increasingly severe.These factors not only cause harmonic current to polluted business environment, but also serious dirty
Ran Liao military enterprises and home environment.Serious consequence caused by a large amount of harmonic waves is that the power factor of input terminal drastically declines, and then
Cause the power supply quality of power grid to reduce.It is energy saving to improve power factor, improves power quality, ensures that power system security is steady
Surely the requirement run.Therefore power factor is improved with very important using power factor correction technology in electrical equipment
Meaning.
Power factor correction technology is broadly divided into two classes：One kind is passive power factor correction, and another kind of is active power
Factor correcting technology.
In the 1970s, people have devised passive power factor school using inductance, capacitance and simple electric power diode
Positive circuit, wherein the rectification that simplest passive power factor correcting circuit is made of an inductance and several Power Diode Pumpeds
Bridge is formed, as shown in Figure 1.
Occur into later stage the 1970s Active Power Factor Correction Technology, wherein simplest active power school
Positive circuit is made of thyristor (Thyristor), inductance and capacitance.With gate level turn-off thyristor (GTO), electric power
The appearance of the full-controlled devices such as bipolar transistor (BJT), in the 1980s, modern APFC technologies occur.In structure, it is
Establish the DC-DC controlling units between rectifier and load.It is using feedforward and rear feedback technique on control strategy, with defeated
Enter voltage or input current as with reference to measuring, realize input sinusoidal current without the undistorted tracking same frequency of difference by closed-loop control
Input sinusoidal voltage.In this stage, research emphasis is concentrated mainly on the operating mode of DC-DC circuit.DC/DC converters exist
It works under high frequency, this enables its volume and weight to be lowered very much；Since power factor can reach more than 0.99, therefore
Can significantly improve the power supply efficiency of power grid.In the 1980s, considerable a part of scholar starts to put forth effort research continuously
BOOST topological structures under electric current (CCM), and constantly apply it in active power factor correction circuit.After the eighties
There is the theory of discontinuous current mode (Discontinuous Current Mode, DCM) in phase, compared with CCM, it excellent
Point is to need only to detection output voltage；Simultaneously because the discontinuous current in inductance, avoids booster diode in Boost circuit
The problem of Reverse recovery；The magnetic hystersis loss of this external inductance is small, will not generate the phenomenon that inductance fever is serious.
The end of the nineties is the watershed of Active Power Factor Correction Technology development.Each state all starts to put into a large amount of manpowers and object
Power researches and develops new Active Power Factor Correction Technology.Particularly PESC sets up PFC special topic, this has been counted as
The new mark of active power factor correction development.
From this, the new topological structure of PFC principle and control method occur in succession.In recent years, active power because
The research of number alignment technique has obtained quick development.First, in the research of Active Power Factor Correction Technology, topology knot
Structure development is very fast.Present topological structure Cuk, Sepic, Zeta, Boost, Buck, Buck-Boost, forward converter, circuit of reversed excitation
Etc. being commonly used in Switching Power Supply.Theoretically these circuit topologies can serve as circuit of power factor correction power stage
Structure, and in practice due to different topology structure each the characteristics of, Boost, Buck, Buck-Boost are more satisfactory isolation
Type structural circuit, forward converter and circuit of reversed excitation are ideal non-isolation type structural circuits.They suffer from respective spy
Point uses different topological structures according to actual conditions.And except main circuit topology knot for power factor correction technology
Outside structure, the research of control method is also the emphasis of research.According to different operating modes, the controlling party of power factor correction technology
Method is broadly divided into three classes.And the division of different working modes, then it is whether continuous according to inductive current.The work of continuous current mode
Operation mode is known as continuous current mode (Continuous Current Mode, CCM)；The discontinuous operating mode of inductive current
Referred to as discontinuous current mode (Discontinuous Current Mode, DCM)；The work of inductive current therebetween
Pattern becomes critical current Mode B CM (Boundary Current Mode).Different control modes have the characteristics of respective.
At present, the widely used two-stage PFC of people and single- stage PFC Active Power Factor Correction Technology.Wherein by right for many years
The research of two-stage PFC technologies, maturity are very high.It is the active power factor school that current people are commonly used
Positive technical method.Two-stage PFC is formed using two independent converters, the two converters control input current respectively
Rectification and output voltage quickly adjust.Boost rectification input current is used in most cases.It is intrinsic using two-stage PFC
The characteristics of be that input current waveform distortion approximately is less than 5%, power factor is minimum to reach 0.99, and smaller storage can be used
It can capacitance.But at least there are two switches and more set control circuits for two-stage pfc circuit.Making it, the cost is relatively high, circuit structure
It is complicated.As long as single- stage PFC cost it is lower than two-stage PFC and one switch and a set of control circuit, make it in PFC
It is used widely in technology.
Active power factor correction controller becomes integrated circuit from the pattern of a single circuit composition way circuit
Pattern.At present, the APFC technologies applied to large-power occasions are more mature, but apply to the APFC of middle low power occasion
Technology is just paid attention in recent years.
With respect to passive power factor correction, active power factor correction cost is higher.APFC applied to large-power occasions
Technology is more mature, but the APFC technologies for applying to middle low power occasion are also exploring development phase.However, active work(
Rate factor correcting topological structure and the collocation of matched control chip are unreasonable.
The content of the invention
It is contemplated that at least solve one of above-mentioned technical problem.
For this purpose, it is an object of the invention to propose a kind of small-power APFC circuits, which can efficiently reduce harmonic wave
Harm, ensures the operation of electricity net safety stable.
To achieve these goals, the embodiment of the present invention proposes a kind of small-power APFC circuits, including：Including
Boost main circuits and control circuit, wherein, the control circuit includes control chip, for according to default current control mould
Formula, by gathering main circuit current and voltage after the output voltage in the Boost main circuits, rectification, and in the control
The inside of chip carries out computing and compensation to the data collected, final modulated signal is obtained, so as to according to final modulation
Signal driving power grade metal-oxide-semiconductor makes the undistorted no phase following difference input voltage of the input current of the Boost main circuits.
In addition, small-power APFC circuits according to the above embodiment of the present invention can also have following additional technology spy
Sign：
In some instances, described to control chip as UC3854 chips, it is defeated that the UC3854 chips include first to fourth
Inbound port and output terminal, wherein, the first input port is used for Rreceive output voltage signal；Second input port is used for
Receive the current signal after rectification；3rd input port is used for receiving voltage follow current signal；4th input terminal
Mouth is used to receive current error amplified signal；The output port is used to export control signal to switching tube.
In some instances, the default current control mode is average current control mode.
In some instances, in the APFC circuits, the calculation formula of inductance is as follows：
Wherein, Vin(peak) it is input crest voltage, fsFor switching frequency, D is duty cycle, and I is ripple current.
In some instances, in the APFC circuits, the calculation formula of output capacitance is as follows：
Wherein, POFor bearing power, Δ t holds time for capacitance, VOFor output voltage, V1To maintain loaded work piece most
Small voltage.
In some instances, in the APFC circuits, the voltage at actual current detection resistance both ends is：
VVS(pk)=IPK(max)×RS
Wherein, IPK(max) it is maximum current peak, RSFor the resistance value of current sense resistor.
In some instances, in the APFC circuits, design capacitance is calculated by equation below：
Wherein, RsetFor oscillator timing resistor, fsFor switching frequency.
In some instances, in the Current amplifier compensator of the APFC circuits,
Wherein, the Δ VrsThe slope of ramp voltage, U are exported for oscillatoroFor output voltage, RSTo sense resistance, L is
Boost inductance, fsFor working frequency.
The Δ VrsEqual to fsPeak point current, error amplifier gain is：
Wherein, VSThe slope of ramp voltage is exported for oscillator.
Feedback resistance is：
Rc2=Gca×Rci
Wherein, RciFor feedback resistance definite value.
The cross-over frequency of current loop is：
Wherein, VOFor output voltage.
Calculate zero compensation capacitance：
Wherein, capacitance Ccz、CcpFor zero compensation capacitance, wherein capacitance CcpSelection, the position of pole is higher than fs/2。
In some instances, in the voltage error amplifier of the APFC circuits,
Output ripple voltage is：
Wherein, PinFor input power, frFor the frequency of second harmonic Wen Bo.
Voltage error amplifier ripple voltage is with gain：
Wherein, Vvao=5-4=1V；
Random selection R in the reasonable scopevi, then feedback network is as follows：
Dot frequency is entirely：
In some instances, in the feed-forward voltage voltage-dividing capacitor of the APFC circuits,
Wherein, GffFor algorithm value, frFor second harmonic frequency, Cff1、Cff2For divalent RC low-pass filtering capacitances, Rff2、
Rff3For for divalent RC low-pass filtering resistance.
Small-power APFC circuits according to embodiments of the present invention can be reduced effectively since a large amount of of power electronic devices make
With and generate a large amount of pollution harmonic waves to the power quality of power grid and the harm generated safely, improve power factor, ensure that power grid is pacified
Stable operation entirely, while the APFC active power correcting circuits for filling up small-power occasion are short in the market, in order to structure
Build a health, clean power network.
The additional aspect and advantage of the present invention will be set forth in part in the description, and will partly become from the following description
It obtains substantially or is recognized by the practice of the present invention.
Description of the drawings
The above-mentioned and/or additional aspect and advantage of the present invention will become in the description from combination accompanying drawings below to embodiment
Substantially and it is readily appreciated that, wherein：
Fig. 1 is the existing active power factor correction circuit diagram built by inductance, capacitance and simple electric power diode；
Fig. 2 is the detailed maps of small-power APFC circuits according to an embodiment of the invention；
Fig. 3 is the schematic diagram of Boost main circuits according to an embodiment of the invention；
Fig. 4 is the schematic diagram that control circuit according to an embodiment of the invention carries out Average Current Control；
Fig. 5 is inductive current waveform according to an embodiment of the invention.
Specific embodiment
The embodiment of the present invention is described below in detail, the example of the embodiment is shown in the drawings, wherein from beginning to end
Same or similar label represents same or similar element or has the function of same or like element.Below with reference to attached
The embodiment of figure description is exemplary, and is only used for explaining the present invention, and is not considered as limiting the invention.
In the description of the present invention, it is to be understood that term " " center ", " longitudinal direction ", " transverse direction ", " on ", " under ",
The orientation or position relationship of the instructions such as "front", "rear", "left", "right", " vertical ", " level ", " top ", " bottom ", " interior ", " outer " are
Based on orientation shown in the drawings or position relationship, it is for only for ease of the description present invention and simplifies description rather than instruction or dark
Show that signified device or element there must be specific orientation, with specific azimuth configuration and operation, thus it is it is not intended that right
The limitation of the present invention.In addition, term " first ", " second " are only used for description purpose, and it is not intended that instruction or hint are opposite
Importance.
In the description of the present invention, it is necessary to illustrate, unless otherwise clearly defined and limited, term " installation ", " phase
Even ", " connection " should be interpreted broadly, for example, it may be being fixedly connected or being detachably connected or be integrally connected；It can
To be mechanical connection or be electrically connected；It can be directly connected, can also be indirectly connected by intermediary, Ke Yishi
Connection inside two elements.For the ordinary skill in the art, with concrete condition above-mentioned term can be understood at this
Concrete meaning in invention.
Small-power APFC circuits according to embodiments of the present invention are described below in conjunction with attached drawing.
Fig. 2 is the detailed maps of small-power APFC circuits according to an embodiment of the invention.As shown in Fig. 2, this is small
Power APFC circuits include：Including Boost main circuits and control circuit.
Wherein, control circuit includes control chip, for according to default current control mode, by gathering Boost master
Main circuit current and voltage after output voltage, rectification in circuit, and the inside of control chip to the data that collect into
Row computing and compensation obtain final modulated signal, to make Boost according to final modulated signal driving power grade metal-oxide-semiconductor
The undistorted no phase following difference input voltage of input current of main circuit.Wherein, it is necessary to which explanation, above-mentioned small-power for example refer to
Power is less than a setting value, and in specific example, such as shown in Fig. 2 is 120W small-power APFC circuits.
In one embodiment of the invention, for UC3854 chips, UC3854 chips include first to the above-mentioned chip that controls
To the 4th input port and output terminal, wherein, first input port is used for Rreceive output voltage signal；Second input port is used for
Receive the current signal after rectification；3rd input port is used for receiving voltage follow current signal；4th input port is used to connect
Receive current error amplified signal；Output port is used to export control signal to switching tube.
In one embodiment of the invention, default current control mode is average current control mode.
Specifically, in fig. 2, the first half is the boost main circuits of small-power (120W) APFC circuits, and lower half is control
Circuit processed.The core component of control circuit is, for example, UC3854 chips.It is based on average current control mode, by gathering power
Main circuit current and voltage and in control chip internal pair after output voltage, rectification in grade main circuit (Boost main circuits)
Acquisition signal, which carries out computing, realizes the output of ideal Modulated signal with the operation compensated, this modulated signal being capable of driving power
Grade metal-oxide-semiconductor forces the undistorted no phase following difference input voltage of main circuit input current.Ln1 terminal (i.e. first input ends in Fig. 2
Mouthful) connect with output voltage signal, ln2 terminals (i.e. the second input port) connect with the current signal after rectification, ln3 terminals
(i.e. the 3rd input port) connects with voltage follow current signal, and ln4 terminals (i.e. the 4th input port) amplify with current error
Signal connects.Out1 terminals (i.e. output port) export control signal to switching tube.
The structure to the small-power APFC circuits of the embodiment of the present invention and principle carry out detailed exemplary description below.
Specifically, the circuit of active power factor correction mainly has the main power control circuit of buck (BUCK), boosting
One decompression (mono- BUCK of BOOST) main power control circuit of formula (BOOST) main power control circuit and liter.The embodiment of the present invention is adopted
During by the use of Boost main circuits as PFC main circuits, the advantages of this circuit is that input current is the electric current for flowing through inductance, directly
The purpose that can reach control input electric current is controlled inductive current；The Complete Continuity of its input current ensure that defeated
Enter the controllability of the whole cycle of current waveform, this to obtain very high power factor；Meanwhile input current
Complete Continuity pass through the current peak very little of switching tube again, and this topological structure to the fluctuation of network voltage not
Sensitivity, suitable for the occasion that voltage ripple of power network is larger.In addition, the output of switching tube gate pole and entire circuit of power factor correction
It is common ground, this reduces control difficulty to a certain extent.The topological structure of Boost main circuits is for example shown in Fig. 3.
The Direct Current Control method being most widely used in active power factor correction DC Control Method is peak value electricity
Flow control, Average Current Control, hysteretic loop current control.The Average Current Control that the embodiment of the present invention uses has oneself uniqueness
The advantages of, such as the gain bandwidth of electric current loop is larger, and when its track reference current signal, generated distortion very little；It is also
Very little THD, EMI and very high power factor can be obtained.In addition, during using Average Current Control, it is arbitrary in topological circuit
Branch current can be detected.It is applied widely, can not only may be also used in large and medium-sized power used in mini power occasion
Occasion.These advantages become current most widely used, the most ripe APFC control methods of technology.So in the reality of the present invention
It applies and Average Current Control has also been selected in example.Average Current Control schematic diagram is according in Theory of Automatic Control for example shown in Fig. 4
Closed-loop control thought, using input current as controlled device, reference current, by building closed loop configuration, is generated as set-point
One target PWM wave controls the main switch element in Boost main circuits with it, and then influences the waveform of input current, makes
Input current is without following difference reference current signal.Specifically, inductive current waveform during Average Current Control is as shown in Figure 5.
Specifically, the cardinal principle of the small-power APFC circuits of the embodiment of the present invention is summarized as follows：Respectively from switch week
Phase and reference current cycle two level analysis relation between reference current, input current, integral output signal and carrier wave, most
Where the intension for explaining average current model eventually.Integration closed-loop control system is to refer to how input current average value no error following
Current average.A switch periods are first analyzed, when main switch is closed, the instantaneous value of input current is linear increase,
And be certain to be more than reference current, the output of integrator at this time is increased；And when main switch disconnects, electric current again can linearly under
Drop, and be certain to drop below reference current instantaneous value, the output of integrator at this time is to reduce.So based on average current
Method APFC circuit stabilities work when, the output of integrator be increase for a moment reduce for a moment (since switching frequency is very high, thus this
Kind variation is very small progressive formation) rather than constant value.Here it is clear that the output of integrator is stable
It is constant not represent, as long as stable periodic signal can, and cycle meeting of this signal and refer to
Cycle phase of electric current etc. so ensured that within the cycle of each reference current signal, and the average value of input current is all and ginseng
It is equal to examine current average；The output signal and carrier wave of this integrator relatively after will generate the continually changing PWM of duty cycle
Ripple, the open and close of main switch is exactly the driving of this PWM wave again, and under the control of this drive signal, input current is put down
Average will be forced to the average value of track reference current signal.If this is because within a reference current cycle, input
Once current average is more than reference current average value, then the cycle when output signal of integrator would not maintain steady-state operation again
Property, at this point, the last one point in its each cycle will be gradually reduced so that itself and carrier wave relatively after at one with reference to electricity
Flow time reduction total shared by the high level of PWM in the cycle, it is clear that this can to input electricity within a reference current cycle
The average value of stream declines.Vice versa, so PWM wave will necessarily force the average value of input current to be put down without following difference reference current
Average.
The calculating of the relevant parameter in small-power APFC circuits shown in Fig. 2 is described in detail below.
1. switching frequency selects
Inner in most application, switching frequency is typically chosen in the scope of 20kHz to 300kHz.In the implementation of the present invention
In example, f is selecteds=100kHz.
2. the calculating of inductance
1) maximum current peak is：
2) ripple current is：
I=0.2 × IPK=0.2 × 4.849=0.97A
3) duty cycle is：
4) calculating inductance is：
Wherein, Vin(peak) it is input crest voltage, fsFor switching frequency, D is duty cycle, and I is ripple current.3. it calculates
Output capacitance is：
4. select current sense resistor representative value
Current sense resistor both end voltage VVSRepresentative value be 1v.
1) maximum current peak is：
2) resistance value of calculating current detection resistance is：
According to the detection resistance that should actually select 0.2 Ω.
3) calculating actual current detection resistance both ends is：
VVS(pk)=IPK(max)×RS=5.334 × 0.2=1.0667V
Wherein, IPK(max) it is maximum current peak, RSFor the resistance value of current sense resistor.
5. calculating partial pressure resistance RPK1And RPK2
The suitable overload peak value of selection one：
IPK(ovld)=5.8A
And Rpk1Representative value be 10k Ω；Then：
Vrs(ovld)=Ipk(ovld)×RS=5.8 × 0.2=1.16V
Then select 1.5k Ω's.
6. set mlultiplying circuit
1) resistance in feedforward bleeder circuit is determined：
By input voltage VinStructure VRMS voltage root mean square switch to the average value of rectified voltage
Vin(av)=Vin(min) × 0.9=35 × 0.9=31.5V
Input impedance of the 1M Ω resistance as bleeder circuit is often selected, then：
Equation group can obtain R to solution aboveff1=700k Ω, Rff2=717.01K Ω, Rff3=44.89K Ω.
2) resistance R is calculatedvac:
Maximum input line voltage peak value is：
Since multiplier maximum input current is 600 μ A.
Since a resistance bigger than its should not be selected, therefore select Rvac=90k Ω.
3) R is calculatedb1For：
Rb1=0.25 × Rvac=0.25 × 90=22.5 Ω
4) R is calculatedset：
Because chip provides Imo2 times of R cannot be more thansetOn electric current, then：
Then：
5) resistance R is calculatedmo：
In principle when input voltage is minimum, resistance RmoBoth end voltage must be with resistance RsReaching current peak limitation
When both end voltage it is identical：
7. seek design capacitance value CtFor：
Wherein, RsetFor oscillator timing resistor, fsFor switching frequency.
8. Current amplifier compensator
1) first, calculate：
The Δ VrsThe slope of ramp voltage, U are exported for oscillatoroFor output voltage, RSTo sense resistance, L is boosting
Inductance, fsFor working frequency.
This voltage is necessarily equal to VsPeak point current, then error amplifier gain be：
Wherein, VSThe slope of ramp voltage is exported for oscillator.
2) calculating of feedback resistance：
By RciIt is set as and RmoIt is identical, then
Rcz=Gca×Rci=3.19k Ω
Wherein, RciFor feedback resistance definite value.
3) cross-over frequency of current loop is：
Wherein, VOFor output voltage.
4) capacitance is calculated：
5) capacitance CcpSelection, the position of pole necessarily is greater than fs/ 2, then：
Wherein, Ccz、CcpZero compensation capacitance, capacitance CcpSelection, the position of pole is higher than fs/2.In specific example,
The capacitance of 530pF should be selected.
9. the Compensation Design of voltage error amplifier
1) output ripple voltage is：
Wherein, PinFor input power, frFor the frequency of second harmonic Wen Bo.
2) voltage error amplifier ripple voltage is with gain：
Vvao=5-4=1V
3) feedback network calculates：
It is random in the reasonable scope to select Rvi=200k Ω, then feedback network is as follows：
4) calculating full dot frequency is：
10. feed-forward voltage voltage-dividing capacitor calculates：
It calculates：
Wherein, GffFor algorithm value, frFor second harmonic frequency, Cff1、Cff2For divalent RC low-pass filtering capacitances, Rff2、
Rff3For for divalent RC low-pass filtering resistance.
To sum up, small-power APFC circuits according to embodiments of the present invention, can effectively reduce due to power electronic devices
It largely uses and generates a large amount of pollution harmonic waves to the power quality of power grid and the harm generated safely, raising power factor ensures
The operation of electricity net safety stable, while the APFC active power correcting circuits for filling up small-power occasion are short in the market, with
Convenient for one health of structure, clean power network.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means specific features, structure, material or the spy for combining the embodiment or example description
Point is contained at least one embodiment of the present invention or example.In the present specification, schematic expression of the above terms is not
Centainly refer to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be any
One or more embodiments or example in combine in an appropriate manner.
Although an embodiment of the present invention has been shown and described, it will be understood by those skilled in the art that：Not
In the case of departing from the principle of the present invention and objective a variety of change, modification, replacement and modification can be carried out to these embodiments, this
The scope of invention is by claim and its equivalent limits.
Claims (10)
1. a kind of small-power APFC circuits, which is characterized in that including Boost main circuits and control circuit, wherein,
The control circuit includes control chip, for according to default current control mode, by gathering the main electricity of the Boost
Main circuit current and voltage after output voltage, rectification in road, and in the inside of the control chip to the data that collect
Computing and compensation are carried out, final modulated signal is obtained, described in making according to final modulated signal driving power grade metal-oxide-semiconductor
The undistorted no phase following difference input voltage of input current of Boost main circuits.
2. small-power APFC circuits according to claim 1, which is characterized in that it is described to control chip as UC3854 chips,
The UC3854 chips include first to fourth input port and output terminal, wherein,
The first input port is used for Rreceive output voltage signal；
Second input port is used to receive the current signal after rectification；
3rd input port is used for receiving voltage follow current signal；
4th input port is used to receive current error amplified signal；
The output port is used to export control signal to switching tube.
3. small-power APFC circuits according to claim 1, which is characterized in that wherein, the default current control mould
Formula is average current control mode.
4. small-power APFC circuits according to claim 1, which is characterized in that in the APFC circuits, the meter of inductance
It is as follows to calculate formula：
<mrow>
<mi>L</mi>
<mo>=</mo>
<mfrac>
<mrow>
<msub>
<mi>V</mi>
<mrow>
<mi>i</mi>
<mi>n</mi>
</mrow>
</msub>
<mrow>
<mo>(</mo>
<mi>p</mi>
<mi>e</mi>
<mi>a</mi>
<mi>k</mi>
<mo>)</mo>
</mrow>
<mo>&times;</mo>
<mi>D</mi>
</mrow>
<mrow>
<msub>
<mi>f</mi>
<mi>s</mi>
</msub>
<mo>&times;</mo>
<mi>I</mi>
</mrow>
</mfrac>
</mrow>
Wherein, Vin(peak) it is input crest voltage, fsFor switching frequency, D is duty cycle, and I is ripple current.
5. small-power APFC circuits according to claim 1, which is characterized in that in the APFC circuits, output capacitance
Calculation formula it is as follows：
<mrow>
<msub>
<mi>C</mi>
<mi>O</mi>
</msub>
<mo>=</mo>
<mfrac>
<mrow>
<mn>2</mn>
<mo>&times;</mo>
<msub>
<mi>P</mi>
<mi>O</mi>
</msub>
<mo>&times;</mo>
<mi>&Delta;</mi>
<mi>t</mi>
</mrow>
<mrow>
<msup>
<msub>
<mi>V</mi>
<mi>O</mi>
</msub>
<mn>2</mn>
</msup>
<mo>-</mo>
<msup>
<msub>
<mi>V</mi>
<mn>1</mn>
</msub>
<mn>2</mn>
</msup>
</mrow>
</mfrac>
</mrow>
Wherein, POFor bearing power, Δ t holds time for capacitance, VOFor output voltage, V1To maintain the minimum electricity of loaded work piece
Pressure.
6. small-power APFC circuits according to claim 1, which is characterized in that in the APFC circuits, actual current
The voltage at detection resistance both ends is：
VVS(pk)=IPK(max)×RS
Wherein, IPK(max) it is maximum current peak, RSFor the resistance value of current sense resistor.
7. small-power APFC circuits according to claim 1, which is characterized in that in the APFC circuits, design timing
Capacitance is calculated by equation below：
<mrow>
<msub>
<mi>C</mi>
<mi>t</mi>
</msub>
<mo>=</mo>
<mfrac>
<mn>1.25</mn>
<mrow>
<msub>
<mi>R</mi>
<mrow>
<mi>s</mi>
<mi>e</mi>
<mi>t</mi>
</mrow>
</msub>
<mo>&times;</mo>
<msub>
<mi>f</mi>
<mi>s</mi>
</msub>
</mrow>
</mfrac>
</mrow>
Wherein, RsetFor oscillator timing resistor, fsFor switching frequency.
8. small-power APFC circuits according to claim 1, which is characterized in that mended in the Current amplifier of the APFC circuits
It repays in device,
<mrow>
<msub>
<mi>&Delta;V</mi>
<mrow>
<mi>r</mi>
<mi>s</mi>
</mrow>
</msub>
<mo>=</mo>
<mfrac>
<mrow>
<msub>
<mi>U</mi>
<mi>o</mi>
</msub>
<mo>&times;</mo>
<msub>
<mi>R</mi>
<mi>S</mi>
</msub>
</mrow>
<mrow>
<mi>L</mi>
<mo>&times;</mo>
<msub>
<mi>f</mi>
<mi>s</mi>
</msub>
</mrow>
</mfrac>
</mrow>
Wherein, the Δ VrsThe slope of ramp voltage, U are exported for oscillatoroFor output voltage, RSTo sense resistance, L is boosting
Inductance, fsFor working frequency.
The Δ VrsEqual to fsPeak point current, error amplifier gain is：
<mrow>
<msub>
<mi>G</mi>
<mrow>
<mi>c</mi>
<mi>a</mi>
</mrow>
</msub>
<mo>=</mo>
<mfrac>
<msub>
<mi>V</mi>
<mi>S</mi>
</msub>
<mrow>
<msub>
<mi>&Delta;V</mi>
<mrow>
<mi>r</mi>
<mi>s</mi>
</mrow>
</msub>
</mrow>
</mfrac>
</mrow>
Wherein, VSThe slope of ramp voltage is exported for oscillator.
Feedback resistance is：
Rcz=Gca×Rci
Wherein, RciFor feedback resistance definite value.
The cross-over frequency of current loop is：
<mrow>
<msub>
<mi>f</mi>
<mrow>
<mi>c</mi>
<mi>i</mi>
</mrow>
</msub>
<mo>=</mo>
<mfrac>
<mrow>
<msub>
<mi>V</mi>
<mi>O</mi>
</msub>
<mo>&times;</mo>
<msub>
<mi>R</mi>
<mi>s</mi>
</msub>
<mo>&times;</mo>
<msub>
<mi>R</mi>
<mrow>
<mi>c</mi>
<mi>z</mi>
</mrow>
</msub>
</mrow>
<mrow>
<msub>
<mi>V</mi>
<mi>s</mi>
</msub>
<mo>&times;</mo>
<mn>2</mn>
<mi>&pi;</mi>
<mi>L</mi>
<mo>&times;</mo>
<msub>
<mi>R</mi>
<mrow>
<mi>c</mi>
<mi>i</mi>
</mrow>
</msub>
</mrow>
</mfrac>
</mrow>
Wherein, VOFor output voltage.
Calculate zero compensation capacitance：
<mrow>
<msub>
<mi>C</mi>
<mrow>
<mi>c</mi>
<mi>z</mi>
</mrow>
</msub>
<mo>=</mo>
<mfrac>
<mn>1</mn>
<mrow>
<mn>2</mn>
<mi>&pi;</mi>
<mo>&times;</mo>
<msub>
<mi>f</mi>
<mrow>
<mi>c</mi>
<mi>i</mi>
</mrow>
</msub>
<mo>&times;</mo>
<msub>
<mi>R</mi>
<mrow>
<mi>c</mi>
<mi>z</mi>
</mrow>
</msub>
</mrow>
</mfrac>
</mrow>
<mrow>
<msub>
<mi>C</mi>
<mrow>
<mi>c</mi>
<mi>p</mi>
</mrow>
</msub>
<mo>=</mo>
<mfrac>
<mn>1</mn>
<mrow>
<mn>2</mn>
<mi>&pi;</mi>
<mo>&times;</mo>
<msub>
<mi>f</mi>
<mi>s</mi>
</msub>
<mo>&times;</mo>
<msub>
<mi>R</mi>
<mrow>
<mi>c</mi>
<mn>2</mn>
</mrow>
</msub>
</mrow>
</mfrac>
</mrow>
Wherein, capacitance Ccz、CcpFor zero compensation capacitance, wherein CcpThe position of its pole is higher than fs/2。
9. small-power APFC circuits according to claim 1, which is characterized in that put in the voltage error of the APFC circuits
In big device,
Output ripple voltage is：
<mrow>
<msub>
<mi>V</mi>
<mi>O</mi>
</msub>
<mrow>
<mo>(</mo>
<mi>p</mi>
<mi>k</mi>
<mo>)</mo>
</mrow>
<mo>=</mo>
<mfrac>
<msub>
<mi>P</mi>
<mrow>
<mi>i</mi>
<mi>n</mi>
</mrow>
</msub>
<mrow>
<mn>2</mn>
<mi>&pi;</mi>
<mo>&times;</mo>
<msub>
<mi>f</mi>
<mi>r</mi>
</msub>
<mo>&times;</mo>
<msub>
<mi>C</mi>
<mi>o</mi>
</msub>
<mo>&times;</mo>
<msub>
<mi>V</mi>
<mi>o</mi>
</msub>
</mrow>
</mfrac>
</mrow>
Wherein, PinFor input power, frFor the frequency of second harmonic Wen Bo.
Voltage error amplifier ripple voltage is with gain：
<mrow>
<msub>
<mi>G</mi>
<mrow>
<mi>v</mi>
<mi>a</mi>
</mrow>
</msub>
<mo>=</mo>
<mfrac>
<mrow>
<msub>
<mi>V</mi>
<mrow>
<mi>v</mi>
<mi>a</mi>
<mi>o</mi>
</mrow>
</msub>
<mo>&times;</mo>
<mi>%</mi>
<mi>R</mi>
<mi>i</mi>
<mi>p</mi>
<mi>p</mi>
<mi>l</mi>
<mi>e</mi>
</mrow>
<mrow>
<msub>
<mi>V</mi>
<mn>0</mn>
</msub>
<mrow>
<mo>(</mo>
<mi>p</mi>
<mi>k</mi>
<mo>)</mo>
</mrow>
</mrow>
</mfrac>
</mrow>
Wherein, Vvao=5-4=1V；
Random selection R in the reasonable scopevi, then feedback network is as follows：
<mrow>
<msub>
<mi>C</mi>
<mrow>
<mi>v</mi>
<mi>f</mi>
</mrow>
</msub>
<mo>=</mo>
<mfrac>
<mn>1</mn>
<mrow>
<mn>2</mn>
<mi>&pi;</mi>
<mo>&times;</mo>
<msub>
<mi>f</mi>
<mi>r</mi>
</msub>
<mo>&times;</mo>
<msub>
<mi>R</mi>
<mrow>
<mi>v</mi>
<mi>i</mi>
</mrow>
</msub>
<mo>&times;</mo>
<msub>
<mi>G</mi>
<mrow>
<mi>v</mi>
<mi>a</mi>
</mrow>
</msub>
</mrow>
</mfrac>
<mo>;</mo>
</mrow>
Dot frequency is entirely：
<mrow>
<msub>
<mi>f</mi>
<mrow>
<mi>v</mi>
<mi>i</mi>
</mrow>
</msub>
<mo>=</mo>
<msqrt>
<mfrac>
<msub>
<mi>P</mi>
<mrow>
<mi>i</mi>
<mi>n</mi>
</mrow>
</msub>
<mrow>
<msub>
<mi>V</mi>
<mrow>
<mi>v</mi>
<mi>o</mi>
</mrow>
</msub>
<mo>&times;</mo>
<msub>
<mi>V</mi>
<mi>o</mi>
</msub>
<mo>&times;</mo>
<msub>
<mi>R</mi>
<mrow>
<mi>v</mi>
<mi>i</mi>
</mrow>
</msub>
<mo>&times;</mo>
<msub>
<mi>C</mi>
<mi>o</mi>
</msub>
<mo>&times;</mo>
<msub>
<mi>C</mi>
<mrow>
<mi>v</mi>
<mi>f</mi>
</mrow>
</msub>
<mo>&times;</mo>
<msup>
<mrow>
<mo>(</mo>
<mn>2</mn>
<mi>&pi;</mi>
<mo>)</mo>
</mrow>
<mn>2</mn>
</msup>
</mrow>
</mfrac>
</msqrt>
<mo>.</mo>
</mrow>
10. small-power APFC circuits according to claim 1, which is characterized in that in the feed-forward voltage of the APFC circuits
In voltage-dividing capacitor,
<mrow>
<msub>
<mi>G</mi>
<mrow>
<mi>f</mi>
<mi>f</mi>
</mrow>
</msub>
<mo>=</mo>
<mfrac>
<mrow>
<mi>%</mi>
<mi>T</mi>
<mi>H</mi>
<mi>D</mi>
</mrow>
<mrow>
<mn>66.2</mn>
<mi>%</mi>
</mrow>
</mfrac>
</mrow>
<mrow>
<msub>
<mi>f</mi>
<mi>p</mi>
</msub>
<mo>=</mo>
<msqrt>
<msub>
<mi>G</mi>
<mrow>
<mi>f</mi>
<mi>f</mi>
</mrow>
</msub>
</msqrt>
<mo>&times;</mo>
<msub>
<mi>f</mi>
<mi>r</mi>
</msub>
</mrow>
<mrow>
<msub>
<mi>C</mi>
<mrow>
<mi>f</mi>
<mi>f</mi>
<mn>1</mn>
</mrow>
</msub>
<mo>=</mo>
<mfrac>
<mn>1</mn>
<mrow>
<mn>2</mn>
<mi>&pi;</mi>
<mo>&times;</mo>
<msub>
<mi>f</mi>
<mi>p</mi>
</msub>
<mo>&times;</mo>
<msub>
<mi>R</mi>
<mrow>
<mi>f</mi>
<mi>f</mi>
<mn>2</mn>
</mrow>
</msub>
</mrow>
</mfrac>
</mrow>
<mrow>
<msub>
<mi>C</mi>
<mrow>
<mi>f</mi>
<mi>f</mi>
<mn>2</mn>
</mrow>
</msub>
<mo>=</mo>
<mfrac>
<mn>1</mn>
<mrow>
<mn>2</mn>
<mi>&pi;</mi>
<mo>&times;</mo>
<msub>
<mi>f</mi>
<mi>p</mi>
</msub>
<mo>&times;</mo>
<msub>
<mi>R</mi>
<mrow>
<mi>f</mi>
<mi>f</mi>
<mn>3</mn>
</mrow>
</msub>
</mrow>
</mfrac>
</mrow>
Wherein, GffFor algorithm value, frFor second harmonic frequency, Cff1、Cff2For divalent RC low-pass filtering capacitances, Rff2、Rff3
For for divalent RC low-pass filtering resistance.
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|---|---|---|---|
| CN201711372630.1A CN108075657A (en) | 2017-12-19 | 2017-12-19 | Small-power APFC circuits |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711372630.1A CN108075657A (en) | 2017-12-19 | 2017-12-19 | Small-power APFC circuits |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109194113A (en) * | 2018-08-02 | 2019-01-11 | 西安交通大学 | The power factor corrector and its control method for having active power decoupling function |
| CN110829824A (en) * | 2019-10-25 | 2020-02-21 | 东南大学 | Single-cycle PF controller based on Boost circuit |
| CN113872429A (en) * | 2021-09-01 | 2021-12-31 | 南京理工大学 | PFC converter output capacitance value and harmonic wave monitoring device and method |
| US11718193B2 (en) * | 2017-09-05 | 2023-08-08 | The Governing Council Of The University Of Toronto | Electric vehicle power-hub and operating modes thereof |
-
2017
- 2017-12-19 CN CN201711372630.1A patent/CN108075657A/en active Pending
Non-Patent Citations (1)
| Title |
|---|
| 孙静: "基于APFC技术的AC-DC变换器的研究与应用", 《万方数据库》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11718193B2 (en) * | 2017-09-05 | 2023-08-08 | The Governing Council Of The University Of Toronto | Electric vehicle power-hub and operating modes thereof |
| CN109194113A (en) * | 2018-08-02 | 2019-01-11 | 西安交通大学 | The power factor corrector and its control method for having active power decoupling function |
| CN110829824A (en) * | 2019-10-25 | 2020-02-21 | 东南大学 | Single-cycle PF controller based on Boost circuit |
| CN113872429A (en) * | 2021-09-01 | 2021-12-31 | 南京理工大学 | PFC converter output capacitance value and harmonic wave monitoring device and method |
| CN113872429B (en) * | 2021-09-01 | 2024-04-02 | 南京理工大学 | PFC converter output capacitance value and harmonic monitoring device and method |
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