CN100477099C - Clapboard for dividing semiconductor wafer - Google Patents
Clapboard for dividing semiconductor wafer Download PDFInfo
- Publication number
- CN100477099C CN100477099C CNB2004800435898A CN200480043589A CN100477099C CN 100477099 C CN100477099 C CN 100477099C CN B2004800435898 A CNB2004800435898 A CN B2004800435898A CN 200480043589 A CN200480043589 A CN 200480043589A CN 100477099 C CN100477099 C CN 100477099C
- Authority
- CN
- China
- Prior art keywords
- cut
- line
- dividing plate
- group
- distance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/6735—Closed carriers
- H01L21/67396—Closed carriers characterised by the presence of antistatic elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/6735—Closed carriers
- H01L21/67369—Closed carriers characterised by shock absorbing elements, e.g. retainers or cushions
Abstract
A separator of semiconductor wafers (10) is made from polyethylene with a dissipative material and includes a first and second set of embossed cut parallel lines. The first set is typically parallel to the second set; and each set includes pairs of cut lines which are spaced from adjacent pairs. The depth of grid lines cut into the material allows air flow, circulation and vacuum release.
Description
As the partial continuous application, the sequence number that the application requires on July 13rd, 2004 to propose is the priority of 60/587,884 provisional application.
Technical field
The present invention relates to semiconductor wafer packing and transportation dividing plate.
Background technology
When semiconductor wafer transports,, between adjacent chip, use dividing plate usually for static and the mechanical stability that keeps wafer.A kind of wafer separator of prior art is used embossed grid pattern.Though this dividing plate is satisfactory in many aspects, however semiconductor wafer and dividing plate in the multi-tank container time, and wherein wafer and dividing plate can stick together.This can form " wafer cake " shape, and coherent wafer and spacer blocks are difficult to separately.When attempting that wafer can be caused broken wafers when dividing plate separates.This manual usually carrying out is not used the device of unpacking automatically.This problem may be that the lattice by mold pressing on the dividing plate causes.Wafer is during by vacuum packaging, and each independent grid plays the effect that is similar to small sucker on the grid.
Summary of the invention
In order to overcome above-mentioned deficiency, dividing plate is provided with line image, is generally two groups of vertical each other lines.This allows air flows and circulation.This also is used to remove vacuum.
Dividing plate is generally polyethylene, is impregnated with consumptive material, and makes circle, and many different-diameters can be arranged.
Description of drawings
Also pass through accompanying drawing by following description and claim, other purpose of the present invention and advantage can be very clear.Wherein:
Fig. 1 is the plane graph of wafer separator of the present invention.
Fig. 2 is the partial enlarged drawing of Fig. 1.
Embodiment
Fig. 1 is the plane graph of circular wafer separator 10 of the present invention.In fact wafer separator 10 can be Any shape and specification, but the diameter of circular wafer separator 10 is 4,5,6,8 or 12 inches.
Therefore, aforesaid several purpose and advantage have been obtained most effectively.Though only disclose and described a preferred embodiment of the present invention in detail at this, should be appreciated that never therefore the present invention is restricted, and should be indicated in the appended claims.
Claims (7)
1. dividing plate of separating semiconductor wafer, this dividing plate is made up of the static consumptive material, and comprise line of cut, wherein the two ends of line of cut terminate on the periphery of described dividing plate, described line of cut is designed to first group of line of cut and second group of line of cut, and wherein said first group of line of cut is perpendicular to second group of line of cut.
2. dividing plate as claimed in claim 1, wherein said first group and second group of line of cut are designed to paired line of cut, wherein giving the line-spacing of alignment centering is first distance, and the right spacing of adjacent lines is second distance, and wherein said first distance is different with described second distance.
3. dividing plate as claimed in claim 1, wherein said line of cut cut into enough dark so that air flows, circulation and releasing vacuum.
4. dividing plate as claimed in claim 1, wherein said dividing plate is circular.
5. dividing plate as claimed in claim 1, wherein said dividing plate is made up of polythene material.
6. dividing plate as claimed in claim 1, wherein, described line of cut is the cutting parallel lines, described cutting parallel lines are paired, so that the distance between centers of tracks of line centering is 0.036 inch, the spacing that adjacent lines is right is 0.208 inch.
7. dividing plate as claimed in claim 1, wherein, described line of cut is continuous.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US58788404P | 2004-07-13 | 2004-07-13 | |
US60/587,884 | 2004-07-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1989599A CN1989599A (en) | 2007-06-27 |
CN100477099C true CN100477099C (en) | 2009-04-08 |
Family
ID=35839547
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004800435898A Active CN100477099C (en) | 2004-07-13 | 2004-08-17 | Clapboard for dividing semiconductor wafer |
Country Status (3)
Country | Link |
---|---|
CN (1) | CN100477099C (en) |
MY (1) | MY139640A (en) |
WO (1) | WO2006016883A1 (en) |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5183699A (en) * | 1989-08-01 | 1993-02-02 | Mitsui Toatsu Chemicals, Inc. | Wafer processing films |
US5091229A (en) * | 1989-10-13 | 1992-02-25 | E. I. Du Pont De Nemours And Company | Electronics protective packaging film |
US20020192432A1 (en) * | 2001-05-07 | 2002-12-19 | Vermillion Robert J. | Dissipative layer suitable for use in protective package |
US6723143B2 (en) * | 1998-06-11 | 2004-04-20 | Honeywell International Inc. | Reactive aqueous metal oxide sols as polishing slurries for low dielectric constant materials |
US6550619B2 (en) * | 2000-05-09 | 2003-04-22 | Entergris, Inc. | Shock resistant variable load tolerant wafer shipper |
US7425362B2 (en) * | 2002-09-06 | 2008-09-16 | E.Pak International, Inc. | Plastic packaging cushion |
-
2004
- 2004-08-17 WO PCT/US2004/026697 patent/WO2006016883A1/en active Application Filing
- 2004-08-17 CN CNB2004800435898A patent/CN100477099C/en active Active
-
2005
- 2005-02-21 MY MYPI20050653 patent/MY139640A/en unknown
Also Published As
Publication number | Publication date |
---|---|
MY139640A (en) | 2009-10-30 |
CN1989599A (en) | 2007-06-27 |
WO2006016883A1 (en) | 2006-02-16 |
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Legal Events
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |