CN100469035C - Multi-bus automobile communication control module based on TCN - Google Patents

Multi-bus automobile communication control module based on TCN Download PDF

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Publication number
CN100469035C
CN100469035C CNB2006100318791A CN200610031879A CN100469035C CN 100469035 C CN100469035 C CN 100469035C CN B2006100318791 A CNB2006100318791 A CN B2006100318791A CN 200610031879 A CN200610031879 A CN 200610031879A CN 100469035 C CN100469035 C CN 100469035C
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interface
bus
control module
memory
multibus
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CN1889494A (en
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吴正平
曾嵘
杨卫峰
易伟民
姚晓阳
曹洋
任湘辉
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Zhuzhou CRRC Times Electric Co Ltd
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Zhuzhou CSR Times Electric Co Ltd
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Abstract

A vehicle communication control module of multibus based on TCN consists of CPU processor, internal memory, reset circuit, LED, clock circuit, temperature control circuit, alarm circuit and power supply circuit. It is featured as connecting CPU processor to FPGA being connected with storage and CAN bus interface as well as MVB bus interface, connecting MVB bus interface to CPU processor through buffer and connecting CPU processor to universal communication interface.

Description

A kind of multibus vehicle communication control module based on TCN
Technical field
The present invention relates to a kind of railway traffic Communication Control Technology, particularly relate to a kind of multibus vehicle communication control module based on TCN.
Background technology
Existing vehicle communication control module or unit based on the TCN network mainly adopts casing structure, realize bus management and controlled function, will use plug-in units such as power supply, processor, bus manager at least, make system very complicated, the cost height, the power consumption height, volume is big.Like product mainly has the following disadvantages at present: limited of (1) communication function has satisfied the vehicle communication control module basic function based on TCN, there are not communication interfaces such as Ethernet, USB, the demand of the interior multiple fieldbus while of vehicle and the shape of depositing cash can not be satisfied, the requirement of high speed data transfer can not be satisfied; (2) for the control of bus manager and vehicle, real-time requires high processing speed slowly, and adopts the processor of tens Mhz to be difficult to satisfy the requirement of real time communication and control; (3) the too little design of memory space owing to the traditional NAND FLASH+SRAM of employing, the capacity that makes can't strengthen, and failure diagnosis and record can not satisfy existing requirement relatively; (4) power consumption is big, and volume is big because plug-in unit quantity is many, and does not adopt the Design of power saving technology, makes power consumption big, and volume can't dwindle; On the structure, even adopt casing structure or adopt modularization, but be to develop from standard 3U and 6U plug-in unit, bulky, weight is heavier, and inconvenience is installed, and the dismounting of plug-in unit is also extremely difficult.
Summary of the invention
The objective of the invention is to overcome deficiency of the prior art, provide a kind of speed of service fast, communication function is complete, and memory space is big, and is low in energy consumption; The multibus vehicle communication control module that volume is little based on TCN.
Purpose of the present invention is achieved by following technical proposals: comprise the CPU processor, the memory that is electrically connected with the CPU processor, reset circuit, LED, clock circuit, temperature control circuit, warning circuit, power circuit, described CPU processor also is connected with FPGA (field programmable gate array), described FPGA and memory, the MVB bus interface, the CAN bus interface connects, described MVB bus interface also is connected with the CPU processor by buffering, described FPGA also is connected with the CAN bus interface, described CPU processor also is connected with Generalized Communication Interface, and described MVB bus interface is connected with FPGA and CPU.
Described CAN bus interface can be made up of the level shifting circuit that CAN protocol processor and band are isolated, and level shifting circuit designs and produces at one independently on the pcb board.The MVB bus interface is by MVB communication controler, communication memory TM, cpu i/f buffering, FPGA and MVB bus physical layer interface, and FPGA realizes the bus arbitration composition, by the MVB bus management program is copied to and moves among the CPU SDRAM to improve processing speed; MVB level conversion design is at one independently on the pcb board, realizes MVB different medium (ESD/EMD/OGF) and need not revise the pcb board design.Generalized Communication Interface is too network interface, USB interface, universal serial bus RS232/RS422/RS485 interface.The CPU processor should be selected built-in multiple communication interface for use, and the SDRAM bus separates, is with the built-in network processor of data command Catch with external bus.Memory is program storage, state information and fault message memory by procedure division, and the medium of memory is NOR FLASH memory or NAND FLASH memory or their combination.
Compared with prior art, the present invention has the following advantages: speed is fast, and is multiple functional, and memory space is big, and equipment volume is little, and low cost is convenient to user program, and application layer and bottom software are made a distinction, and particularly can realize the graphical user programming.Be applicable to vehicle grade control, failure diagnosis and the telecommunication management of locomotive/vehicle, also applicable to association areas such as subway train or industrial automations.
Description of drawings
Fig. 1 is a theory diagram of the present invention;
Fig. 2 is one embodiment of the invention structured flowchart.
Embodiment
The invention will be further described below in conjunction with drawings and Examples:
With reference to Fig. 1, the present invention includes CPU processor 1, the internal memory 2 that is electrically connected with CPU processor 1, reset circuit 3, LED4, clock circuit 5, temperature control circuit 6, warning circuit 7, power circuit 8, described CPU processor 1 also is connected with FPGA10, described FPGA10 is connected with memory 9, CAN bus interface 12, MVB bus interface 11, described MVB bus interface 11 also directly is connected with CPU processor 1, and CPU processor 1 also is connected with Generalized Communication Interface 13.
With reference to Fig. 2, present embodiment is connected with reset circuit 3 on CPU processor 1, LED4, clock circuit 5, temperature control circuit 6, warning circuit 7, power circuit 8, the internal memory 2 that is connected with CPU processor 1 is SDRAM or SRAM2-1, the memory 9 that is connected with CPU processor 1 is NOR FLASH9-1 and NAND FLASH 9-2 combination, and the Generalized Communication Interface 13 that is connected with CPU processor 1 has RS485/RS422 interface 13-1, usb 1 3-2, serial ports 13-3 and Ethernet interface 13-4.CPU processor 1 all is connected with FPGA 10 with memory 9, has connected MVB bus interface 11 and CAN bus interface 12 on FPGA 10.
CPU processor 1: select the at present popular in the world Xscale of Intel Company nuclear built-in network processor IXP425 for use, its dominant frequency reaches as high as 533MHz, it is the very high SOC (system on a chip) SOC chip of a cost performance, its main interface has: pci interface, UTOPIA interface, USB interface, high speed serial ports, universal serial port, sdram interface, JTAG debug port and a plurality of universaling I/O port, resources such as the Instructions Cache of inner also integrated No. four timers, 32K and metadata cache; Its core voltage is low to moderate 1.3V, and power consumption only is 2W when high-speed cruising; Have 266MHz, 400MHz, three kinds of configurable speed of 533MHz, be specially adapted to based on network control system.
LED4: four general status indication lamps are set, are used to indicate CPU processor running status, MVB network state, fault to show, and the indication of user application running status, status indicator lamp is driven by the GPIO mouth buffering of CPU.
Clock circuit 5: select clock apparatus RTC for use, the data record when being used to system clock and failure diagnosis are set etc.RTC selects the chip of serial line interface for use, inserts the CPUGPIO mouth by SPI or IIC, and the RTC battery adopts the electric capacity backup mode.
Temperature control circuit 6: be used to measure the air themperature of VCM inside, and insert the CPUGPIO mouth, in order to faults such as monitoring VCM over-heat insides by SPI or IIC agreement.
Warning circuit 7: a warning output relay is set,, is used for externally indicating the malfunction of VCM by the GPIO mouth buffering driving of CPU.Module working power and alarm relay output are drawn by panel X7, and this socket has the advantages that electric current is big, be convenient to the PCB installation, for railway systems are selected for use first.
Power circuit 8: power circuit provides 5V, 3.3V, 2.5V, 1.3V power supply for whole VCM.Form by DC/DC switch power module and low pressure difference linear voltage regulator chip.Module working power voltage scope is DC24V ~ 137V, and rated output power is 12W.The power supply input stage is provided with current inrush limiter and backup electric capacity.The power interruptions tolerance time is greater than 10ms, and provides the power fail interrupt index signal to cpu subsystem.
FPGA10: form by FPGA and corresponding configuration circuit, be used to realize the agreement control of MVB, CAN, NAND FLASH etc. and the arbitration of management and various buses.
MVB bus interface 11:MVB bus interface is one of core of VCM, for VCM provides interface channel with the MVB bus.It comprises communication memory TM, cpu i/f buffering and control logic and the MVB bus physical layer interface of MVB communication controler, 1M byte.Realize the gateway interface of MVB bus management and realization CAN, Ethernet, external interface adopts 3 DIN41652 standard 9 core D connectors, and pinout meets the regulation of TCN standard, and X1-X3 draws by panel, and wherein X3 downloads usefulness for carrying out the bus supervision with program.
CAN bus interface 12: Controller Area Network BUS CAN, forms by CAN protocol processor special chip or by the level shifting circuit that FPGA and band are isolated, realize CAN bus management and and the gateway interface of MVB, Ethernet.The CAN interface is drawn by VCM panel X4 DIN41652 standard 9 core D connectors.
Reset circuit 3: mainly realize power monitoring, guarantee CPU electrifying timing sequence and software monitors function, guarantee that software normally moves, in time " waking up " CPU enters reset mode when software " race flies " occurring or crashing.
Memory 9: adopting NAND FLASH memory is technical innovation and breakthrough, and the past is only adopted NOR FLASH memory.The memory of present embodiment is made up of NOR FLASH and NAND FLASH, and wherein NOR FLASH is as program storage and failure logging usefulness, and every NOR FLASH capacity is 16MB, is made up of multi-disc.NAND FLASH is used for fault record record usefulness, and capacity 16MB ~ 1GB is Train Control field utilization first.Because of NAND FLASH time sequential routine complexity, so by GPIO or FPGA simulated timing diagrams.
Internal memory 2:SDRAM or SRAM: capacity is 64~256MB, needn't change design when using different capabilities SDRAM.Operate in the clock frequency of 133MHZ.IXP425 provides sdram controller, can meet 4 SDRAM at most.Real time operating system RTOS copies to BOOT reflection and RTOS application image among the SDRAM and to carry out after internal memory initialization.
Generalized Communication Interface 13: Ethernet interface is arranged, serial bus interface, USB interface and RS485/RS422 interface can satisfy the needs of at present popular various input/output interfaces.
Ethernet interface 13-4: draw by RJ45 Industrial Ethernet connector, realize the conversion of MVB device, CAN device, be beneficial to high speed data transfer to Ethernet; Debugging and interface such as fault data download, can download, monitor the CPU running status and the fault record data be downloaded to equipment such as PC or vehicle-mounted supervision.
Serial bus interface 13-3: serial line interface is made up of CPU and serial ports level shifting circuit, and the VCM device debugging terminal interface mainly as based on PC is used for debug functioies such as the download of bottom program, supervision, and baud rate is 115.2Kbps to the maximum.
Usb 1 3-2: be made up of CPU and interface circuit, realize PC and movable memory equipment such as USB flash disk, USBdisk is connected with VCM's, thus functions such as the program download of realization VCM, parameter setting, the download of fault record data.
RS485/RS422 interface 13-1: a band photoelectricity isolation RS 485/RS422 interface is provided, the communication interface that provides based on multiple spot RS485/RS422 standard agreement is provided, be convenient to be connected with three method, apparatus, baud rate is 1Mbps to the maximum.This interface is drawn from the VCM panel through X5, X6DB9 plug.
Operation principle of the present invention: CPU processor 1 is the whole communication supervisory core of vehicle communication control module, on the one hand the communication bus of Generalized Communication Interface 13, MVB bus interface 11, CAN bus interface 12 is implemented management, realize gateway function, promptly realize exchanges data and resource-sharing between each field bus device by above-mentioned communication bus.Be sent to other field apparatuss where necessary after the information of each field apparatus that will collect is handled on the other hand, realize control, diagnosis, demonstration, and relevant information is stored in the memory 9 whole system.By above-mentioned fieldbus particularly USB and Ethernet, easily information material is downloaded to PC and other Ground Processing Systems and carry out analyzing and processing.FPGA 10 participates in communication protocol at this and handles and realize bus arbitration to each chip chamber of inside modules.Above-mentioned field bus device has also comprised display and other actuators except comprising various I/O modules.

Claims (8)

1. multibus vehicle communication control module based on TCN, comprise the CPU processor, the memory, reset circuit, LED, clock circuit, temperature control circuit, warning circuit, the power circuit that are electrically connected with the CPU processor, it is characterized in that: described CPU processor also is connected with FPGA, described FPGA also is connected with memory, MVB bus interface, CAN bus interface, described CPU processor also is connected with Generalized Communication Interface, and described MVB bus interface is connected with the CPU processor by buffering.
2. the multibus vehicle communication control module based on TCN according to claim 1 is characterized in that: described CAN bus interface isolate by CAN protocol processor and band and be produced on one independently the level shifting circuit on the pcb board form.
3. the multibus vehicle communication control module based on TCN according to claim 1 and 2, it is characterized in that: described MVB bus interface is by MVB communication controler, communication memory TM, cpu i/f buffering and be used to realize that the FPGA of bus arbitration forms, and MVB bus management program copies among the CPU SDRAM to be moved.
4. the multibus vehicle communication control module based on TCN according to claim 1 and 2 is characterized in that: described Generalized Communication Interface has Ethernet interface, USB interface and universal serial bus RS232/RS422/RS485 interface.
5. the multibus vehicle communication control module based on TCN according to claim 3 is characterized in that: described Generalized Communication Interface has Ethernet interface, USB interface and universal serial bus RS232/RS422/RS485 interface.
6. the multibus vehicle communication control module based on TCN according to claim 4 is characterized in that: described CPU processor is built-in multiple communication interface, SDRAM bus separate, are with data command Cache with external bus a built-in network processor.
7. the multibus vehicle communication control module based on TCN according to claim 5 is characterized in that: described CPU processor is built-in multiple communication interface, SDRAM bus separate, are with data command Cache with external bus a built-in network processor.
8. the multibus vehicle communication control module based on TCN according to claim 6, it is characterized in that: described memory is program storage, state information and fault message memory by procedure division, and the medium of described memory is NORFLASH memory or NAND FLASH memory or their combination.
CNB2006100318791A 2006-06-26 2006-06-26 Multi-bus automobile communication control module based on TCN Active CN100469035C (en)

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