CN100468642C - Method for forming a photoresist pattern - Google Patents
Method for forming a photoresist pattern Download PDFInfo
- Publication number
- CN100468642C CN100468642C CNB2004800442533A CN200480044253A CN100468642C CN 100468642 C CN100468642 C CN 100468642C CN B2004800442533 A CNB2004800442533 A CN B2004800442533A CN 200480044253 A CN200480044253 A CN 200480044253A CN 100468642 C CN100468642 C CN 100468642C
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- China
- Prior art keywords
- semiconductor wafer
- photoresist
- desorb
- heating
- condensable species
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/16—Coating processes; Apparatus therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
Abstract
A method for forming a photoresist pattern includes placing a semiconductor wafer having condensable species in a chemically filtered photolithography system and desorbing the chemical species from the semiconductor wafer in the chemically filtered photolithography system. After desorbing the chemical species, photoresist is applied to the semiconductor wafer in the chemically filtered photolithography system. Next, the photoresist is exposed to energy to form a photoresist pattern in the chemically filtered photolithography system.
Description
Technical field
Generality of the present invention relates to formation photoresist pattern, more particularly, relates to and removes condensable species to form the photoresist pattern.
Background technology
A kind of common method that forms the feature of semiconductor device is to form the photoresist pattern on the semiconductor device and duplicate this pattern in bottom.The productive rate that any defective in this photoresist pattern all will be transferred to this bottom and may cause reducing.Therefore, to have minimum defective when comprising required pattern be important to the photoresist pattern.Contingent a kind of defective is the disappearance of circuit or part circuit in the arrangement of large-scale dense wire, and this can undesirably reduce productive rate.
Usually, defective is because the pollution in the processing forms.In order to reduce this pollution, before the deposition photoresist, carry out ash treatment usually with clean semiconductor wafer.Yet, still often disappearance all with the part circuit.Therefore, be necessary to prevent that the disappearance circuit is to improve productive rate in the arrangement of large-scale dense wire.
Summary of the invention
The inventor has been found that part circuit or whole circuit lack self owing to dye the resist poisoning that causes at place on line by molecule gas dirt-carrying from large-scale dense arrangement.The condensable species that exists neutralizes acid, and is exposed to radiation following time when photoresist, and by reducing photochemically reactive amplification, it causes the resist poisoning.Though prior art utilizes ash treatment that organic class material and condensable species are removed from semiconductor wafer, the inventor has been found that this ash treatment is inadequate.In addition, the inventor believes semiconductor wafer is contained in the container, for example among the Standard Mechanical Interface (SMIF Pod), to be not enough to prevent in close quarters all or part of circuit of disappearance, enter this container because cause that non-required condensable species that resist is poisoned may be leaked.If this semiconductor wafer (one or more) is retained in and does not have processed longly more with the time that applies photoresist layer in the container, then this problem will become more and more serious.
Description of drawings
The present invention is illustrated and is not limited to accompanying drawing by way of example, and same mark is represented same element in these accompanying drawings.
The production procedure of accompanying drawing 1 explanation formation according to an embodiment of the present invention photoresist pattern.
Those skilled in the art will understand, and show the element in the accompanying drawing for simplification with for the purpose of knowing, and be not necessarily to scale.For example, with respect to other element, some size of component in the accompanying drawing may be amplified to help the understanding of promotion to embodiment of the present invention.
Embodiment
In order to prevent the impressionability of circuit, desorb condensable species and semiconductor wafer not being exposed under the environment that can form condensable species in the environment of chemical filtering is deposited on photoresist on this semiconductor wafer.By can understand the more detailed situation of this method better by means of the one embodiment of the invention shown in Fig. 1.
At first, semiconductor wafer 12 is exposed under the plasma environment, this step is an ash treatment 14 in one embodiment.The wafer that this semiconductor wafer 12 can be a virtually any size (for example, 200 or 300 millimeters wafer) and can be the wafer of any kind, for example silicon (SOI) on monocrystalline silicon, gallium germanium, the insulator etc., and the combination of the above-mentioned type.In addition, use therein in the manufacturing process of semiconductor device of photoresist layer, this semiconductor wafer 12 can be in any one stage.For example, this semiconductor wafer 12 can be in wherein needs photoresist layer to form the stage of circuit or grid.Therefore, this semiconductor wafer 12 can have many layers and even may make semiconductor device thereon with its in form.
In ash stage 14, use oxygen plasma to remove organic and condensable species.Prior art thinks that this processing has prevented that molecule gas dirt-carrying from dying, yet the inventor has been found that condensable species shows and deposits on the semiconductor wafer when transferring to semiconductor wafer in the lithographic equipment.In addition, even should the ash subset be the part of this lithographic equipment, condensable species still may form on semiconductor wafer, still may be required with this type of material desorb therefore.If the time interval between ash stage 14 and first heating process 16 subsequently is oversize (for example, greater than about six hours or greater than about four hours), so because after ash stage 14, in during semiconductor wafer 12 waits, may form too many pollutant on the semiconductor wafer 12, may be required so repeat this ash stage 14.
As used herein, condensable species can be any gas-carrying molecule of handling with the chemical mode disturb lithography.Condensable species can distinguish over the material that is called particle at this.Particle is the material handled of disturb lithography mechanically.Usually, particle is on semiconductor wafer, because their equipment or other devices from manufacturing environment drop on the semiconductor wafer.Condensable species comprises dioctyl phthalate (DOP), and its chemical formula is C
6H
4(COOC
8H
17)
2, structure can be as follows:
In addition, condensable species can comprise amine, and for example (its chemical formula is NH to ammonia
3), perhaps (its chemical formula is C to N-N-methyl-2-2-pyrrolidone N-(NMP)
5H
9And can represent NO), by following structure:
In addition, the chemical substance that condensable species can comprise other is siloxanes for example, and this siloxanes has the silicon alternately and the skeleton of oxygen atom.Organic group, for example methyl, phenyl or vinyl can be connected on the silicon.For example, poly-di-ethyl siloxane is a kind of siloxanes.
For this condensable species of thermal desorption, semiconductor wafer is put into the environment 10 of chemical filtering, the environment of this chemical filtering is lithographic equipment in one embodiment, this lithographic equipment is with the air in the chemical mode filter plant, so that the environment of the air ratio lithographic equipment outside in this equipment is purer.When in the environment 10 at chemical filtering, semiconductor wafer 12 is exposed to first heating process 16 times, this process can be called prebake.In one embodiment, this heating process 16 is more than or equal to about 150 ℃, perhaps more particularly, and more than or equal to about 170 ℃, perhaps even more particularly, more than or equal to carrying out under about 180 ℃ temperature.Yet, may be unwanted greater than about 180 ℃ temperature, because the raising of temperature may not can provide any improvement, may need more multipotency on the contrary non-requiredly, and therefore may improve manufacturing cost.Therefore, in one embodiment, the temperature that is used to heat is about 150 to 180 ℃, perhaps more particularly, is about 170 to 180 ℃.In one embodiment, utilize heating plate to heat this semiconductor wafer 12 in this all heating period, and the temperature of defined is near the temperature of measuring heating plate place or heating plate.The time span that is used for heating can be selected based on the selection of time in other stage of this processing.For example, if other semiconductor wafer transferred to another stage in this processing after about 60 seconds, so about 60 seconds is required.In one embodiment, these 60 seconds is that chamber roughly is in the time under the constant temperature; In other words, do not comprise the rising stage and the decrement phase of temperature in these 60 seconds.If possible, approximately equate the processing stage of adjusting to the time of heating process with other, this will make semiconductor wafer 12 need not wait for the next stage after the heating period, prevent heating process in addition because be bottleneck (that is the slowest stage) in the process and the overall process that slows down.
After first heating period 16, may need cooling stage 17.Used lithographic equipment can have the robots arm (" hot robots arm ") that can be used for taking out or placing semiconductor wafer 12 in the hot cell, and another can be used for taking out or placing the robots arm (" cold robots arm ") of semiconductor wafer 12 in cooling chamber.Though this hot robots arm can enter the chamber that is used for the heating period 16, but this lithographic equipment can prevent hot robots arm and enter the chamber that is used for adhesion stage 18, may be a kind of danger because allow hot semiconductor wafer 12 be in the chamber that is used for adhesion stage 18.(on being deposited on hot semiconductor wafer the time, this adhesive layer may be volatile.) therefore, cooling stage 17 can be used to cool off this semiconductor wafer 12.Hot robots arm should be able to transfer to the chamber that is used for cooling stage 17 with semiconductor wafer 12 from the chamber that is used for the heating period 16.Then, cold robots arm can transfer to adhesion stage 18 with the semiconductor wafer of cooling.In one embodiment, the cooling of the semiconductor wafer that is cooled is reached up to it be approximately room temperature (about 21 ℃).In one embodiment, with about 45 seconds of semiconductor wafer 12 coolings.In one embodiment, carry out all cooling stages at this by using coldplate or chill plate.Yet, as the heating period 16, can select time to adapt to concrete whole photoetching processes.
After with semiconductor wafer 12 coolings, in one embodiment, semiconductor wafer 12 is transferred to adhesion stage 18 by robots arm's (it is likely cold robots arm).During adhesion stage 18, pre-resist coating or adhesive layer are deposited on the semiconductor wafer 12 to improve adhesiveness.In one embodiment, this adhesive layer is silanization silane coupling agent (primingagent), for example hexamethyldisiloxane (HMDS).Chemical reaction takes place to remove any surperficial OH base in HMDS.Because reacting with formation, the existence of heat, HMDS and oxygen be keyed to trimethyl silyl (Si[CH on the semiconductor wafer 12
3]
3).In one embodiment, the temperature of adhesion stage 18 is approximately 100 ℃ or higher, for example about 120 ℃.In one embodiment, this adhesion stage is approximately 50 to 70 seconds, perhaps preferably approximately 60 seconds.
On semiconductor wafer 12, form after the adhesive layer, can be with the fusion of semiconductor wafer 12 coolings with the photoresist that prevents to bubble and apply subsequently.Therefore, in one embodiment, semiconductor wafer 12 is transferred to the chamber that is used for second cooling stage 20 by cold robots arm.In one embodiment, semiconductor wafer 12 is cooled off about 45 seconds to being approximately room temperature.
After cooling, for example, by this robots arm a kind of semiconductor wafer 12 is transferred to resist and apply the stage 22.In one embodiment, apply the stage 22, resist is spun on the semiconductor wafer 12 at resist.With after resist solution is from distributor 23 paint semiconductor wafers 12, rotation or rotate semiconductor wafer 12 with this resist equably on the whole semiconductor wafer 12 of paint.It is dry basically up to photoresist to continue rotation.If produce the bead of dry photoresist, photoresist that should drying should be removed to avoid bead to peel off and to produce the particle that may cause pollution problem along the periphery of this semiconductor wafer 12.In one embodiment, the photoresist that can use chemistry to amplify, for example deep ultraviolet (DUV) resist.In addition, can use ESCAP (photoresist of the chemical modification of environmentally safe/stable); Yet, can use any photoresist material.
After applying photoresist, for example, semiconductor wafer 12 was transferred to for second heating period 24 by the robots arm, this stage can be called soft baking or apply after cure.Carry out soft baking so that molecule crosslinked in the photoresist.This soft baking can also be removed any solvent from photoresist, and can improve the adhesiveness of photoresist by the stress in the reduction photoresist.In one embodiment, under about 130 ℃ temperature, carried out soft baking about 60 seconds; Yet, can use other temperature and time.
Because a variety of causes, for example handle easily, soft baking after, semiconductor wafer 12 can be cooled off so that it temperature can be not too high in processing subsequently.Therefore, semiconductor wafer 12 can be transferred to the chamber that is used for the 3rd cooling stage 26.In one embodiment, semiconductor wafer 12 is cooled off about 45 seconds to being approximately room temperature.
In one embodiment, use every next zone of step photo-etching machine or scan-type mask aligner with semiconductor wafer 12 location and exposure.For example, in specific region (so-called light shield (reticle) zone) with semiconductor wafer 12 location and exposure, then step photo-etching machine stage or scan-type mask aligner stage with mobile semiconductor wafer 12 to the suitable part of equipment so that locate and the different zone of exposing.Therefore, in case this step photo-etching machine is with semiconductor wafer 12 location, then subsequently with semiconductor wafer 12 exposures.
In location and exposure stage 30, mask 31 is placed on semiconductor wafer 12 tops, based on the pattern of this mask 31, use radiation with resist exposure.Radiation produces photochemical reaction or conversion in photoresist.If produced the resist poisoning, the amplification of this reaction will reduce.This radiation can be any required radiation, and for example wavelength is the light of 248 or 193 nanometers.After the regional exposure with semiconductor wafer 12 in step photo-etching machine, this step photo-etching machine moves this mask with another (common adjacency) part exposure with semiconductor wafer 12 with respect to semiconductor wafer 12 then.In location and exposure stage 30, reuse the grid of step photo-etching machine with final generation exposed areas.
After all required regional exposures with semiconductor wafer 12, carried out for the 3rd heating period 32, this stage can be called post exposure bake.Post exposure bake excites acid catalysts is to form sub-image in photoresist.In one embodiment, post exposure bake carried out under about 130 ℃ temperature about 60 seconds.
In post exposure bake, form after the sub-image, can be with semiconductor wafer 12 coolings.Therefore, semiconductor wafer 12 can be transferred to the chamber that is used for the 4th cooling stage 34.In one embodiment, semiconductor wafer 12 is cooled off about 45 seconds to being approximately room temperature.
In order to make sub-image become final image in the photoresist, after in the 4th cooling stage 34, being cooled, semiconductor wafer 12 experience development phase 36.In one embodiment, use the spray developing system to carry out development phase 36, wherein nozzle 37 is ejected into developer 39 on the semiconductor wafer 12 of rotation.Though do not illustrate, after development phase 36, can carry out subsequently flushing, drying and heating process to remove developer.
Form after the final image in photoresist, semiconductor wafer 12 can leave the environment 10 of chemical filtering.In one embodiment, be satisfactory in order to confirm final image, (ADI) 40 checked in the back of developing.During ADI40, for example light microscope, scanning electron microscopy (SEM) or laser system are checked this photoresist pattern can to use equipment.The feature of the photoresist that can during checking determine comprises quality, picture quality and the defective of film.For example, can check that the arrangement of dense wire is to determine whether to lack any circuit or part circuit.If the result of this photoetching process is acceptable (for example, all circuits all is present in the dense arrangement), then semiconductor wafer 12 is passed on so that carry out following process, will making with photoresist in following process, pattern comes etching bottom.If opposite, pattern is unacceptable, can remove (peeling off) this photoresist layer and repeat this photoetching process.
Till now, should be appreciated that to provide and be used for the method for thermal desorption airborne contaminant (for example, condensable species) on the spot.In addition, handle this semiconductor wafer in nonpollution environment, this reduces or has eliminated the potential possibility of the disappearance circuit that is caused by pollution greatly.The decline of disappearance circuit (or other photoengraving pattern or part pattern) aspect has improved productive rate.
In above-mentioned specification, invention has been described with reference to specific embodiment.Yet what those of ordinary skills can understand is under the situation of the scope of listing in the claim below not breaking away from of the present invention, can make various modifications and change.Therefore, should think that this specification and accompanying drawing are illustrative and not restrictive, and all such modifications will be included in the scope of the present invention all.About specific embodiment, benefit, other advantage and the solution of problem are described above.Yet, may make any benefit, advantage or solution become or the solution of become more significant benefits, advantage, problem and any factor (one or more) all can not be thought conclusive, that need or the basic key element or the factor of each or all authority requirement.
In addition, the term " front " in specification and the claim, " back side ", " top ", " bottom ", " on .. ", " ... under " etc. (if any) be used for descriptive purpose and not necessarily be used for describing fixing relative position.It should be understood that the term that so uses is interchangeable under suitable situation, thereby make embodiment of the present invention described here be, for example, the enterprising line operate of direction that can show in this article or do not describe.The inclusion that term as used herein " comprises ", " comprising " or their any other variant are intended to contain nonuniqueness, make technology, method, goods or the device comprise series of elements not only comprise those elements, but may comprise and specially do not list or be not these technologies, method, goods or the element that installs intrinsic other.Term as used herein " a " or " an " are defined as one or more.
Claims (16)
1. form the photoresist method of patterning, wherein this method comprises:
Semiconductor wafer is provided;
This semiconductor wafer is exposed under the plasma environment;
After this semiconductor wafer being exposed under this plasma environment, from the upper surface desorb condensable species of this semiconductor wafer;
After this condensable species of desorb, with the upper surface of this semiconductor wafer of photoresist paint; With
This photoresist is exposed under the energy to form the photoresist pattern.
2. the process of claim 1 wherein that this condensable species of desorb comprises this semiconductor wafer heating.
3. the method for claim 2 wherein comprises this semiconductor wafer heating this semiconductor wafer is heated to temperature greater than 150 ℃.
4. the method for claim 2 further is included in after this semiconductor wafer heating and before on this this semiconductor wafer of photoresist paint, with this semiconductor wafer cooling.
5. the method for claim 1 further is included in after this semiconductor wafer heating and before the upper surface with this this semiconductor wafer of photoresist paint deposit adhesion layer.
6. the process of claim 1 wherein and in the etching system of chemical filtering, carry out following operation: this condensable species of desorb; Apply this photoresist, and this semiconductor wafer is exposed under the energy.
7. form the photoresist method of patterning, wherein this method comprises:
The semiconductor wafer that will have condensable species is placed in the etching system of chemical filtering;
In the etching system of this chemical filtering from this semiconductor wafer this chemical classes material of desorb;
In the etching system at this chemical filtering after this chemical classes material of desorb with on this this semiconductor wafer of photoresist paint; With
In the etching system of this chemical filtering, this photoresist is exposed under the energy to form the photoresist pattern.
8. the method for claim 7, wherein this condensable species of desorb comprises this semiconductor wafer heating.
9. the method for claim 8 wherein comprises this semiconductor wafer heating this semiconductor wafer is heated to temperature greater than 150 ℃.
10. the method for claim 7 further is included in after this semiconductor wafer heating and before the upper surface with this this semiconductor wafer of photoresist paint deposit adhesion layer.
11. the method for claim 7 further is included in before this chemical classes material of desorb, and this semiconductor wafer is exposed under the plasma environment.
12. form the photoresist method of patterning, this method comprises:
The semiconductor wafer that has condensable species is provided;
This semiconductor wafer heating with this condensable species of desorb, is wherein heated in a kind of equipment and carried out;
In this equipment with on this semiconductor wafer of photoresist paint; With
This photoresist is exposed under the energy to form the photoresist pattern.
13. the method for claim 12, wherein this condensable species of desorb comprises this semiconductor wafer heating.
14. the method for claim 13 wherein comprises the heating of this semiconductor wafer this semiconductor wafer is heated to temperature greater than 150 ℃.
15. the method for claim 12 further is included in after this semiconductor wafer heating and before the upper surface with this this semiconductor wafer of photoresist paint deposit adhesion layer.
16. the method for claim 12 further is included in before this chemical classes material of desorb, and this semiconductor wafer is exposed under the plasma environment.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US2004/040237 WO2006060015A1 (en) | 2004-11-30 | 2004-11-30 | Method for forming a photoresist pattern |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101044599A CN101044599A (en) | 2007-09-26 |
| CN100468642C true CN100468642C (en) | 2009-03-11 |
Family
ID=36565341
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004800442533A Expired - Fee Related CN100468642C (en) | 2004-11-30 | 2004-11-30 | Method for forming a photoresist pattern |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP2008522403A (en) |
| CN (1) | CN100468642C (en) |
| TW (1) | TWI383431B (en) |
| WO (1) | WO2006060015A1 (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1193811A (en) * | 1997-03-19 | 1998-09-23 | 日本电气株式会社 | Method for manufacturing semiconductor device in which etching end point is monitored and multi-layer wiring structure formed by the same |
| CN1274170A (en) * | 1999-04-12 | 2000-11-22 | 因芬尼昂技术北美公司 | Improvement in top layer photoetching imaging of semiconductor tech. |
| US6518206B1 (en) * | 1997-10-22 | 2003-02-11 | Applied Materials Inc. | Method for etching an anti-reflective coating |
| CN1438680A (en) * | 2001-11-15 | 2003-08-27 | 东京毅力科创株式会社 | Method and apparatus for manufacturing substrate |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0822945A (en) * | 1994-07-07 | 1996-01-23 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPH08339950A (en) * | 1995-06-09 | 1996-12-24 | Sony Corp | Photoresist pattern formation and photoresist treatment device |
| JPH1145845A (en) * | 1997-07-24 | 1999-02-16 | Fujitsu Ltd | Manufacture of semiconductor device and fan filter unit |
| JPH11177080A (en) * | 1997-12-11 | 1999-07-02 | Ricoh Co Ltd | Manufacture of semiconductor device |
| US6936551B2 (en) * | 2002-05-08 | 2005-08-30 | Applied Materials Inc. | Methods and apparatus for E-beam treatment used to fabricate integrated circuit devices |
| TWI299535B (en) * | 2002-09-24 | 2008-08-01 | Extraction Systems Inc | System and method for monitoring contamination |
| JP2004207590A (en) * | 2002-12-26 | 2004-07-22 | Ｆａｓｌ Ｊａｐａｎ 株式会社 | Method of manufacturing semiconductor device |
| JP4050631B2 (en) * | 2003-02-21 | 2008-02-20 | 株式会社ルネサステクノロジ | Manufacturing method of electronic device |
| TWI240302B (en) * | 2003-04-08 | 2005-09-21 | Nanya Technology Corp | Method for increasing adhesion of rework photoresist on oxynitride film |
-
2004
- 2004-11-30 WO PCT/US2004/040237 patent/WO2006060015A1/en active Application Filing
- 2004-11-30 JP JP2007543009A patent/JP2008522403A/en active Pending
- 2004-11-30 CN CNB2004800442533A patent/CN100468642C/en not_active Expired - Fee Related
-
2005
- 2005-11-16 TW TW094140267A patent/TWI383431B/en not_active IP Right Cessation
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1193811A (en) * | 1997-03-19 | 1998-09-23 | 日本电气株式会社 | Method for manufacturing semiconductor device in which etching end point is monitored and multi-layer wiring structure formed by the same |
| US6518206B1 (en) * | 1997-10-22 | 2003-02-11 | Applied Materials Inc. | Method for etching an anti-reflective coating |
| CN1274170A (en) * | 1999-04-12 | 2000-11-22 | 因芬尼昂技术北美公司 | Improvement in top layer photoetching imaging of semiconductor tech. |
| CN1438680A (en) * | 2001-11-15 | 2003-08-27 | 东京毅力科创株式会社 | Method and apparatus for manufacturing substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200625405A (en) | 2006-07-16 |
| WO2006060015A1 (en) | 2006-06-08 |
| JP2008522403A (en) | 2008-06-26 |
| TWI383431B (en) | 2013-01-21 |
| CN101044599A (en) | 2007-09-26 |
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