CN100446200C - Heat radiation type packaging structure and its making method - Google Patents

Heat radiation type packaging structure and its making method Download PDF

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Publication number
CN100446200C
CN100446200C CNB2005100511347A CN200510051134A CN100446200C CN 100446200 C CN100446200 C CN 100446200C CN B2005100511347 A CNB2005100511347 A CN B2005100511347A CN 200510051134 A CN200510051134 A CN 200510051134A CN 100446200 C CN100446200 C CN 100446200C
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chip
heat
heat sink
thin metal
metal layer
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CN1828853A (en
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黄建屏
赖正渊
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Siliconware Precision Industries Co Ltd
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Siliconware Precision Industries Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824—Connecting between the body and an opposite side of the item with respect to the body
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73215—Layer and wire connectors
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    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The present invention relates to a heat radiation type packaging structure and a making method thereof. The heat radiation type packaging structure comprises a chip carrier, semiconductor chips, a heat radiation piece and a packaging glue body, wherein at least one semiconductor chip is electrically connected to the chip carrier. The heat radiation piece is packed and moulded after the heat radiation piece is connected to the chips, packaging assemblies are cut around the periphery of the packaging assemblies to expose the side edges of the heat radiation piece. The packaging glue body which is arranged on a thin metal layer of the heat radiation piece is removed to expose a thin metal layer of the heat radiation piece; the present invention makes use of the thin metal layer of the heat radiation piece and heat which is generated when a heat conduction through hole dissipates. The present invention avoids the problems of rough edges when the heat radiation piece is cut by single cutting tools and the loss of the tools. The present invention has the advantage that the cost used for the process of dicing is lowered; when the heat radiation piece integrates semiconductor structure, the problem of the damage of the chips and the overflow of glue during the process of moulding can not happen; further, the qualification rate of finished products is enhanced.

Description

Heat-radiation type package structure and method for making thereof
Technical field
The invention relates to a kind of heat-radiation type package structure and method for making thereof, particularly about a kind of semiconductor package and preparation method thereof with heat sink.
Background technology
Ball grid array (Ball Grid Array, BGA) be a kind of advanced person's semiconductor die package technology, its characteristics are to adopt substrate to settle semiconductor chip, and plant at this substrate back and to put the soldered ball (Solder Ball) that a plurality of one-tenth palisades are arranged, make on the semiconductor chip carriers of same units area and can hold more I/O links (I/O Connection), satisfy the demand of the semiconductor chip of Highgrade integration (Integration), whole encapsulation unit is welded and be electrically connected to external printed circuit board by these soldered balls.
But during the operation of Highgrade integration semiconductor chip, can follow a large amount of heats to produce, the packing colloid that coats semiconductor chip in addition is the only bad heat transfer resin material of 0.8w/m-k of conductive coefficient, makes the dissipation efficient of heat not good, the performance of entail dangers to semiconductor chip and useful life.
Therefore, for improving the radiating efficiency of BGA semiconductor package part, produced the conception of in packaging part, setting up radiator structure.
See also Fig. 1, it is a United States Patent (USP) the 5th, 726, the semiconductor package part of No. 079 invention.This conventional semiconductor packages part 1 is the directly sticking fin 11 that is provided with on chip 10, the end face 11a of this fin 11 is exposed outside be used to coat the packing colloid 12 of this chip 10 and directly contact with atmosphere, the heat that chip 10 is produced is emitted in the atmosphere by fin 11, need not be through the packing colloid 12 of poor thermal conductivity.
Yet there are some shortcomings in this semiconductor package part 1 on making.At first, after this fin 11 and chip 10 are bonding, insert when forming the molding operation (Molding) of this packing colloid 12 in the die cavity of encapsulating mould, the necessary contact of the end face 11a of this fin 11 is to the roof of die cavity, if the end face 11a of this fin 11 fails the roof to die cavity of contact effectively, when between is formed with the gap, promptly can on the end face 11a of fin 11, form the glue that overflows, in case be formed with excessive glue on the end face 11a of fin 11, except meeting influences the radiating efficiency of this fin 11, also can cause manufactured goods apparent bad, so the processing of often will remove photoresist (Deflash); Yet the processing of removing photoresist is not only consuming time, increases packaging cost, also can cause the impaired of manufactured goods.In addition, the strength of living the die cavity roof as if fin 11 contacts is excessive, then tends to make matter crisp chip 10 because of excessive pressure rhegma.
If the end face 11a of fin 11 is to the distance of the substrate 13 upper surfaces die cavity degree of depth during greater than molding operation, then behind the mould matched moulds, mould can oppress fin 11 cause with fin 11 directly the chips 10 of bonding by fin 11 pressure breaks; Otherwise, if the end face 11a of fin 11 is to the distance of the substrate 13 upper surfaces degree of depth less than die cavity, then packaging plastic is known from experience the excessive glue of generation on the end face 11a of fin 11, the formation of excessive glue is except meeting influences the outward appearance of manufactured goods, also can reduce fin 11 end face 11a and be exposed at area in the atmosphere outward, make the heat dissipation variation, so often must carry out extra clear program, the excessive glue on the end face 11a of removal fin 11.Yet the carrying out of clear program can increase the complexity of overall package technology, also can cause the raising of cost.
In addition, can equal the degree of depth of mould die cavity just to the distance of substrate 13 upper surfaces for the end face 11a that makes fin 11, fin 11 must be controlled and be made with the thickness of the bonding and fin 11 of substrate 13 accurately with bonding, the chip 10 of chip 10, requirement on this precision, can make the complexity of packaging cost increase and raising technology, so the difficulty of its enforcement is arranged actually.
Have again since the height after fin 11 and chip 10 bondings accurately control is avoiding the generation of the problems referred to above, the encapsulation of this semiconductor package part 1 promptly can't be with batch (Batch-type) mode bond chip 10 and fin 11; Just fin 11 must be bonding one by one with corresponding chip 10, increased the complexity of overall package technology and required time-histories, so the raising of the reduction of unfavorable packaging cost and packaging efficiency.
In addition, the radiating efficiency of this semiconductor package part 1 is directly proportional with the area of the end face 11a that the fin of its use 11 exposes, just, under semiconductor package part 1 big or small constant situation, the area of fin 11 and packaging part has maximum exposed area when identical, make fin 11 that maximum radiating efficiency can be provided.Yet, with the enlarged areas of fin when equating with packaging part, the size of expression fin also must trim with the limit wall of encapsulating mould die cavity or rabbet, if fin is made the precision deficiency, when fin is excessive, fin can't be inserted in the die cavity smoothly, but if fin is too small, its end face and side form the glue that overflows easily.So this structure has misgivings on the acceptance rate and makes and have suitable difficulty in the enforcement.
See also Fig. 2 A to Fig. 2 C and Fig. 3, for overcoming the shortcoming of above-mentioned prior art, United States Patent (USP) the 6th, 458,626 and 6,444, No. 498 cases (patentee is identical with the applicant of the application's case) are a kind ofly can directly glue the fin of putting on chip, and it can not produce the crushing chip, can not form the semiconductor package part of the glue that overflows on the fin exposed surface yet.This semiconductor package part outside fin 21, be exposed at form on the surface in the atmosphere and packing colloid 24 between bad adhesion or and the material layer 25 of 21 bad adhesion of fin, again directly sticking the putting of this fin 21 connect on the chip of putting at substrate 23 20, then carry out mould pressing process and coat this fin 21 and chip 20 fully with packing colloid 24, and packing colloid 24 is covered on the material layer 25 of fin 21 (shown in Fig. 2 A), like this, the die cavity degree of depth that mould pressing process uses mould greater than the thickness of chip 20 and fin 21 and, so behind the mould matched moulds, mould can not touch fin 21 also just not can make chip 20 pressurizeds cause rhegma; Then, cut list (Singulation) program (shown in Fig. 2 B), the packing colloid 24 of fin 21 tops is removed, when wherein the caking property between material layer on being formed on fin 21 25 (for example Gold plated Layer) and the fin 21 is greater than the caking property of 24 of itself and packing colloids, after packing colloid 24 divested, this material layer 25 still remains on the fin 21, but bad adhesion because of 24 of material layer 25 and packing colloids, packing colloid 24 can not remain in (shown in Fig. 2 C) on the fin 21, so can not produce the problem of the glue that overflows.Relatively, the caking property that material layer 25 on being formed on fin 21 (for example sheet adhesive of making for polyimide resin) and fin are 21 is during less than the caking property of 24 of itself and packing colloids, after packing colloid 24 divested, this material layer 25 can stick on the packing colloid 24 and remove (as shown in Figure 3) thereupon, so also can not form excessive glue on this fin 21.
But in above-mentioned semiconductor package part technology, when cutting single stage, the single instrument of Yin Qie is directly by this fin, because this fin generally is the metal material that quality is hard and thickness is sufficient, therefore cutting when single, no matter when cutting with impact style or diamond cutter, the capital makes the periphery material of fin produce irregular sharp edge (or claiming burr) because of pullling, have influence on the outward appearance of packaging part, also can cause simultaneously punching press or cutting tool loss excessive, cause cost significantly to improve, and production efficiency more can't improve in a large number.
Summary of the invention
For overcoming the shortcoming of above-mentioned prior art, main purpose of the present invention is to provide a kind of heat-radiation type package structure and method for making thereof, can avoid when cutting single stage, cuts the burr problem and the instrument consume problem that produce when single instrument cuts to fin.
A further object of the present invention is to provide a kind of heat-radiation type package structure and method for making thereof, can reduce the cutting cost of cutting in single technology.
Another object of the present invention is to provide a kind of heat-radiation type package structure and method for making thereof, can in mould pressing process, not cause the rhegma and the excessive glue problem of chip when making heat sink be incorporated into semiconductor structure, and then improve the acceptance rate of manufactured goods.
For reaching above-mentioned and other purpose, heat-radiation type package structure method for making of the present invention comprises: at least one semiconductor chip is connect put and be connected electrically on the chip carrier; Heat sink connect put on this chip, this heat sink is by the insulation sandwich layer and connects the thin metal layer of putting on this upper and lower surface of insulation sandwich layer and constituted, and be formed with at least one heat conduction through hole in this insulation sandwich layer; Carry out the Encapsulation Moulds compression technology, make complete semiconductor chip and this heat sink that is positioned on this chip carrier that envelope of packing colloid; And around package assembling, carry out cutting technique, and remove the packing colloid on this heat sink metals thin layer, expose outside the thin metal layer of this heat sink.
The present invention also provides another kind of heat-radiation type package structure method for making, and this method for making comprises: prepare matrix form chip carrier module sheet, this chip carrier module sheet is made of a plurality of chip carriers that are the array way arrangement; Connect and put at least one chip, and make this chip be electrically connected to this chip carrier in the predetermined position of this chip carrier respectively; Heat sink connect put on this chip, this heat sink is by the insulation sandwich layer and connects the thin metal layer of putting on this upper and lower surface of insulation sandwich layer and constituted, and be formed with at least one heat conduction through hole in this insulation sandwich layer; Carry out the Encapsulation Moulds compression technology, make complete semiconductor chip and this heat sink that is positioned on this chip carrier that envelope of packing colloid; Cut single job, so as to forming the semi-finished product of individual semiconductor package part; And remove packing colloid on this heat sink metals thin layer, expose outside the thin metal layer of this heat sink.Wherein, on the thin metal layer of this heat sink upper surface, can form for example interface layer of nickel, chromium or gold, so that the follow-up packing colloid that is formed on this thin metal layer that removes, on the thin metal layer of this heat sink lower surface, can carry out melanism or brown processing in addition, so as to increasing the adhesion between heat sink and packing colloid with the packing colloid contact portion.
In technology of the present invention, the material of this heat sink mainly is insulating barrier sandwich layer and the thin metal layer that is coated on this upper and lower surface of insulation sandwich layer, therefore when cutting, cutting tool only is softer insulation sandwich layer and the thin metal layer of cutting material, so the cutter consume is less and heat sink is difficult for producing burr, help cutting technique and carry out and cost control, help a large amount of productions of encapsulating structure simultaneously.
In addition, in the present invention, this chip carrier can adopt substrate or lead frame form, and semiconductor chip can flip-chip or the routing mode be electrically connected to this chip carrier, wherein, when adopting flip chip to be electrically connected chip and chip carrier, this heat sink directly can be connect the non-active surface of putting at this chip, relatively when adopting the routing mode to be electrically connected chip and chip carrier, can on this chip active surface, not influence the bonding wire placement earlier, connect and put and chip thermal coefficient of expansion (CTE, Coefficient of Thermal Expansion) behind the suitable buffering spacer (Buffer Pad), on this buffering spacer, connect again and put this heat sink, avoid that heat sink and chip are direct to touch bonding wire when bonding, can reduce simultaneously since the heat sink CTE different with chip and under both directly bonding situations heat sink to the thermal stress effects of chip generation.
In addition, this encapsulating structure method for making of the present invention is except the technology that can be applicable to single semiconductor structure, also can adopt a batch mode technology, by being connect, put on matrix form chip carrier module sheet a plurality of semiconductor chips, connect again put the heat sink and packaging technology that comprises insulate sandwich layer, thin metal layer and heat conduction through hole after, can utilize and cut simple form and become a plurality of encapsulating structures that are integrated with heat sink, be beneficial to a large amount of manufacturing productions.
Heat-radiation type package structure of the present invention comprises: chip carrier; Semiconductor chip connects and puts and be electrically connected on this chip carrier; Heat sink connects and puts on this semiconductor chip, and this heat sink is made of insulation sandwich layer and the thin metal layer that is coated on this upper and lower surface of insulation sandwich layer, and is formed with at least one heat conduction through hole in this insulation sandwich layer; And packing colloid, be formed between this heat sink and the chip carrier, be used to coat this semiconductor chip.
In an embodiment of the present invention, this chip carrier is ball grid array (BGA) substrate, and on this substrate, offer at least one perforate, be electrically connected this substrate and chip for bonding wire by this perforate, this substrate is positioned on the surface of chip below and plants and is connected to a plurality of soldered balls, the medium that is electrically connected with external device as chip.
In the present invention, this chip carrier is chip upside-down mounting type (Flip Chip) substrate, just the upper surface of substrate has a plurality of weld pads that array way is arranged that are, be connected with a plurality of conductive projections of substrate for being used to be electrically connected chip, simultaneously, then plant on the lower surface of this substrate and be connected to a plurality of soldered balls, be electrically connected with external device for chip.
In the present invention, this chip carrier can also be the lead frame of centreless bar, and semiconductor chip is connect with flip chip on the pin of putting and be electrically connected to this lead frame, is electrically connected to external device (ED) for follow-up via this pin.
This chip carrier also can be LGA (LAND GRID ARRAY) substrate in the present invention, the non-active surface of semiconductor chip connect put on this LGA substrate, and be electrically connected to this LGA substrate by bonding wire, is electrically connected to external device (ED) for follow-up via a plurality of metallic contacts that are arranged in this substrate bottom surface.
This chip carrier can also be the BGA substrate in the present invention, the non-active surface of semiconductor chip is connect put on this BGA substrate, and be electrically connected to this BGA substrate by bonding wire, is electrically connected to external device (ED) for follow-up via a plurality of soldered balls that are arranged in this substrate bottom surface.
This chip carrier can be the QFN lead frame in the present invention, semiconductor chip connect with its non-active surface put on the chip carrier of QFN lead frame, and be electrically connected to the pin part of this QFN lead frame by bonding wire, is electrically connected to external device (ED) for follow-up via this pin.
Should be specifically noted that at this, in heat-radiation type package structure of the present invention and the method for making thereof, the electric connection mode of using between the selection of this chip carrier and chip and chip carrier, under spirit of the present invention and category, variation capable of being combined.
Therefore, heat-radiation type package structure of the present invention and method for making thereof mainly are that chip carrier is followed and be electrically connected to chip, to comprise the insulation sandwich layer in addition, the heat sink that is coated on the thin metal layer of this insulation sandwich layer and heat conduction through hole connects to be put on this chip, then can carry out mould pressing process, utilize complete semiconductor chip and the heat sink that is positioned on this chip carrier that envelope of packing colloid, carry out cutting technique again, non-electrical function part around package assembling when removal had before been carried out packaging technology, then remove the packing colloid on the thin metal layer of heat sink, directly expose outside the thin metal layer of this heat sink; Wherein when carrying out cutting technique, because of the material of this heat sink mainly is insulating barrier sandwich layer and the thin metal layer that is coated on this upper and lower surface of insulation sandwich layer, therefore cutting tool only is softer insulation sandwich layer and the thin metal layer of cutting material, so cutting tool is consumed little, and on this heat sink, be difficult for producing burr, help the carrying out and cutting cost control of cutting technique, help a large amount of productions of encapsulating structure simultaneously.
In addition, be to carry out among the present invention in batch mode, can simplify technology, reduce the consuming time of encapsulation and reduce manufacturing cost, and after in mould pressing process, making this heat sink of the complete coating of packing colloid and chip, remove the packing colloid part that is formed on this heat sink again, that avoids that chip rhegma in the existing semiconductor packaging process or excessive glue causes influences the problem that outward appearance and increase remove step and cost, need not to be subjected to highly control because of the operation of misgivings heat sink and die bonding, and change encapsulating mould with the change of product size, so can reduce the management cost of packaging cost and mould.
Description of drawings
Fig. 1 is a United States Patent (USP) the 5th, 726, the semiconductor package part generalized section of No. 079 case;
Fig. 2 A to Fig. 2 C is a United States Patent (USP) the 6th, 458, the semiconductor package part generalized section of No. 626 cases;
Fig. 3 is a United States Patent (USP) the 6th, 444, the semiconductor package part generalized section of No. 498 cases;
Fig. 4 A to Fig. 4 F is the generalized section of heat-radiation type package structure method for making embodiment 1 of the present invention;
Fig. 5 A to Fig. 5 F is the generalized section of heat-radiation type package structure method for making embodiment 2 of the present invention;
Fig. 6 is the generalized section of heat-radiation type package structure embodiment 3 of the present invention;
Fig. 7 is the generalized section of heat-radiation type package structure embodiment 4 of the present invention;
Fig. 8 is the generalized section of heat-radiation type package structure embodiment 5 of the present invention;
Fig. 9 is the generalized section of heat-radiation type package structure embodiment 6 of the present invention; And
Figure 10 is the generalized section of heat-radiation type package structure embodiment 7 of the present invention.
Embodiment
Below by certain embodiments explanation embodiments of the present invention.
Embodiment 1
See also Fig. 4 A to Fig. 4 F, it is the manufacturing process schematic diagram of heat-radiation type package structure method for making embodiment 1 of the present invention.
Shown in Fig. 4 A and Fig. 4 B, at first, provide matrix form substrate module sheet 40A, this substrate module sheet 40A is arranged by a plurality of base board unit 40 array way and constitutes.This base board unit 40 has upper surface 400 and lower surface 401 respectively, and offers and run through perforate 402.Wherein this base board unit 40 also can the vertical bar mode be arranged except arranging with array way, and permission also can adopt single base board unit mode to carry out as process conditions.
Then, predetermined position on the upper surface 400 of each base board unit 40, adhesion coating 45 by for example elargol meets the active surface 41a of chip 41 and puts thereon, and make this chip 41 close an end of this perforate 402, run through this perforate 402 with many bonding wires 42 again and be welded to the active surface 41a of this chip 41 respectively and the lower surface 401 of base board unit 40 on, make this chip 41 be electrically connected to this base board unit 40.
Shown in Fig. 4 C, the adhesion coating 46 of heat sink 43 by heat conduction connect put on this chip 41, this heat sink 43 is by insulation sandwich layer 430 and connects the thin metal layer of putting on these insulation sandwich layer 430 upper and lower surfaces 431 and constitute, and be formed with at least one heat conduction through hole 432 in this insulation sandwich layer 430; Wherein the material of this insulation sandwich layer 430 can be BT (BismaleimideTrazine) resin or FR4 resin etc., and this thin metal layer 431 can be a Copper Foil, and this heat conduction through hole 432 can be the copper facing hole.Certainly this heat sink 43 is formed with the resin pressing Copper Foil (RCC) in copper facing hole in the middle of also can adopt.In addition, also can form on the thin metal layer 431 of these insulation sandwich layer 430 upper surfaces utilization for example mode such as plating cover for example for the interface layer (not marking) of nickel, chromium or gold etc., so that the follow-up packing colloid that is formed on this thin metal layer 431 that removes; And can carry out melanism or brown to the thin metal layer 431 of these sandwich layer 430 lower surfaces that insulate and handle, good conjugation between the thin metal layer 431 of these insulation sandwich layer 430 lower surfaces and packing colloid is provided.The big palpulus of this heat sink 43 is enough to cover fully the base board unit 40 that joins with it by chip 41 in addition, and just the side of this heat sink 43 must extend the side 403 (shown in Fig. 4 A dotted line) that any is arranged in the base board unit 40 in the outside.
Shown in Fig. 4 D, this structure that is combined with heat sink 43, chip 41 and substrate module sheet 40A is inserted in the die cavity (not marking) of encapsulating mould, carry out molding operation, form the packing colloid 47 that coats this heat sink 43, chip 41 and bonding wire 42.Because the height of this structure makes between the roof of heat sink 43 and die cavity suitable distance is arranged, so behind the encapsulating mould matched moulds, chip 41 can not be subjected to the pressure of encapsulating mould or heat sink 43, so do not have the problem of rhegma, and heat sink 43 does not need accurately to control height with the bonding of chip 41 yet, so can effectively improve the acceptance rate and the reliability of manufactured goods.
Shown in Fig. 4 E, on the lower surface 401 of each base board unit 40 of substrate module sheet 40A, plant the conductive component that connects a plurality of for example soldered balls 48, be electrically connected with external device formation for this chip 41, and carry out cutting technique, it is will plant semi-finished product vacuum suction formed packing colloid 47 on heat sink 43 that ball is finished with jig (not marking), make when cutting single job and carrying out and after finishing, each semi-finished product through cutting after single still can be adsorbed on the jig.In addition, this for example the setting of the conductive component of soldered ball 48 also can carry out again after finishing the base board unit cutting technique follow-up.
This is cut single job and can remove and finish behind the mould pressing process non-electrical function part around the package assembling, so as to constituting each encapsulation unit, make the side 43a of this heat sink expose outside formed packing colloid 47 simultaneously, and trim with the side 47a of this packing colloid 47, make the generation that does not have the glue that overflows on the side 43a of this heat sink 43, and also reach this heat sink 43 and have purpose of the same area with base board unit 40, heat sink 43 needn't cooperate accurately with the die cavity size of encapsulating mould.Simultaneously, respectively this heat sink 43 combine with the ground of chip 41 be with batch mode carry out, so can simplify technology, reduce consuming time and reduce cost.Have again, because in cutting single technology, the material of this heat sink 43 mainly is insulating barrier sandwich layer 430 and the thin metal layer 431 that is coated on these insulation sandwich layer 430 upper and lower surfaces, therefore cutting tool only is softer insulation sandwich layer 430 and the thin metal layer 431 of cutting material, so compare with existing cutting tool cutting metal fin, having the tool of cutting is consumed little, heat sink and is difficult for producing advantages such as burr, help the carrying out and the cost control of cutting technique, help a large amount of productions of encapsulating structure simultaneously.
Shown in Fig. 4 F, semi-finished product remain in the removal operation of the packing colloid 47 on this heat sink 43 after cutting singly, divest packing colloid 47 parts that are formed on these heat sink 43 thin metal layers 431, expose outside this thin metal layer 431, supply this chip 41 by this thin metal layer 431 and heat conduction through hole 432 dissipation heats.
Embodiment 2
See also Fig. 5 A to Fig. 5 G, it is the manufacturing process schematic diagram of heat-radiation type package structure method for making embodiment 2 of the present invention.The technology of the embodiment of the invention 2 and embodiment 1 are roughly the same, and its main difference is that semiconductor chip is to connect with flip chip to put and be electrically connected on the substrate among the embodiment 2.
Shown in Fig. 5 A and Fig. 5 B, at first, provide a matrix form substrate module sheet 50A, this substrate module sheet 50A is arranged with array way by a plurality of base board units 50 to constitute.This base board unit 50 respectively has upper surface 500 and lower surface 501.Wherein, this base board unit 50 also can the vertical bar mode be arranged except arranging with array way, and permission also can adopt single base board unit mode to carry out as process conditions.
Then, predetermined position on the upper surface 500 of each base board unit 50 is put conductive projection 52 with flip chip by connecing with semiconductor chip 51, connects with its active surface 51a and puts and be electrically connected to this base board unit 50.Also can carry out flip-chip bottom filler (not marking) in addition at this chip upside-down mounting type chip 51 and 50 of base board units.This controlled collapsible chip connec-tion is same as the prior art, does not repeat them here.
Shown in 5C figure, the adhesion coating 56 of heat sink 53 by heat conduction connect put on this chip 51, this heat sink 53 is by insulation sandwich layer 530 and connects the thin metal layer of putting on these insulation sandwich layer 530 upper and lower surfaces 531 and constituted, and be formed with at least one heat conduction through hole 532 in this insulation sandwich layer 530; Wherein the material of this insulation sandwich layer 530 can be BT (BismaleimideTrazine) resin or FR4 resin etc., and this thin metal layer 531 can be a Copper Foil, and this heat conduction through hole 532 can be the copper facing hole.Certainly this heat sink 53 is formed with the resin pressing Copper Foil (RCC) in copper facing hole in the middle of can adopt.In addition, also can additionally cover an interface layer (not marking) on the thin metal layer 531 that forms on these insulation sandwich layer 530 upper surfaces, the material of this dielectric layer can be nickel, chromium or gold etc., so that at the follow-up packing colloid that is formed on this thin metal layer 531 that removes; And can carry out melanism or brown to the thin metal layer 531 on these sandwich layer 530 lower surfaces that insulate and handle, good bond effect between thin metal layer 531 on these insulation sandwich layer 530 lower surfaces and packing colloid is provided.In addition, the big palpulus of this heat sink 53 is enough to cover fully the base board unit 50 that joins with chip 51, and just, the side of this heat sink 53 must extend any side 503 (shown in Fig. 5 A dotted line) that is arranged in the base board unit 50 in the outside.
Shown in Fig. 5 D, this structure that is combined with heat sink 53, chip 51 and substrate module sheet 50A is inserted in the die cavity (not marking) of encapsulating mould, carry out molding operation, form the packing colloid 57 that coats this heat sink 53, chip 51 and conductive projection 52.Because the height of this structure makes between heat sink 53 and the die cavity roof suitable distance is arranged, so behind the encapsulating mould matched moulds, chip 51 can not be subjected to the pressure from encapsulating mould or heat sink 53, so there is not the problem of rhegma, and heat sink 53 does not need accurately to control highly with the bonding of chip 51 yet, so can effectively improve the acceptance rate and the reliability of manufactured goods.
Shown in Fig. 5 E, on the lower surface 501 of each base board unit 50 of substrate module sheet 50A, plant the conductive component that connects a plurality of for example soldered balls 58, be electrically connected with external device formation for this chip 51, and carry out cutting technique, it is will plant semi-finished product vacuum suction formed packing colloid 57 on heat sink 53 that ball is finished with jig (not marking), make when cutting single job and carrying out and after finishing, each semi-finished product through cutting after single still can be adsorbed on the jig.In addition, this for example the setting of the conductive component of soldered ball 58 also can carry out again after finishing the base board unit cutting technique follow-up.
The side 53a of this heat sink exposes outside formed packing colloid 57 after cutting list, and trim with the side 57a of this packing colloid 57, make the generation that does not have the glue that overflows on the side 53a of this heat sink 53, and also make this heat sink 53 have area identical, do not need heat sink 53 to cooperate accurately with the die cavity size of encapsulating mould with base board unit 50.Simultaneously, respectively this heat sink 53 is to carry out in batch mode with the bonding of chip 51, so can simplify technology, reduces consuming time and reduces cost.
Shown in Fig. 5 F, the packing colloid of respectively cutting on the half-finished thin metal layer 531 that remains in these heat sink 53 upper surfaces in single back 57 is removed operations, expose outside this thin metal layer 561, the heat that produces when thin metal layer 531 by this heat sink 53 and 51 operations of heat conduction through hole 532 dissipation chips.
Embodiment 3
See also shown in Figure 6ly, it is the generalized section with reference to the made semiconductor package embodiment 3 of the above-mentioned heat-radiation type package structure method for making of the present invention.Encapsulating structure of the present invention comprises: chip carrier, semiconductor chip, heat sink, packing colloid.This semiconductor package of the present invention is to make by being similar to the method for preparing embodiment 1 and embodiment 2, its difference is, in the semiconductor package of present embodiment, connecing the heat sink 63 put on semiconductor chip 61 connects in correspondence and puts chip 61 positions and be formed with opening 63b, just put thin metal layer 631 and insulation sandwich layer 630 parts that chip 61 positions remove these heat sink 63 lower surfaces connecing, so as on this heat sink 63, forming the opening 63b of the thin metal layer 631 that exposes outside heat sink 63 upper surfaces, this heat sink 63 is connect when putting on chip 61, this chip 61 is accommodated among the opening 63b, further shorten the height of semiconductor package, and the non-active surface that makes this chip 61 touches the thin metal layer 631 of these heat sink 63 upper surfaces, be emitted to the external world so as to the heat that directly chip 61 operations is produced by this thin metal layer 631, improve radiating efficiency.
Embodiment 4
See also shown in Figure 7ly, it is the generalized section with reference to the made semiconductor package embodiment 4 of the above-mentioned heat-radiation type package structure method for making of the present invention.This semiconductor package of the present invention is to be made by the method for the semiconductor structure that is similar to preparation embodiment 1 and embodiment 2, its difference is, the semiconductor package of present embodiment is with the chip carrier of lead frame 70 as semiconductor chip 71, connect semiconductor chip 71 on the pin 70a that puts and be electrically connected to this lead frame with flip chip, be electrically connected to external device (ED) for follow-up via this pin 70a, and on the non-active surface 71b of this chip 71, can connect and put heat sink 73 by for example heat conduction adhesion coating 75, the heat that produces during by the thin metal layer 731 of this heat sink 73 and 71 operations of heat radiation through hole 732 dissipation chips, be formed with the packing colloid 77 that coats this semiconductor chip 71 at this heat sink 73 and 70 of lead frames in addition, bottom surface and side with seasonal pin 70a all expose outside this packing colloid 77, make encapsulating structure can utilize this pin 70a to be electrically connected to external device (ED).
In addition, same heat spreader structure with reference to Fig. 6, make and connect the heat sink put on semiconductor chip and connect in correspondence and put the chip position place and be formed with opening, chip is accommodated in this opening, shorten the height of semiconductor package, and the non-active surface that makes this chip touches the thin metal layer of this heat sink, and directly the heat that the chip operation is produced is emitted to the external world by this thin metal layer, improves radiating efficiency.
Embodiment 5
See also shown in Figure 8ly, it is the generalized section with reference to the made semiconductor package embodiment 5 of the above-mentioned heat-radiation type package structure method for making of the present invention.This semiconductor package of the present invention is to be made by the method for the semiconductor structure that is similar to preparation embodiment 1 and embodiment 2, its difference is, the semiconductor package of present embodiment is with the chip carrier of LGA (LAND GRIDARRAY) substrate 80 as semiconductor chip 81, the non-active surface 81b of semiconductor chip 81 connect put on this LGA substrate 80, and the active surface 81a of this chip 81 is electrically connected to this LGA substrate 80 by bonding wire 82, is electrically connected to external device (ED) for follow-up via a plurality of metallic contact 80a that are arranged in these LGA substrate 80 bottom surfaces; And on the active surface 81a of this chip 81, do not influence bonding wire 82 placements, connect and put the buffering spacer (Buffer Pad) 89 suitable with the thermal coefficient of expansion (CTE) of chip 81, and the heat sink 83 that comprises insulate sandwich layer 830, thin metal layer 831 and heat conduction through hole 832 is set on this buffering spacer 89, the heat that produces when making these chip 81 operations is emitted to the external world by this thin metal layer 831 and heat conduction through hole 832.
In addition, the size of this buffering spacer 89 is limited in the scope that can not interfere with bonding wire 82, and its thickness must be a little more than the summit of bonding wire 82 banks, on this buffering spacer 89, connect when putting heat sink 83, this heat sink 83 can not touch bonding wire 82, simultaneously, this buffering spacer 89 can clear up the thermal stress effects that under hot environment heat sink 83 produces this chip 81 because of the difference of thermal coefficient of expansion, can guarantee that this chip 81 can pressurized and rhegma, but the heat that can also make this chip 81 produce is delivered to this heat sink 83 by this buffering spacer 89.This heat-conducting buffer pad 89 can be waste chips (Dummy die), in addition if the material permission also can be adopted metal materials such as copper, aluminium.
In addition, heat spreader structure with reference to Fig. 6, can make equally and connect the heat sink put on semiconductor chip and connect in correspondence and put the chip position place and be formed with opening, chip is accommodated in this opening, shorten the height of semiconductor package, and the non-active surface that makes this chip touches the thin metal layer of this heat sink, is emitted to the external world so as to the heat that directly the chip operation is produced by this thin metal layer, improves radiating efficiency.
Embodiment 6
See also shown in Figure 9ly, it is the generalized section with reference to the made semiconductor package embodiment 6 of the above-mentioned heat-radiation type package structure method for making of the present invention.This semiconductor package of the present invention is to be made by the method for the semiconductor structure that is similar to preparation embodiment 1 and embodiment 2, its difference is, the semiconductor package of present embodiment is with the chip carrier of BGA (BALL GRIDARRAY) substrate 90 as semiconductor chip 91, the non-active surface 91b of semiconductor chip 91 connect put on this BGA substrate 90, and be electrically connected to this BGA substrate 90 by bonding wire 92, is arranged in the soldered ball 98 of these BGA substrate 90 bottom surfaces and then is electrically connected to external device (ED) via a plurality of for follow-up; On the active surface 91a of this chip 91, do not influence bonding wire 92 placements in addition, connect and put the buffering spacer 99 suitable with the thermal coefficient of expansion of chip 91, and the heat sink 93 that comprises insulate sandwich layer 930, thin metal layer 931 and heat conduction through hole 932 is set on this buffering spacer 99, the heat that produces when making these chip 91 operations is emitted to the external world by this thin metal layer 931 and heat conduction through hole 932.
In addition, heat spreader structure with reference to Fig. 6, can make equally and connect the heat sink put on semiconductor chip and connect in correspondence and put the chip position place and be formed with opening, chip is accommodated in this opening, shorten the height of semiconductor package, and the non-active surface that makes this chip touches the thin metal layer of this heat sink, and directly the heat that the chip operation is produced dissipates to the external world by this thin metal layer, improves radiating efficiency.
Embodiment 7
See also shown in Figure 10ly, it is the generalized section with reference to the made semiconductor package embodiment 7 of the above-mentioned heat-radiation type package structure method for making of the present invention.This semiconductor package of the present invention is to be made by the method for the semiconductor structure that is similar to preparation embodiment 1 and embodiment 2, its difference is, the semiconductor package of present embodiment is with the chip carrier of QFN lead frame 100 as semiconductor chip 101, semiconductor chip 101 connect with its non-active surface 101b put on the chip carrier 100b of QFN lead frame 100, and be electrically connected to this QFN lead frame 100 pin one 00a parts by bonding wire 102, is electrically connected to external device (ED) for follow-up via this pin one 00a; On the active surface 101a of this chip 101, do not influence bonding wire 102 placements in addition, connect and put the buffering spacer 109 suitable with the thermal coefficient of expansion of chip 101, and the heat sink 103 that comprises insulate sandwich layer 1030, thin metal layer 1031 and heat conduction through hole 1032 is set on this buffering spacer 109, the heat that produces when making these chip 101 operations dissipates to the external world by this thin metal layer 1031 and heat conduction through hole 1032.
In addition, heat spreader structure with reference to Fig. 6, can make equally and connect the heat sink put on semiconductor chip and connect in correspondence and put the chip position place and be formed with opening, chip is accommodated in this opening, shorten the height of semiconductor package, and the non-active surface that makes this chip touches the thin metal layer of this heat sink, and directly the heat that the chip operation is produced dissipates to the external world by this thin metal layer, improves radiating efficiency.
Therefore, heat-radiation type package structure of the present invention and method for making thereof mainly are that chip carrier is followed and be electrically connected to chip, the heat sink that will comprise in addition the insulation sandwich layer and be coated on the thin metal layer of this insulation sandwich layer connects to be put on this chip, then can carry out mould pressing process, utilize complete semiconductor chip and the heat sink that is positioned on this chip carrier that envelope of packing colloid, carry out cutting technique again, non-electrical function part around package assembling when removal had before been carried out packaging technology, then remove the packing colloid on the heat sink metals thin layer, directly expose outside the thin metal layer of this heat sink, wherein when carrying out cutting technique, because of the material of this heat sink mainly is the insulating barrier sandwich layer and is coated on this insulation sandwich layer, the thin metal layer of lower surface, therefore cutting tool only is softer insulation sandwich layer and the thin metal layer of cutting material, so compare with existing cutting tool cutting metal fin, it is little to cut being consumed of tool, and be difficult for producing burr, help cutting technique and cost control, be beneficial to a large amount of productions of encapsulating structure simultaneously.
In addition, the present invention produces in a batch mode, can simplify technology, reduce the consuming time of encapsulation and reduce cost, and after in mould pressing process, making this heat sink of the complete coating of packing colloid and chip, remove the packing colloid part that is formed on this heat sink again, avoid the chip rhegma in the existing semiconductor packaging process or excessive glue caused influences outward appearance and increase removes problems such as step and cost, the operation of heat sink and die bonding of need not worrying is subjected to highly control will change the problem of encapsulating mould with the change of product size, so can reduce the management cost of packaging cost and mould.

Claims (27)

1. a heat-radiation type package structure method for making is characterized in that, this method for making comprises:
At least one semiconductor chip connect put and be connected electrically on the chip carrier;
Heat sink connect put on this chip, this heat sink is by the insulation sandwich layer and connects the thin metal layer of putting on this upper and lower surface of insulation sandwich layer and constituted, and be formed with at least one heat conduction through hole in this insulation sandwich layer;
Carry out the Encapsulation Moulds compression technology, make complete semiconductor chip and this heat sink that is positioned on this chip carrier that envelope of packing colloid; And
Around package assembling, carry out cutting technique, and remove the packing colloid on this heat sink metals thin layer, expose outside the thin metal layer of this heat sink.
2. heat-radiation type package structure method for making as claimed in claim 1, it is characterized in that, this chip carrier is substrate or lead frame, its form be adopt matrix form arrangement, stripe-arrangement or single form one of them, be electrically connected to this chip carrier for chip in the mode of bonding wire or flip-chip.
3. heat-radiation type package structure method for making as claimed in claim 1 is characterized in that this chip carrier is provided with a plurality of conductive components, forms electrical connection for this chip and external device.
4. heat-radiation type package structure method for making as claimed in claim 1 is characterized in that, this semiconductor chip connect put and be electrically connected to this chip carrier after, also can on this chip, connect earlier and put buffering spacer, on this buffering spacer, connect again and put this heat sink.
5. heat-radiation type package structure method for making as claimed in claim 4 is characterized in that, the material of this buffering spacer be waste chips or metal one of them.
6. heat-radiation type package structure method for making as claimed in claim 1 is characterized in that, the material of this insulation sandwich layer is BT resin or FR4 resin, and this thin metal layer is a Copper Foil, and this heat conduction through hole is the copper facing hole.
7. heat-radiation type package structure method for making as claimed in claim 1, it is characterized in that, be coated with interface layer on the thin metal layer of this insulation sandwich layer upper surface, the material of this interface layer be nickel, chromium, gold or its alloy one of them so that remove the packing colloid that is formed on this thin metal layer.
8. heat-radiation type package structure method for making as claimed in claim 1 is characterized in that, the thin metal layer of this insulation sandwich layer lower surface is to carry out melanism or brown processing, uses so as to thin metal layer and packing colloid indirect cooperation that this insulation sandwich layer lower surface is provided.
9. heat-radiation type package structure method for making as claimed in claim 1, it is characterized in that this heat sink connects in correspondence and puts the chip position place, is formed with the opening of the thin metal layer that exposes outside the heat sink upper surface, this chip is accommodated in the opening, and touches the thin metal layer of this heat sink upper surface.
10. a heat-radiation type package structure method for making is characterized in that, this method for making comprises:
Prepare matrix form chip carrier module sheet, this chip carrier module sheet is made of a plurality of chip carriers that are the array way arrangement;
Connect and put at least one chip, and make this chip be electrically connected to this chip carrier in the predetermined position of this chip carrier respectively;
Heat sink connect put on this chip, this heat sink is by the insulation sandwich layer and connects the thin metal layer of putting on this upper and lower surface of insulation sandwich layer and constituted, and be formed with at least one heat conduction through hole in this insulation sandwich layer;
Carry out the Encapsulation Moulds compression technology, make complete semiconductor chip and this heat sink that is positioned on this chip carrier that envelope of packing colloid;
Cut single job, so as to forming the semi-finished product of individual semiconductor package part; And
Remove the packing colloid on this heat sink metals thin layer, expose outside the thin metal layer of this heat sink.
11. heat-radiation type package structure method for making as claimed in claim 10 is characterized in that, this chip carrier is substrate or lead frame, supplies chip to be electrically connected to this chip carrier in the mode of bonding wire or flip-chip.
12. heat-radiation type package structure method for making as claimed in claim 10 is characterized in that this chip carrier is provided with a plurality of conductive components, forms electrical connection for this chip and external device.
13. heat-radiation type package structure method for making as claimed in claim 10 is characterized in that, this semiconductor chip connect put and be electrically connected to this chip carrier after, also can on this chip, connect earlier and put a buffering spacer, on this buffering spacer, connect again and put this heat sink.
14. heat-radiation type package structure method for making as claimed in claim 13 is characterized in that, the material of this buffering spacer is waste chips or metal.
15. heat-radiation type package structure method for making as claimed in claim 10 is characterized in that, the material of this insulation sandwich layer is BT resin or FR4 resin, and this thin metal layer is a Copper Foil, and this heat conduction through hole is the copper facing hole.
16. heat-radiation type package structure method for making as claimed in claim 10, it is characterized in that, be coated with interface layer on the thin metal layer of this insulation sandwich layer upper surface, the material of this interface layer be nickel, chromium, gold or its alloy one of them so that remove the packing colloid that is formed on this thin metal layer.
17. heat-radiation type package structure method for making as claimed in claim 10 is characterized in that, the thin metal layer of this insulation sandwich layer lower surface is to carry out melanism or brown processing, uses so as to thin metal layer and packing colloid indirect cooperation that this insulation sandwich layer lower surface is provided.
18. heat-radiation type package structure method for making as claimed in claim 10, it is characterized in that this heat sink connects in correspondence and puts the chip position place, is formed with the opening that exposes outside heat sink upper surface thin metal layer, this chip is accommodated in the opening, and touches the thin metal layer of this heat sink upper surface.
19. a heat-radiation type package structure is characterized in that, this encapsulating structure comprises:
Chip carrier;
Semiconductor chip connects and puts and be electrically connected on this chip carrier;
Heat sink connects and puts on this semiconductor chip, and this heat sink is made of insulation sandwich layer and the thin metal layer that is coated on this upper and lower surface of insulation sandwich layer, and is formed with at least one heat conduction through hole in this insulation sandwich layer; And
Packing colloid is formed between this heat sink and the chip carrier, is used to coat this semiconductor chip.
20. heat-radiation type package structure as claimed in claim 19 is characterized in that, this chip carrier is substrate or lead frame, and this chip is that mode with bonding wire or flip-chip is electrically connected to this chip carrier.
21. heat-radiation type package structure as claimed in claim 19 is characterized in that, this chip carrier is provided with a plurality of conductive components, forms electrical connection for this chip and external device.
22. heat-radiation type package structure as claimed in claim 19 is characterized in that, this encapsulating structure also comprises the buffering spacer that is arranged between this semiconductor chip and this heat sink.
23. heat-radiation type package structure as claimed in claim 22 is characterized in that, the material of this buffering spacer is waste chips or metal.
24. heat-radiation type package structure as claimed in claim 19 is characterized in that, the material of this insulation sandwich layer is BT resin or FR4 resin, and this thin metal layer is a Copper Foil, and this heat conduction through hole is the copper facing hole.
25. heat-radiation type package structure as claimed in claim 19 is characterized in that, is coated with interface layer on the thin metal layer of this insulation sandwich layer upper surface, the material of this interface layer be nickel, chromium, gold or its alloy one of them.
26. heat-radiation type package structure as claimed in claim 19 is characterized in that, the thin metal layer of this insulation sandwich layer lower surface is to handle through melanism or brown.
27. heat-radiation type package structure as claimed in claim 19, it is characterized in that this heat sink connects in correspondence and puts the chip position place, is formed with the opening that exposes outside heat sink upper surface thin metal layer, this chip is accommodated in the opening, and touches the thin metal layer of this heat sink upper surface.
CNB2005100511347A 2005-02-28 2005-02-28 Heat radiation type packaging structure and its making method Expired - Fee Related CN100446200C (en)

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