CN100412658C - Display and crystal coated glass package structure - Google Patents
Display and crystal coated glass package structure Download PDFInfo
- Publication number
- CN100412658C CN100412658C CNB2005100986632A CN200510098663A CN100412658C CN 100412658 C CN100412658 C CN 100412658C CN B2005100986632 A CNB2005100986632 A CN B2005100986632A CN 200510098663 A CN200510098663 A CN 200510098663A CN 100412658 C CN100412658 C CN 100412658C
- Authority
- CN
- China
- Prior art keywords
- weld pad
- mentioned
- pad pattern
- lead
- wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
The related display comprises: a display panel with a display area included some pixel patterns and a non-display area with multiple wires, an insulation layer with a first and second opening to expose the first and second contact areas of wires on the wire, multiple first/second welding pad patterns above the first/second contact area and connected with the wire through the first/second opening, a conductive layer, and at least one chip. Wherein, the second pad pattern has more size than the first one. This invention can improve signal display effect.
Description
Technical field
The present invention relates to a kind of display, and be particularly related to a kind of application crystal coated glass package structure (Chip On Glass, display COG).
Background technology
Along with developing by leaps and bounds of video technique, display miscellaneous also develops thereupon.Generally speaking, has display panel (display panel) in the display in order to display message, and display panel is controlled by chip, by the chip computing and digital signal is provided, with the display effect of each pixel cell on the control display panel and and then produce picture.Yet, between chip and display panel, need utilize encapsulating structure that both are electrically connected.
Generally speaking, the encapsulating structure of display can adopt chip-flexible circuit board encapsulating structure (Chip On Film is hereinafter referred to as COF).When using the COF encapsulating structure, for the lead-in wire (lead wire) that is reduced in display panel one side and the contact impedance between the weld pad pattern (pad pattern), generally be to form a plurality of contact windows (contact hole) in the insulation course that utilizes above lead-in wire, so that cover weld pad pattern on the insulation course contact area between can improving it and go between by contact window.
But, because the production cost of COF is higher, thus in small-medium size or even large size panel, major part be utilize crystal coated glass package structure (Chip On Glass is hereinafter referred to as COG) with Chip Packaging on display panel.Fig. 1 is the synoptic diagram of the COG encapsulating structure in the known displays.Please refer to Fig. 1, perimeter circuit district on display panel 100 is provided with a plurality of weld pads 110 and a plurality of detection welding pads 120 (only illustrating among the figure), this weld pad 110 be by the part go between 112 and weld pad pattern 114 constituted, and detection welding pad 120 be by the part go between 112 and weld pad pattern 116 constituted.And between lead-in wire 112 and weld pad pattern 114,116, having insulation course 130, this insulation course 130 has opening 132,134 respectively, to allow weld pad pattern 114,116 be electrically connected with lead-in wire 112 respectively.
Please continue with reference to Fig. 1, chip 140 has a plurality of contacts 142 (only illustrating among Fig. 1), and contact 142 is to be electrically connected with weld pad 110 by anisotropy conductiving glue 150.Because weld pad 110 is to be formed on the same lead-in wire 112 with detection welding pad 120, so when chip 140 is engaged on the weld pad 110, can utilize testing tool 170 engaged test weld pads 120 whether to be in normal state with being electrically connected of weld pad 110 with detection chip 140.
Yet, in the COG encapsulating structure,,, increase a plurality of contact windows and reduce the mode of contact impedance so that the COG encapsulating structure can not be suitable for is above-mentioned as in the COF encapsulating structure because weld pad 110 areas are less and 112 each other the spacings that go between are narrower.Therefore, can there be very big contact impedance between weld pad pattern 114 in the weld pad 110 and the lead-in wire 112, and seriously consumes the signal 160 that chip 140 outputs to lead-in wire 112.
In more detail, as shown in Figure 1, chip 140 is after output signal 160, and this signal 160 can arrive in the lead-in wire 112 viewing area of continuing to be passed to display panel 100 afterwards again by the interface of weld pad pattern in the weld pad 110 114 and lead-in wire 112.But because weld pad pattern 114 and the interface of lead-in wire between 112 exist sizable contact impedance, so signal 160 can produce a large amount of consumption by at the interface the time, thus, signal 160 just can't be delivered in the display panel 100 smoothly.The result will cause signal 160 undercapacities of chip 140, and abnormal signal and the bad situation generation of demonstration.
Summary of the invention
In view of this, purpose of the present invention is providing a kind of display exactly, can effectively reduce the abnormal signal that is caused because of the chip undercapacity in the display or show bad phenomenon, and then help the raising of display quality.
A further object of the present invention provides a kind of crystal coated glass package structure, can effectively reduce the phenomenon of the abnormal signal that is caused because of the chip undercapacity.
Based on above-mentioned purpose and other purpose, the present invention proposes a kind of display, comprises display panel, a plurality of leads, insulation course, a plurality of first weld pad pattern, a plurality of second weld pad pattern, conductive layer and at least one chip.Display panel has viewing area and non-display area, and is provided with a plurality of pattern of pixels in the viewing area.Lead-in wire is arranged on the non-display area, and each lead-in wire has first contact region and second contact region.Insulation course is arranged on each lead-in wire, and insulation course has a plurality of first openings and a plurality of second opening, exposes first contact region and second contact region of each lead-in wire respectively.Each first weld pad pattern setting is in the top, first contact region of each above-mentioned these lead-in wire, and electrically contacts with each lead-in wire by each first opening and to be connected.Each second weld pad pattern setting is in the top, second contact region of each above-mentioned these lead-in wire, and electrically contact with each lead-in wire by each second opening and to be connected, and second weld pad pattern of each above-mentioned these lead-in wire top electrically contacts the area of part electrically contacts part greater than each first weld pad pattern area.Conductive layer is arranged on the insulation course, and is electrically connected the first weld pad pattern and each the second weld pad pattern that is positioned at each above-mentioned these lead-in wire top.Chip is arranged on the first weld pad pattern, and this chip has a plurality of contacts, and each contact is electrically connected with each first weld pad pattern on this chip.
In one of the present invention preferred embodiment, the lead-in wire in the above-mentioned first weld pad pattern and above-mentioned these first contact regions constitutes first weld pad, and the lead-in wire in the second weld pad pattern and above-mentioned these second contact regions constitutes second weld pad.And chip is to be arranged on first weld pad in the mode of covering the crystal glass joint.
In one of the present invention preferred embodiment, the material of the above-mentioned first weld pad pattern and the second weld pad pattern for example is an indium tin oxide.
In one of the present invention preferred embodiment, the material of above-mentioned lead-in wire for example is to be selected from titanium, aluminium, molybdenum, chromium, aluminium neodymium alloy and to form one of them.
In one of the present invention preferred embodiment, aforementioned display device for example also comprises anisotropy conductiving glue, is arranged between the chip and the first weld pad pattern.
In one of the present invention preferred embodiment, the material of above-mentioned conductive layer for example is an indium tin oxide.
In one of the present invention preferred embodiment, above-mentioned each pattern of pixels for example comprises thin film transistor (TFT), pixel electrode and data line and sweep trace, and wherein data line and sweep trace are controlled pixel electrode by thin film transistor (TFT).
Based on above-mentioned purpose and other purpose, the present invention reintroduces a kind of crystal coated glass package structure, and it comprises substrate, metal level, insulation course, the first weld pad pattern, the second weld pad pattern, conductive layer and chip.Metal level is arranged on the substrate, and metal level has first contact region and second contact region.Insulation course is arranged on the metal level, and insulation course has first opening and second opening, exposes first contact region and second contact region of metal level respectively.The first weld pad pattern setting is in first contact region top, and electrically contacts with metal level by first opening and to be connected.The second weld pad pattern setting is in second contact region top, and electrically contacts with metal level by second opening and to be connected, and the second weld pad pattern and this metal level electrically contact the area of part and electrically contact area partly greater than the first weld pad pattern and this metal level.Conductive layer is arranged on the insulation course, and is electrically connected the first weld pad pattern and the second weld pad pattern.Chip is arranged on the first weld pad pattern, and this chip has a plurality of contacts, and this chip is electrically connected with the first weld pad pattern by contact on it.
In one of the present invention preferred embodiment, the metal level of the above-mentioned first weld pad pattern and first contact region constitutes first weld pad, and the metal level of the second weld pad pattern and second contact region constitutes second weld pad.
Display of the present invention is electrically connected first weld pad because of utilizing conductive layer with second weld pad, and makes the signal of being exported by chip to enter in the panel by the less path of contact impedance.So this display can reduce the situation that makes signal losses because of contact impedance is too high effectively to be taken place, and and then raising display quality.
State with other purpose, feature and advantage and can become apparent on the present invention for allowing, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 is the synoptic diagram of the COG encapsulating structure in the known displays.
Fig. 2 is the synoptic diagram of a kind of display in the preferred embodiment of the present invention.
Fig. 2 A is along the diagrammatic cross-section of A-A ' line among Fig. 2.
Fig. 3 is the schematic equivalent circuit of Fig. 2 A.
Fig. 4 A is for being electrically connected the synoptic diagram of the first weld pad pattern.
Fig. 4 B is for being electrically connected the synoptic diagram of the first weld pad pattern and the second weld pad pattern.
Fig. 5 is the synoptic diagram of a kind of crystal coated glass package structure in the present invention's the preferred embodiment.
The main element description of symbols
100,210: display panel
110: weld pad
112,222: lead-in wire
114,116: the weld pad pattern
120: detection welding pad
130,240,440: insulation course
132,134,242,244,442,444: opening
140,250,450: chip
142,252,452: contact
150,260,460: anisotropy conductiving glue
160,280,480: signal
170: testing tool
200: display
212: the viewing area
212a: pattern of pixels
212a1: thin film transistor (TFT)
212a2: pixel electrode
212a3: data line
212a4: sweep trace
214: non-display area
220,420: the first weld pads
222a, 222b, 422a, 422b: contact area
224,424: the first weld pad patterns
226,426: the second weld pad patterns
230,430: the second weld pads
270,470: conductive layer
300: equivalent electrical circuit
400: crystal coated glass package structure
410: substrate
422: metal level
R220, R270, R230, R222: resistance
A-A ': profile line
Embodiment
First embodiment
Fig. 2 is the synoptic diagram of a kind of display in the preferred embodiment of the present invention.Fig. 2 A is along the diagrammatic cross-section of A-A ' line among Fig. 2.Please be simultaneously with reference to Fig. 2 and Fig. 2 A, display 200 comprises display panel 210, a plurality of leads 222, insulation course 240, a plurality of first weld pad pattern 224, a plurality of second weld pad pattern 226, conductive layer 270 and at least one chip 250.Display panel 210 has viewing area 212 and non-display area 214, and is provided with a plurality of pattern of pixels 212a in the viewing area 212.Lead-in wire 222 is arranged on the non-display area 214, and respectively goes between and 222 have the first contact region 222a and the second contact region 222b.Insulation course 240 is arranged at and respectively goes between on 222, and insulation course 240 has a plurality of first openings 242 and a plurality of second opening 244, exposes respectively go between 222 the first contact region 222a and the second contact region 222b respectively.Each first weld pad pattern 224 is arranged at first contact region 222a top, and is electrically connected with each lead-in wire 222 by each first opening 242.Each second weld pad pattern 226 is arranged at second contact region 222b top, and is electrically connected with each lead-in wire 222 by each second opening 244, and the area of each second weld pad pattern 226 is greater than the area of each first weld pad pattern 224.Conductive layer 270 is arranged on the insulation course 240, and is electrically connected each first weld pad pattern 224 and each second weld pad pattern 226.Chip 250 is arranged on the first weld pad pattern 224, and chip 250 is electrically connected with the first weld pad pattern 224.
Please refer to Fig. 2, in a preferred embodiment, pattern of pixels 212a for example comprises thin film transistor (TFT) 212a1, pixel electrode 212a2 and data line 212a3 and sweep trace 212a4, and wherein data line 212a3 and sweep trace 212a4 are by thin film transistor (TFT) 212a1 control pixel electrode 212a2.
Please refer to Fig. 2 A, the lead-in wire 222 among the first weld pad pattern 224 and the first contact region 222a constitutes first weld pad 220, and in one embodiment, first weld pad 220 can be a chip pad, in order to be electrically connected with chip 250.And chip 250 has a plurality of contacts 252 (only illustrating among Fig. 2 A), chip 250 also utilizes the mode of covering crystal glass joint (COG) to be arranged on first weld pad 220, and use anisotropy conductiving glue 260, be arranged between the chip 250 and the first weld pad pattern 224, chip 250 encapsulated and chip 250 is electrically connected to purpose on first weld pad 220 reaching.
In addition, lead-in wire 222 among the second weld pad pattern 226 and the second contact region 222b constitutes second weld pad 230, in one embodiment, second weld pad 230 can be the extra supplemental pad that forms, or generally forms the detection welding pad whether electrical connection that comes between the test chip 250 and first weld pad 220 is in normal condition.In one embodiment, the material of the first weld pad pattern 224 and the second weld pad pattern 226 for example is an indium tin oxide, and makes in the mode of sputter.
Please continue the A with reference to Fig. 2, in a preferred embodiment, the material of lead-in wire 222 for example is to be selected from titanium, aluminium, molybdenum, chromium, aluminium neodymium alloy and to form one of them.Wherein, under the consideration of contact impedance and environmental protection, aluminium is frequent selected material as lead-in wire 222, but since the characteristic that aluminium is corroded easily, the therefore general modes that adopt alloy more.But the contact impedance between different metal materials and the weld pad pattern 224,226 also is not quite similar.With aluminium neodymium alloy and titanium is example, under identical contact area, the contact impedance between weld pad pattern 224,226 and the aluminium neodymium alloy can (AlNd/ITO about 1,000～1 much larger than the contact impedance between weld pad pattern 224,226 and the titanium alloy, 500 Ω, and about 200～400 Ω of Ti/ITO).
Hold above-mentionedly, and because the consideration of production cost, many producers are to use the higher metal of contact impedance, increase the mode of contact window to solve the problem of contact impedance so must use in known.But in the COG encapsulating structure, because weld pad 220 areas are less, and the spacing that goes between between 222 is narrower, therefore can't utilize the mode of above-mentioned increase contact window to reduce contact impedance at all.So the present invention's display 200 utilizes conductive layer 270 to be electrically connected the mode of first weld pads 220 and second weld pad 230, it is too high and make the problem of signal losses promptly can to solve contact impedance effectively.
In more detail, when second weld pad 230 for example was detection welding pad, chip 250 can utilize the testing tool (not shown) test chip 250 and first weld pad 220 whether to be in normal status of electrically connecting after joining on first weld pad 220.After test was finished, second weld pad 230 (detection welding pad) in the known technology did not promptly have use.But the present invention is after test is finished, and utilizes conductive layer 270 to be electrically connected first weld pad 220 and second weld pad 230 again, makes first weld pad 220 form circuit in parallel with second weld pad 230, so as to reducing contact impedance.In one embodiment, the material of conductive layer 270 for example is an indium tin oxide, and the method that forms for example is a sputter.
Because the area of the second weld pad pattern 226 greater than the area of the first weld pad pattern 224, so by contrast, can have less contact impedance between second weld pad pattern 224 in second weld pad 230 and the lead-in wire 222.Principle according to the circuit shunting, the signal 280 of chip 250 output can change by conductive layer 270, the second weld pad pattern 226 and go between 222 and arrive in the viewing area of display panel 210, and can be directly through the contact impedance bigger first weld pad pattern 224 and the interface that goes between between 222.
Fig. 3 is the schematic equivalent circuit of Fig. 2 A.Please refer to Fig. 3, this equivalent circuit 300 can be considered by the first weld pad resistance R 220, resistance conductive layer R270, the second weld pad resistance R 230 and lead resistance R222 and is constituted jointly.Owing to utilize conductive layer 270 that the first weld pad pattern 224 is electrically connected with the second weld pad pattern 226, the signal 280 of chip 250 outputs promptly can be sent in the viewing area of display panel 210 by the less path of contact impedance.Just signal 280 can pass through the less R270 of resistance, R230 and R222 successively by path as shown in Figure 3, arrive at last in the viewing area of display panel 210, and then driving each thin film transistor (TFT) 212a1 as shown in Figure 2.Because in transmission path shown in Figure 3, signal 280 can be through the bigger R220 of contact impedance, so display of the present invention 200 can reduce chip 250 undercapacities effectively, and the abnormal signal that causes or show bad situation.
For verifying this design, designed between single soldering pad layer the measurement result that contact testing impedance element (two pad pattern parallel contact resistance test element group) between contact testing impedance element (one pad pattern contact resistance test element group) and two soldering pad layer is verified the contact impedance when only having first weld pad 220 and first weld pad 220 in parallel with second weld pad 230 experimentally.Fig. 4 A is for being electrically connected the synoptic diagram of the first weld pad pattern.Fig. 4 B is for being electrically connected the synoptic diagram of the first weld pad pattern and the second weld pad pattern.And measurement result is as shown in table 1.
Table one
The metering system of TEG (test element group) is total contact impedance of measuring 100 groups first weld pad 220 earlier, and 100 groups the first weld pad 220 total contact impedance in parallel with second weld pad 230, obtain each again divided by the group number and organize the numerical value that first weld pad 220 or each are organized first weld pad 220 contact impedance in parallel with second weld pad 230.As shown in Table 1, design of the present invention can significantly reduce contact impedance, and contact impedance can be reduced to below about 200 Ω (being electrically connected first weld pad and second weld pad) by about 500 Ω (first weld pad is only arranged).Therefore, it is too high and make signal losses or show bad problem that the present invention's display can solve contact impedance really.
Second embodiment
Fig. 5 is the synoptic diagram of a kind of crystal coated glass package structure in the present invention's the preferred embodiment.This crystal coated glass package structure 400 comprises substrate 410, metal level 422, insulation course 440, at least one first weld pad pattern 424, at least one second weld pad pattern 426, conductive layer 470 and at least one chip 450.Metal level 422 is arranged on the substrate 410, and metal level 422 has the first contact region 422a and the second contact region 422b.Insulation course 440 is arranged on the metal level 422, and insulation course 440 has first opening 442 and second opening 444, exposes the first contact region 422a and the second contact region 422b of metal level 422 respectively.The first weld pad pattern 424 is arranged at first contact region 422a top, and is electrically connected with metal level 422 through first opening 442.The second weld pad pattern 426 is arranged at second contact region 422b top, and is electrically connected with metal level 422 by second opening 444, and the area of the second weld pad pattern 426 is greater than the area of the first weld pad pattern 424.Conductive layer 470 is arranged on the insulation course 440, and is electrically connected the first weld pad pattern 424 and the second weld pad pattern 426.Chip 450 is arranged on the first weld pad pattern 424, and chip 450 is electrically connected with the first weld pad pattern 424.
Please refer to Fig. 5, in a preferred embodiment, the metal level 422 of the first weld pad pattern 424 and the first contact region 422a constitutes first weld pad 420, and the metal level 422 of the second weld pad pattern 426 and the second contact region 422b constitutes second weld pad 430.And the material of the first weld pad pattern 424 and the second weld pad pattern 426 for example is an indium tin oxide.The material of metal level 422 for example is to be selected from titanium, aluminium, molybdenum, chromium, aluminium neodymium alloy and to form one of them.
In addition, cover crystal glass structure 400 and for example also comprise anisotropy conductiving glue 460, be arranged between the chip 450 and first weld pad 420, and reach packaged chip 450 and the purpose that is electrically connected the chip 450 and first weld pad 420.
It should be noted that, in one of the present invention preferred embodiment, the material of above-mentioned conductive layer 470 for example is an indium tin oxide, it is parallel with one another with first weld pad 420 and second weld pad 430 to see through conductive layer 470, and the signal 480 that chip 450 is exported can be followed the less path of contact impedance and output in the electronic component on the substrate 410.Substrate 410 for example is a display panel, and then signal 480 can pass through less conductive layer 470, the second weld pad pattern 426 and the metal level 422 of contact impedance in regular turn, and arrives in the display panel and the drive thin film transistors (not shown).Substrate 210 also can be other circuit board or motherboard etc.Crystal coated glass package structure 400 by the present invention can reduce the phenomenon of signal 480 undercapacities, and signal 480 is delivered in the electronic component effectively.
In sum, display and the crystal coated glass package structure in the present invention has following advantage:
The present invention's display and crystal coated glass package structure utilize conductive layer that first weld pad (chip weld pad) and second weld pad (auxiliary pad or detection welding pad) are electrically connected to each other, and make signal to transmit by the less path of contact impedance.Therefore, the chip signal undercapacity can effectively be reduced and the abnormal signal that causes or show that bad situation takes place.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; any person of ordinary skill in the field; without departing from the spirit and scope of the invention; when can doing a little change and improvement, so the present invention's protection domain is as the criterion when looking the claim person of defining.
Claims (10)
1. display is characterized in that comprising:
Display panel has viewing area and non-display area, is provided with a plurality of pattern of pixels in this viewing area;
A plurality of leads is arranged on this non-display area, and each above-mentioned these lead-in wire has first contact region and second contact region;
Insulation course is arranged on each above-mentioned these lead-in wire, and this insulation course has a plurality of first openings and a plurality of second opening, exposes this first contact region and this second contact region of each above-mentioned these lead-in wire respectively;
A plurality of first weld pad patterns, each above-mentioned these first weld pad pattern setting are in top, first contact region of each above-mentioned these lead-in wire, and electrically contact with each above-mentioned these lead-in wire by each above-mentioned these first opening and to be connected;
A plurality of second weld pad patterns, each above-mentioned these second weld pad pattern setting is in the top, second contact region of each above-mentioned these lead-in wire, and electrically contact with each above-mentioned these lead-in wire by each above-mentioned these second opening and to be connected, and second weld pad pattern of each above-mentioned these lead-in wire top electrically contacts the area of part electrically contacts part greater than the first weld pad pattern area;
Conductive layer is arranged on this insulation course, and is electrically connected the first weld pad pattern and the second weld pad pattern that is positioned at each above-mentioned these lead-in wire top; And
Chip is arranged on above-mentioned these first weld pad patterns, and this chip has a plurality of contacts, and each contact is electrically connected with each above-mentioned these first weld pad pattern on this chip.
2. display according to claim 1, it is characterized in that the lead-in wire in above-mentioned these first weld pad patterns and above-mentioned these first contact regions constitutes a plurality of first weld pads, and the lead-in wire in above-mentioned these second weld pad patterns and above-mentioned these second contact regions constitutes a plurality of second weld pads.
3. display according to claim 2 is characterized in that this chip is to be arranged on above-mentioned these first weld pads in the mode of covering the crystal glass joint.
4. display according to claim 1 is characterized in that the material of above-mentioned these first weld pad patterns and above-mentioned these second weld pad patterns comprises indium tin oxide.
5. display according to claim 1, the material that it is characterized in that above-mentioned these lead-in wires are to be selected from titanium, aluminium, molybdenum, chromium, aluminium neodymium alloy and to form one of them.
6. display according to claim 1 is characterized in that also comprising anisotropy conductiving glue, is arranged between this chip and above-mentioned these first weld pad patterns.
7. display according to claim 1 is characterized in that the material of this conductive layer comprises indium tin oxide.
8. display according to claim 1 is characterized in that each above-mentioned these pattern of pixels comprises:
Thin film transistor (TFT);
Pixel electrode; And
Data line and sweep trace, wherein this data line and this sweep trace are controlled this pixel electrode by this thin film transistor (TFT).
9. crystal coated glass package structure is characterized in that comprising:
Substrate;
Metal level is arranged on this substrate, and this metal level has first contact region and second contact region;
Insulation course is arranged on this metal level, and this insulation course has first opening and second opening, exposes this first contact region and this second contact region of this metal level respectively;
The first weld pad pattern is arranged at top, this first contact region, and electrically contacts with this metal level by this first opening and to be connected;
The second weld pad pattern, be arranged at this top, second contact region, and electrically contact with this metal level by this second opening and to be connected, and this second weld pad pattern and this metal level electrically contact the area of part electrically contacts part greater than this first weld pad pattern and this metal level area;
Conductive layer is arranged on this insulation course, and is electrically connected this first weld pad pattern and this second weld pad pattern; And
Chip is arranged on this first weld pad pattern, and this chip has a plurality of contacts, and this chip is electrically connected with this first weld pad pattern by contact on it.
10. crystal coated glass package structure according to claim 9 it is characterized in that this metal level of this first weld pad pattern and this first contact region constitutes first weld pad, and this metal level of this second weld pad pattern and this second contact region constitutes second weld pad.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100986632A CN100412658C (en) | 2005-09-07 | 2005-09-07 | Display and crystal coated glass package structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100986632A CN100412658C (en) | 2005-09-07 | 2005-09-07 | Display and crystal coated glass package structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1928670A CN1928670A (en) | 2007-03-14 |
| CN100412658C true CN100412658C (en) | 2008-08-20 |
Family
ID=37858693
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100986632A Expired - Fee Related CN100412658C (en) | 2005-09-07 | 2005-09-07 | Display and crystal coated glass package structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100412658C (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107121855B (en) | 2017-07-04 | 2019-10-01 | 京东方科技集团股份有限公司 | A kind of array substrate and preparation method thereof, display device |
| CN107422551A (en) * | 2017-07-25 | 2017-12-01 | 武汉天马微电子有限公司 | A kind of display device |
| CN113448128B (en) * | 2021-06-23 | 2023-07-21 | 惠科股份有限公司 | Array substrate, display panel and display device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5636329A (en) * | 1994-06-23 | 1997-06-03 | Nec Corporation | Liquid crystal display apparatus having terminal protected from break down |
| JPH11242238A (en) * | 1997-12-26 | 1999-09-07 | Sharp Corp | Reflection type liquid crystal display device, manufacture therefor and manufacture of circuit board |
| CN1368718A (en) * | 2001-02-07 | 2002-09-11 | 三星电子株式会社 | Liquid crystal display and its making method |
| CN1603925A (en) * | 2000-07-27 | 2005-04-06 | 三星电子株式会社 | Liquid crystal display |
| CN1790143A (en) * | 2004-11-24 | 2006-06-21 | 三洋电机株式会社 | Display device and method for manufacturing the same |
-
2005
- 2005-09-07 CN CNB2005100986632A patent/CN100412658C/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5636329A (en) * | 1994-06-23 | 1997-06-03 | Nec Corporation | Liquid crystal display apparatus having terminal protected from break down |
| JPH11242238A (en) * | 1997-12-26 | 1999-09-07 | Sharp Corp | Reflection type liquid crystal display device, manufacture therefor and manufacture of circuit board |
| CN1603925A (en) * | 2000-07-27 | 2005-04-06 | 三星电子株式会社 | Liquid crystal display |
| CN1368718A (en) * | 2001-02-07 | 2002-09-11 | 三星电子株式会社 | Liquid crystal display and its making method |
| CN1790143A (en) * | 2004-11-24 | 2006-06-21 | 三洋电机株式会社 | Display device and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1928670A (en) | 2007-03-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4419166B2 (en) | LCD panel | |
| US8467028B2 (en) | Electro-optical device and electronic apparatus | |
| US8023059B2 (en) | Array substrate of liquid crystal display, method of repairing same, and liquid crystal display | |
| WO2021238464A1 (en) | Display panel and crack detection method therefor, and display device | |
| CN102566167B (en) | Array substrate | |
| US8305542B2 (en) | Thin film transistor array substrate with improved test terminals | |
| TW444268B (en) | Display panel | |
| CN107195249A (en) | Display device | |
| TWI324269B (en) | Display panel having repair lines and signal lines disposed at different substrate | |
| CN102243383A (en) | Fan-out signal line structure and display panel | |
| US20050099565A1 (en) | Liquid crystal display device and inspecting method of bonding state between liquid crystal display panel and drive IC | |
| KR20010083973A (en) | Tape Carrier Package with Window and Liquid Crystal Display Device containing the TCP | |
| US20090033822A1 (en) | Liquid Crystal Display and Substrate Thereof | |
| CN113380656A (en) | Display substrate to be cut, display substrate and display device thereof | |
| CN100412658C (en) | Display and crystal coated glass package structure | |
| CN103680317A (en) | Array substrate, manufacturing method thereof and displaying device | |
| US6856309B2 (en) | Liquid crystal display device | |
| JP2008033094A (en) | Display device | |
| CN101221971A (en) | Plane display device and its testing method | |
| KR20060103652A (en) | Liquid crystal display device | |
| JPH11119683A (en) | Method of inspecting liquid crystal display panel | |
| KR20150048364A (en) | Driving integrated circuit pad unit and flat display panel having the same | |
| CN109901334B (en) | Array substrate, display device and binding state detection method thereof | |
| CN102394231A (en) | Chip connecting structure used for liquid crystal display | |
| CN218547885U (en) | <xnotran></xnotran> |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080820 Termination date: 20190907 |