CN100403034C - Low power consumption and low temperature drift voltage detection circuit independent from technique - Google Patents

Low power consumption and low temperature drift voltage detection circuit independent from technique Download PDF

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Publication number
CN100403034C
CN100403034C CNB2003101220852A CN200310122085A CN100403034C CN 100403034 C CN100403034 C CN 100403034C CN B2003101220852 A CNB2003101220852 A CN B2003101220852A CN 200310122085 A CN200310122085 A CN 200310122085A CN 100403034 C CN100403034 C CN 100403034C
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China
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circuit
voltage
pipe
bleeder
power consumption
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CN1635383A (en
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罗鹏
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Shanghai Belling Systron Microelectronics Co ltd
Shanghai Beiling Co Ltd
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SHANGHAI BELLING-SYSTRON MICROELECTRONICS Co Ltd
Shanghai Beiling Co Ltd
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Abstract

The present invention relates to a low power consumption and low temperature drift voltage detection circuit independent of processes, which comprises three paths of voltage division circuits, a switch circuit and a shaping circuit, wherein the voltage division circuits are composed of PMOS tubes P0 to P3, PMOS tubes P5 to P8, a transistor Q0 and MOS tubes P9 to P12; the switch circuit is composed of an NMOS tube N0, the gate of the NMOS tube N0 is connected to the points A of the voltage division circuits, the source of the NMOS tube N0 and the source of a PNP transistor Q1 are connected to the points B of the voltage division circuits, the drain of the NMOS tube N0 is connected to the point C of the voltage division circuit III, and the base and the collector of the PNP transistor Q1 are connected to the ground; the shaping circuit is composed of a Schmitt trigger. The present invention is characterized in that one branch of the voltage division circuit 1 is connected in series with a voltage drift compensating circuit composed of an NMOS tube N0 and a negative temperature coefficient compensating circuit composed of a PNP tube Q1. Through the present invention, the voltage value of output value LVR is basically unchanged when temperature changes, LVR voltage drift brought by process deviation is improved, and the effects that the voltage detection circuit has the advantages of low power consumption and low temperature drift and is independent of processes are achieved.

Description

Low-power consumption low temperature floats and the irrelevant voltage detecting circuit of technology
Technical field
The present invention relates to a kind of voltage detecting circuit, relate in particular to and be suitable for being built in floating with low-power consumption low temperature and voltage detecting circuit that technology is irrelevant in single-chip microcomputer, ROM, RAM or the DSP.
Background technology
As everyone knows, voltage detecting circuit is to detect service voltage to change to a certain setting value generation reset signal, when we set this standard voltage value, wishes circuit working in any environment, can both produce reset signal when this standard voltage value.But in the prior art voltage detecting circuit, variation along with flow-route and temperature, often can not satisfy this condition, and just near the standard voltage value of setting, produce reset signal, may depart under some ultimate limit state that standard voltage value has more than the 0.5V or more.
See also shown in Figure 1ly, this is the electrical schematic diagram of a kind of voltage detecting circuit of prior art.This voltage detecting circuit is made up of bleeder circuit, on-off circuit and shaping circuit.In order to guarantee low-power consumption, bleeder circuit has adopted the PMOS pipe to replace the accurate big resistance that is not easy in the integrated circuit to produce.The principle of work of above-mentioned voltage detecting circuit is that (the A place is the grid place of PMOS pipe P2) dividing potential drop gets a voltage and is about VDD/2 at the A place as P0, P1, P1 and P3, the P4 of VDD process PMOS pipe; The voltage at B place (the B place is drain electrode place of PMOS pipe P8) is about 0.7V.When VDD=5, N0 manages conducting, and the voltage of C place (the C place is drain electrode place of PMOS pipe P12) is also put the voltage 0.7V at the B place by pincers.Through back Schmidt circuit shaping, LVR is output as low level; If vdd voltage drops to a certain voltage, press deficiency so that during the conducting of N0 pipe, C place voltage can be raised to a certain voltage by the P9~P12 of PMOS pipe, produces a high impulse, passes through the Schmidt trigger shaping in A punishment, LVR just sends a reset pulse.
Though produce reset signal when above-mentioned prior art voltage detecting circuit can change (decline) to a certain setting value at service voltage, the defective of Cun Zaiing is in actual applications:
Since the partial pressure value at A place not along with temperature variation, and the cut-in voltage at N0 place is to be the negative temperature coefficient variation along with temperature variation, so under different temperatures, Schmidt trigger output valve LVR magnitude of voltage has fluctuation;
Since the partial pressure value at A place not along with process deviation changes, and the cut-in voltage at N0 place is along with the process deviation variation, so under different technology, Schmidt trigger output valve LVR magnitude of voltage has fluctuation.
Summary of the invention
The object of the present invention is to provide a kind of low-power consumption low temperature to float and the irrelevant voltage detecting circuit of technology, it can guarantee when temperature variation that the output valve LVR magnitude of voltage of shaping circuit is constant substantially, and can improve the LVR voltage drift that process deviation brings.
The object of the present invention is achieved like this:
A kind of low-power consumption low temperature floats and the irrelevant voltage detecting circuit of technology, comprising: No. three bleeder circuits, an on-off circuit, a shaping circuit; Described No. three bleeder circuits comprise, first bleeder circuit of forming by P0, P1, P2 and the P3 of PMOS pipe, second bleeder circuit of forming by P5, P6, P7, P8 and the transistor Q0 of PMOS pipe, the 3rd bleeder circuit of forming by P9, P10, P11 and the P12 of PMOS pipe; Described on-off circuit is made of NMOS pipe N0; The grid of NMOS pipe N0 is connected to the grid place of the PMOS pipe P2 of first bleeder circuit, the source electrode of NMOS pipe N0 and the source electrode of PNP transistor Q1 connect and are connected to drain electrode place of the PMOS pipe P8 of second bleeder circuit altogether, the drain electrode of NMOS pipe N0 is connected to drain electrode place of the PMOS pipe P12 of bleeder circuit, base stage and the grounded collector of PNP transistor Q0; Described shaping circuit is made up of Schmidt trigger; Be characterized in: in the branch of described bleeder circuit, be connected in series a voltage drift compensating circuit and a negative temperature coefficient compensating circuit; Wherein, described voltage drift compensating circuit is that a NMOS pipe N1 identical with NMOS pipe N0 type in the on-off circuit constitutes, the grid of this NMOS pipe N1 and drain electrode connect altogether the back simultaneously with first bleeder circuit in the PMOS grid of managing P3 be connected with drain electrode; Described negative temperature coefficient compensating circuit is made of the transistor Q1 of PNP pipe, and the emitter of transistor Q1 is connected base stage and grounded collector with the source electrode of NMOS pipe N1.
The present invention, low-power consumption low temperature floats and the irrelevant voltage detecting circuit of technology, owing to adopted above-mentioned technical scheme, makes it compared with prior art, has following advantage and good effect:
1. the present invention is owing to be connected in series a negative temperature coefficient compensating circuit on first bleeder circuit, promptly adjust at the grid dividing potential drop place of PMOS pipe P2, owing to be provided with the negative temperature coefficient compensating circuit that the transistor Q1 by the PNP pipe constitutes, the junction voltage VBE of the transistor Q1 of this PNP pipe has negative temperature coefficient feature, can compensate the negative temperature coefficient of N0 cut-in voltage thus, so when temperature variation, can guarantee that the output valve LVR magnitude of voltage of shaping circuit Schmidt trigger is constant substantially;
2. the present invention constitutes the voltage drift compensating circuit owing to be connected in series the NMOS pipe N1 that is connected by grid leak on first bleeder circuit, can improve the output valve LVR voltage drift that process deviation brings thus;
3. the present invention is because the accurate big resistance that bleeder circuit has still replaced being not easy in the integrated circuit to produce with the PMOS pipe guarantees the low-power consumption of circuit thus, thus reach voltage detecting circuit low-power consumption of the present invention, low temperature floats and with the irrelevant effect of technology.
Description of drawings
By following low-power consumption low temperature of the present invention is floated the description that combines its accompanying drawing with an embodiment of the irrelevant voltage detecting circuit of technology, can further understand purpose of the present invention, specific structural features and advantage.Wherein, accompanying drawing is:
Fig. 1 is the electrical schematic diagram of prior art voltage detecting circuit;
Fig. 2 is the electrical schematic diagram that low-power consumption low temperature of the present invention floats the voltage detecting circuit that has nothing to do with technology.
Embodiment
See also shown in Figure 2ly, this is that low-power consumption low temperature of the present invention floats the electrical schematic diagram with the irrelevant voltage detecting circuit of technology.Comprising of voltage detecting circuit of the present invention: No. three bleeder circuits 1 to 3, on-off circuit 4, shaping circuit 5.Wherein, first bleeder circuit 1 is made up of P0, P1, P2 and the P3 of PMOS pipe, and second bleeder circuit 2 is made up of P5, P6, P7, P8 and the transistor Q0 of PMOS pipe, and the 3rd bleeder circuit 3 is made up of P9, P10, P11 and the P12 of PMOS pipe; On-off circuit 4 is made of NMOS pipe N0, the grid of NMOS pipe N0 is connected to the A place (the A place is the grid place of PMOS pipe P2) of first bleeder circuit 1, the source electrode of NMOS pipe N0 and the emitter of PNP transistor Q0 are connected to the B place (the B place is drain electrode place of PMOS pipe P8) of second bleeder circuit 2, the C place of drain electrode to the three bleeder circuits 3 of NMOS pipe N0 (the C place is drain electrode place of PMOS pipe P12), base stage and the grounded collector of PNP transistor Q0; Shaping circuit 5 is made up of Schmidt trigger.Unlike the prior art be in the branch of first bleeder circuit 1, to be connected in series a voltage drift compensating circuit 6 and a negative temperature coefficient compensating circuit 7.Described voltage drift compensating circuit 6 is that a NMOS identical with NMOS pipe N0 type in the on-off circuit 4 manages N1, compare with Fig. 1 prior art, the P4 pipe of former PMOS pipe is replaced to NMOS pipe N1, the grid of this NMOS pipe N1 and drain electrode connect altogether the back simultaneously with bleeder circuit 1 in the PMOS grid of managing P3 be connected with drain electrode.Described negative temperature coefficient compensating circuit 7 is made of the transistor Q1 of PNP pipe, and the emitter of transistor Q1 is connected base stage and grounded collector with the source electrode of NMOS pipe N1.
As improvement of the present invention, at A point dividing potential drop place, adjust, because junction voltage VBE is the Q1 pipe existence of negative temperature coefficient, can compensate the negative temperature coefficient of N0 cut-in voltage, so when temperature variation, the LVR magnitude of voltage can be constant substantially; The NMOS pipe of the N1 that the while grid leak is connected can improve the LVR voltage drift that process deviation brings; In order to guarantee the low-power consumption of circuit, still replaced the accurate big resistance that is not easy in the integrated circuit to produce in the circuit with the PMOS pipe, float and irrelevant with voltage detecting circuit low-power consumption, the low temperature that reaches this invention with technology.
Principle of work of the present invention is:
As supply voltage VDD during, punish at the A of first bleeder circuit 1 and to press to such an extent that a voltage is about VDD/2 through P0, P1, P2 and the P3 of bleeder circuit 1, N1, Q1; The voltage at B place is about 0.7V.When VDD=5, the conducting of N0 in the on-off circuit 4 pipe, the voltage at C place is also put the voltage 0.7V at the B place by pincers, and through the shaping of the shaping circuit 5 of back Schmidt trigger composition, LVR is output as low level; If vdd voltage drops to a certain voltage, press deficiency so that during the conducting of N0 pipe, C place voltage can be raised to a certain voltage by the P9~P12 of the 3rd bleeder circuit 3, produces a high impulse in A punishment, through shaping circuit 5 Schmidt trigger shapings, LVR just sends a reset pulse.
When temperature raises, the cut-in voltage of N0 in the on-off circuit 4 diminishes, so that also step-down correspondingly of the A point voltage that the N0 pipe ends, because the P0~P3 of first bleeder circuit 1 and N1 are along with temperature raises, it is big that the resistance characteristic value of its performance becomes, and because the type of attachment in the circuit is the proportion resistor form, make the A point voltage constant basically, but owing to be provided with negative temperature coefficient compensating circuit 7, promptly be provided with PNP pipe Q1 with negative temperature coefficient, because the junction voltage VBE of the transistor Q1 of PNP pipe has negative temperature coefficient feature, the A point voltage is descended, so can guarantee that the output valve LVR voltage of shaping circuit 5 Schmidt triggers is constant.
Otherwise, when temperature reduces, it is big that the cut-in voltage of N0 in the on-off circuit 4 becomes, so that the A point voltage that the N0 pipe ends also correspondingly becomes big, because the P0~P3 of first bleeder circuit 1 and N1 are along with temperature reduces, the resistance characteristic value of its performance diminishes, type of attachment in the circuit is the proportion resistor form, make the A point voltage constant basically, but, promptly be provided with PNP pipe Q1, because the junction voltage VBE of the transistor Q1 of PNP pipe has negative temperature coefficient feature with negative temperature coefficient owing to be provided with PNP pipe Q1 with negative temperature coefficient, the A point voltage is risen, so can guarantee that the output valve LVR voltage of shaping circuit 5 Schmidt triggers is constant.
When process deviation, for example: PMOS pipe cut-in voltage step-down, NMOS pipe cut-in voltage has uprised, N0 in the on-off circuit 4 is opened, it is big that the A point voltage must become, because PMOS pipe cut-in voltage is done low, so the resistance characteristic value of the P0~P3 of bleeder circuit 1 diminishes, the A point voltage is also diminished, but owing to be provided with voltage drift compensating circuit 6, promptly be provided with NMOS pipe N1, this NMOS pipe N1 is identical with the type of NMOS pipe N0 in the on-off circuit 4, because of the cut-in voltage of NMOS pipe N1 has been done height, so its resistance characteristic value change is big, so raised A point voltage value, thereby the output valve LVR voltage that can guarantee shaping circuit 5 Schmidt triggers is constant; In like manner, other situation can guarantee that too the output valve LVR voltage of shaping circuit 5 Schmidt triggers is constant.
The foregoing description only illustrates the present invention's usefulness, but not limitation of the present invention, those skilled in the technology concerned are under the situation that does not break away from the spirit and scope of the present invention, can also make various conversion or variation, so all technical schemes that are equal to also should belong to category of the present invention.
In sum, the present invention, low-power consumption low temperature floats and the irrelevant voltage detecting circuit of technology, owing in a branch of bleeder circuit, be connected in series the negative temperature coefficient compensating circuit, negative temperature coefficient that thus can compensating switch circuit N0 cut-in voltage, thus output valve LVR magnitude of voltage is constant substantially can guarantee temperature variation the time; Simultaneously, owing in a branch of bleeder circuit, be connected in series the voltage drift compensating circuit, can improve the output valve LVR voltage drift that process deviation brings thus; And, because therefore the accurate big resistance that bleeder circuit has still replaced being not easy in the integrated circuit to produce with the PMOS pipe guarantee the low-power consumption of circuit, thus reach voltage detecting circuit low-power consumption of the present invention, low temperature floats and with the irrelevant effect of technology.

Claims (1)

1. a low-power consumption low temperature floats and the irrelevant voltage detecting circuit of technology, comprising: No. three bleeder circuits (1,2,3), on-off circuit (4), shaping circuit (5);
Described No. three bleeder circuits comprise, first bleeder circuit of forming by P0, P1, P2 and the P3 of PMOS pipe (1), second bleeder circuit of forming by P5, P6, P7, P8 and the transistor Q0 of PMOS pipe (2), the 3rd bleeder circuit of forming by P9, P10, P11 and the P12 of PMOS pipe (3);
Described on-off circuit (4) is made of NMOS pipe N0; The grid of NMOS pipe N0 is connected to the grid place of the PMOS pipe P2 of first bleeder circuit (1), the source electrode of NMOS pipe N0 and the emitter of PNP transistor Q0 connect and are connected to drain electrode place of the PMOS pipe P8 of second bleeder circuit (2) altogether, the drain electrode of NMOS pipe N0 is connected to drain electrode place of the PMOS pipe P12 of the 3rd bleeder circuit (3), base stage and the grounded collector of PNP transistor Q0;
Described shaping circuit (5) is made up of Schmidt trigger;
It is characterized in that:
A voltage drift compensating circuit (6) and a negative temperature coefficient compensating circuit (7) in the branch of described first bleeder circuit (1), have been connected in series;
Described voltage drift compensating circuit (6) is a NMOS pipe N1 formation identical with NMOS pipe N0 type in the on-off circuit (4), and the grid of this NMOS pipe N1 connects the back altogether with drain electrode and is connected with drain electrode with the grid of the middle PMOS pipe of first bleeder circuit (1) P3 simultaneously;
Described negative temperature coefficient compensating circuit (7) is made of the transistor Q1 of PNP pipe, and the emitter of transistor Q1 is connected base stage and grounded collector with the source electrode of NMOS pipe N1.
CNB2003101220852A 2003-12-30 2003-12-30 Low power consumption and low temperature drift voltage detection circuit independent from technique Expired - Lifetime CN100403034C (en)

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101408564A (en) * 2008-11-18 2009-04-15 上海贝岭矽创微电子有限公司 Voltage detection circuit
CN103117038A (en) * 2013-03-01 2013-05-22 丹阳市巨贸康健器材有限公司 Double-bit nixie tube displaying system for molecular sieve type oxygenerator
CN103456370B (en) * 2013-08-22 2017-06-30 上海华虹宏力半导体制造有限公司 The monitoring device of memory
CN104483537B (en) * 2014-11-12 2017-10-31 深圳市芯海科技有限公司 Low-voltage detection circuit with temperature-compensating
CN113078890B (en) * 2021-03-09 2022-06-21 天津大学 Low-power consumption data randomness monitoring circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06350423A (en) * 1993-06-14 1994-12-22 Fujitsu Ltd Power-on detecting circuit
CN1163664A (en) * 1995-08-21 1997-10-29 松下电子工业株式会社 Voltage detecting circuit, power on/off resetting circuit and semiconductor device
US5786716A (en) * 1996-01-30 1998-07-28 Oki Electric Industry Co., Ltd. Signal generator for generating test mode signals

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06350423A (en) * 1993-06-14 1994-12-22 Fujitsu Ltd Power-on detecting circuit
CN1163664A (en) * 1995-08-21 1997-10-29 松下电子工业株式会社 Voltage detecting circuit, power on/off resetting circuit and semiconductor device
US5786716A (en) * 1996-01-30 1998-07-28 Oki Electric Industry Co., Ltd. Signal generator for generating test mode signals

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