CN100383667C - Semiconductor element pattern transferring method - Google Patents
Semiconductor element pattern transferring method Download PDFInfo
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- CN100383667C CN100383667C CNB021030863A CN02103086A CN100383667C CN 100383667 C CN100383667 C CN 100383667C CN B021030863 A CNB021030863 A CN B021030863A CN 02103086 A CN02103086 A CN 02103086A CN 100383667 C CN100383667 C CN 100383667C
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Abstract
The present invention discloses a new method for transferring semiconductor element patterns, which comprises the following steps: firstly, regulating a needed first optical parameter and a second optical parameter so as to change the positions of two side peaks of an exposure wave peak of principal character and ensure that the exposure wave peak of the principal character is mutually and partially overlapped with adjacent side peaks; secondly, transferring a pattern into a semiconductor element by using a light mask with the characteristic of semi-light transmission by a micro-imaging technology, wherein the light mask with the characteristic of semi-light transmission causes the intensity of the side peaks to be approximately equal to that of the exposure wave peak of the principal character. In this way, the present invention can reduce analysis cycle so as to form a semiconductor element with few critical dimensions(CD).
Description
(1) technical field
The method of the design transfer of the relevant a kind of semiconductor element of the present invention, particularly relevant a kind of design transfer method of dwindling the parsing cycle (pitch).
(2) background technology
The density of integrated circuit component constantly increases, to guarantee the competitive power of semiconductor element on cost and function.When the more and more higher integration of progress of SIC (semiconductor integrated circuit) and downsizing, formed circuit pattern thereby towards the more target development of microminiaturization on the semiconductor wafer.Wherein, photolithography techniques promptly is a kind of basic fundamental of the design transfer that is widely known by the people.In view of the above, the development and the improvement technology of various photolithography techniques have been produced.The downsizing of size helps to make in the per unit ground area assembly of more element or other integrated circuit, and the spacing of dwindling between figure (feature) also has identical advantage.In addition, design rule (designrule) has also been determined the space permission (space tolerance) between element or intraconnections, to guarantee not produce any unnecessary interaction between element or the intraconnections.On the other hand, critical dimension (criticaldimension; CD) be a kind of size dimension of element and significant design rule of density of determining.And the critical dimension in the circuit normally is defined as the minimum feature of a line or the minor increment between two lines.In addition, the cycle that another important design rule is a minimum feature also or be referred to as the parsing cycle (pitch), its width that is defined as a figure add and its next-door neighbour's pattern edge between the sum total of distance.
After producing the layout of circuit, photolithography technology promptly utilizes exposure tool to pass through photoresist layer on the light shield irradiate wafer, and with the design transfer on the light shield to wafer.When the critical dimension of layout is tending towards the resolution limit of little shadow equipment, optical proximity effect (Optical Proximity Effect) will exert an influence to the process of the figure transfer on the light shield to photoresist layer, causes the pattern on the light shield and the pattern generating difference of practical layout.Generally speaking, optical proximity effect is the result that optical projection system produces optics diffraction.The diffraction phenomenon makes adjoining figure interact and produces the variable fixed according to pattern, that is, figure the closer to, proximity effect is just remarkable more.When design configuration has identical size, but when being placed in other figures close position inequality, the relevant issues of giving birth to because of proximity effect will take place when layout.Compared to the edge and the very estranged situation of other figures of figure, when the edge of figure and other figures very near the time (being called compact district) with small pitch pattern, its suffered proximity effect influence is quite big.This result makes in design transfer, can cause the figure of compact district different with the figure in estranged district.In other words, because spatial image to poor, makes the pattern of the small pitch of tool be difficult for shifting, particularly pitch size approaches the pattern of exposure light source wavelength.Therefore, when when semiconductor pattern constantly dwindles day by day, improve also just enhancement constantly of demand to the resolution of pattern.
Generally speaking, resolution is defined as the minimum spacing that optical system can be told two next-door neighbour's objects.On the photolithography techniques of using contract drawing type projection transfer printing, resolve limit R (unit is rice how, nm) is determined by following formula:
R=k1* λ/(NA), wherein, λ is meant employed exposure wavelength, and (unit is rice how, and nm), and NA (Numerical Aperture) is meant the numerical aperture of lens systems, and k1 is meant the dependent constant in photoresist and the technology.
Can learn that by above-mentioned formula resolve limit R to obtain more precise and tiny pattern in order to improve, the numerical value of k1 and λ should reduce, and numerical aperture (NA) should increase.In other words, be, reduce photoresist and technology relevant constant and exposure wavelength for what increase that resolution institute must do, and the numerical aperture of increase lens systems.Yet, increase the numerical aperture of optical system and shorten exposure wavelength, have any problem technically and expensive.Though the expensive and complicated phase shift light shield (phase shift mask) that generally uses can significantly improve resolution in recent years.But, on the exercisable limited area of ground, reach the maximization of component element integrated level, must constantly carry out the downsizing of size, with at the more assembly of equal area manufacturing.In addition, in minute sized little shadow technology, normal use can utilize deep UV (ultraviolet light) (deep ultraviolet at present; The photoresist layer material of DUV) exposing, and the light source that is adopted on the exposure machine mostly is off-axis light (Off-AxisIllumination; OAI), so that under the less restrictive condition of size, the figure on the light shield is transferred on the wafer fully.But the material of deep UV (ultraviolet light) or off-axis light all have its restrictive condition, and can't make the technology width of semiconductor element successfully continue to dwindle, and the dirigibility of the operational paradigm of restriction technology and technology running.
Generally speaking, the parsing cycle also can't change by the optical near-correction method, and all there is its limit value in the parsing cycle of each lithography process.For example, when the limit value in parsing cycle of lithography process is 300 microns, then can't carry out lithography process less than 300 microns.If need dwindle the parsing cycle, then must change the equipment of lithography process.In addition, when using small circuit and closeer pitch size, during for the necessary means of the assembly that reaches continuous intensive structure dress, for poor small pitch design transfer, reduce the influence of proximity effect and increase the task of state space just more and more important for spatial image.Therefore, need not consider the restrictive condition of optical system, and the resolution that can improve near the pitch design transfer of exposure wavelength presses for very.In view of above-mentioned various reasons, we more need a kind of method of design transfer of new semiconductor element, so that dwindle the parsing cycle and promote the productive rate and the yield of subsequent technique.
(3) summary of the invention
The main purpose of the present invention is the method in the design transfer that a kind of semiconductor element is provided, and dwindling the parsing cycle obtaining bigger process window, thereby is applicable in the technology of deep-sub-micrometer of semiconductor element.
A kind of formation method of exposure crest of lithography process is provided according to an aspect of the present invention, be characterized in, comprise the following steps: to provide first an exposure crest that is used for a main feature of lithography process, this first exposure crest has several sides, and each this side has a side peak; And carry out a school pacing suddenly changing several optical parametrics, and adjust this first exposure crest each this place, side peak the position and form several second exposure crests.
A kind of method of semi-conductive design transfer is provided according to a further aspect of the invention, be characterized in, this semi-conductive method of dwindling the parsing cycle comprises the following steps: to provide first an exposure crest that is used for a main feature of lithography process, this first exposure crest has several sides, each this side has a side peak, and this first exposure crest had for one first parsing cycle; Carry out an optics school pacing suddenly changing a numerical aperture (NA) and an interferences degree (σ), and adjust this first exposure crest this place, side peak the position so that this first expose crest and this side peak overlap; And carry out a lithography process by half diffuser and have one second with formation and resolve several second exposure crests in cycle, and make the intensity of this several second exposure crest be equal to each other.
Provide a kind of method of dwindling the parsing cycle of semiconductor element according to another aspect of the invention, be characterized in, comprise the following steps: to provide a semiconductor substrate with semi-conductor layer; Form a photoresist layer on this semiconductor layer of this semiconductor substrate; The one first exposure crest that is used for a main feature of lithography process is provided, and several sides of this first exposure crest have a side peak respectively, and this first exposure crest had for one first parsing cycle, and this main feature has one first live width; Adjusting one be that first optical parametric and of numerical aperture (NA) is the second optical parametric required numerical value extremely of interference degree (σ), and change the position at these several places, side peak of this first exposure crest, so that overlap in this first exposure crest and this several side peaks; Carrying out a lithography process by a semi-transparent light shield with this main feature has several second exposure crests in one second parsing cycle and forms several photoresistance districts on this semiconductor layer with formation, wherein this semi-transparent light shield can make these several second intensity of exposing crest be equal to each other, and this second parsing cycle is about this first parsing cycle half; And treat as several photoresistance cover curtains by these several photoresistance districts and carry out an etch process, also form several semiconductor regions with this semiconductor layer of etching with one second live width.
The present invention is by changing numerical aperture (NA) and interference degree (sigma; σ) wait the position of two kinds of optical parametrics, and it is overlapped to make the exposure crest of winner's feature be adjacent the side peak with the place, side peak (side-lobe) of the exposure crest of adjusting main feature.In addition, the present invention also by the transmissivity (transmission) that changes half diffuser (Halftone mask) so that the side peak intensity approximates the intensity of main feature.In view of the above, the present invention can dwindle the parsing cycle to obtain bigger process window (process window).Therefore, method of the present invention can meet benefit economic on the industry.So this method can be applicable in the technology of deep-sub-micrometer of semiconductor element.
For further specifying purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.
(4) description of drawings
Be according in first preferred embodiment of the present invention shown in Figure 1A to Fig. 1 C, the diagrammatic cross-section of the method for design transfer;
Fig. 2 A to Fig. 2 G is according in second preferred embodiment of the present invention, the etched process section of groove; And
It shown in Fig. 2 H the diagrammatic cross-section in the formed photoresistance of the method district of tradition design transfer.
(5) embodiment
The present invention is a kind of method of dwindling the design transfer in parsing cycle in this direction of inquiring into.In order to understand the present invention up hill and dale, detailed processing step and component structure will be proposed in following description.Apparently, execution of the present invention is not defined in the specific details that the technician was familiar with of semiconductor element.On the other hand, well-known processing step and component structure are not described in the details, with the restriction of avoiding causing the present invention unnecessary.Preferred embodiment of the present invention will be described in detail as follows; yet except these are described in detail; the present invention can also be implemented among other the embodiment widely, and scope of the present invention do not limited, and is as the criterion with the scope of patent protection that claims were limited.
Shown in Figure 1A and Figure 1B, in the first embodiment of the present invention, at first, the one exposure crest 110 that is used for a main feature 100 of lithography process is provided, and the dual-side of exposure crest 110 has side peak 110A and 110B respectively, and wherein, exposure crest 110 had for one first parsing cycle.Then, it is rapid so that adjust one first optical parametric to carry out a school pacing, for example, numerical aperture (NA), with one second optical parametric, for example, interference degree (σ) is to required numerical value, and changes the position of peak, the both sides 110A of exposure crest 110 of main feature 100 and 110B so that the exposure crest 110 of winner's feature 100 is adjacent side peak 110A and 110B is overlapped mutually.Afterwards, carry out a lithography process 130 by a semi-transparent light shield 120 with main feature 100, the intensity that semi-transparent light shield 120 can make the exposure crest 110 of winner's feature 100 be adjacent side peak 110A and 110B is equal to each other, to form three exposure crest 140A, 140B and 140C, wherein, exposure crest 140A, 140B and 140C had for one second parsing cycle, and the second parsing cycle is approximately less than the first parsing cycle.Whereby, the present invention can dwindle the parsing cycle and have the semiconductor element of less critical dimension (CD) with formation, and wherein, semi-transparent light shield comprises that at least a transmittance is about between 30% to 50%, shown in Fig. 1 C.
Shown in figure 2A and Fig. 2 B, in the second embodiment of the present invention, at first provide semiconductor ground 200, semiconductor substrate 200 has semi-conductor layer 210 thereon.Then, form a photoresist layer 220A on semiconductor layer 210.Then, provide one to be used for the main feature 290 of the design transfer of semiconductor element, and an exposure crest 230 and its side peak 230A and 230B that is used for design transfer is provided, wherein, main feature 290 has one first live width 285A, and exposure crest 230 has one first parsing cycle 235A.Afterwards, carry out an optics school pacing suddenly to adjust one first optical parametric, for example, numerical aperture (NA) and one second optical parametric, for example, interference degree (σ), to required numerical value, and change the side peak 230A of exposure crest 230 and the position at 230B place, so that the exposure crest 230 of winner's feature 290 is adjacent side peak 230A and 230B is overlapped mutually, wherein, first optical parametric, for example, numerical aperture (NA), approximate 0.6, and second optical parametric, for example, interference degree (σ), approximate 0.6, shown in Fig. 2 C.Subsequently, make the intensity of exposure crest 230 and side peak 230A and 230B be equal to each other by a semi-transparent light shield 250 with main feature 290, several crests 240A that has one second parsing cycle 235B with formation, 240B and 240C, and carry out a lithography process 260 and have several photoresistance districts 220B of one second live width 285B on semiconductor layer 210 with formation, wherein, the transmittance of semi-transparent light shield 250 about 40%, and second resolves cycle 235B is about two minutes one first parsing cycle 235A, in addition, the second live width 285B also is about 1/2nd first live width 285A, and lithography process 260 comprises a deep UV (ultraviolet light) (DUV) lithography process at least, shown in Fig. 2 D and Fig. 2 E.Then, carry out a trench etch step 270 as photoresistance cover curtain by several photoresistance districts 220B, with etching semiconductor layer 210 and form have the second live width 285B several semiconductor regions 280 on semiconductor substrate 200, shown in Fig. 2 F and Fig. 2 G.
As mentioned above, in an embodiment of the present invention, the present invention system is by changing two kinds of optical parametrics, for example, numerical aperture (NA) and interferences degree (σ) with the exposure crest of adjusting main feature and the position at place, side peak (side-lobe) thereof, and directly form several crests that exposes.In addition, the present invention also has the transmissivity (transmission) of the light shield of semi-transparent characteristic so that the side peak intensity approximates the intensity of main feature by changing one.Shown in comparison diagram 2E and Fig. 2 H, apparently, the photoresistance district 220C of classic method made can make the photoresistance district 220B with less live width by the present invention.With 0.25 micron technology, can directly live width be contracted to 0.125 micron technology and not need extra additional photolithography technology and light shield by method of the present invention.In view of the above, the present invention can dwindle the parsing cycle to obtain bigger process window (process window).Therefore, method of the present invention can meet benefit economic on the industry.So this method can be applicable in the technology of deep-sub-micrometer of semiconductor element.
Certainly, the present invention also may be used on any lithography process or the etch process except on the technology that may be used in design transfer.And the present invention is by change, and for example, the transmissivity of numerical aperture (NA) and interference degree two kinds of optical parametrics such as (σ) and semi-transparent light shield is to reduce the parsing cycle of same pattern transfer steps, and development being used in about the lithography process aspect yet so far.For the technology of deep-sub-micrometer, this method is the process of a preferable feasible design transfer.
Certainly, those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, and be not to be used as limitation of the invention, as long as in connotation scope of the present invention, all will drop in the scope of claims of the present invention variation, the modification of the above embodiment.
Claims (9)
1. the formation method of the exposure crest of a lithography process is characterized in that, comprises the following steps:
Provide one be used for lithography process a main feature first the exposure crest, this first the exposure crest have several sides, each this side has a side peak;
Carry out a school pacing suddenly changing the optical parametric of numerical aperture and interferences degree, and adjust the position at each this place, side peak of this first exposure crest so that this first expose crest and each this side overlap of peaks; And
Carry out a lithography process by a semi-transparent light shield with this main feature, make described first intensity of exposing crest and each this side peak be equal to each other with this main feature.
2. the method for a semi-conductive design transfer is characterized in that, this semi-conductive method of dwindling the parsing cycle comprises the following steps:
Provide one be used for lithography process a main feature first the exposure crest, this first the exposure crest have several sides, each this side has a side peak, and this first the exposure crest had for one first parsing cycle;
Carry out an optics school pacing suddenly changing a numerical aperture and an interference degree, and adjust this first exposure crest each this place, side peak the position so that this first exposure crest and each this side peak overlap; And
Carry out a lithography process by half diffuser and have several second exposure crests in one second parsing cycle, and make these several second intensity of exposing crest be equal to each other with formation.
3. the method for semi-conductive design transfer as claimed in claim 2 is characterized in that, the transmittance of described semi-transparent light shield is between 30% to 50%.
4. the method for semi-conductive design transfer as claimed in claim 2 is characterized in that, the described second parsing cycle is half of this first parsing cycle.
5. the method for dwindling the parsing cycle of a semiconductor element is characterized in that, comprises the following steps:
One semiconductor substrate with semi-conductor layer is provided;
Form a photoresist layer on this semiconductor layer of this semiconductor substrate;
The one first exposure crest that is used for a main feature of lithography process is provided, and several sides of this first exposure crest have a side peak respectively, and this first exposure crest had for one first parsing cycle, and this main feature has one first live width;
Adjusting one be that first optical parametric of numerical aperture is second optical parametric of interferences degree required numerical value extremely with one, and changes this first position at these several places, side peak of exposing crest, so that overlap in these first expose crest and this several side peaks;
Carrying out a lithography process by a semi-transparent light shield with this main feature has several second exposure crests in one second parsing cycle and forms several photoresistance districts on this semiconductor layer with formation, wherein this semi-transparent light shield can make these several second intensity of exposing crest be equal to each other, and this second parsing cycle is this first parsing cycle half; And
Carry out an etch process by these several photoresistance districts as several photoresistance cover curtains, also form several semiconductor regions with one second live width with this semiconductor layer of etching.
6. the method for dwindling the parsing cycle of semiconductor element as claimed in claim 5 is characterized in that, described first optical parametric equals 0.6.
7. the method for dwindling the parsing cycle of semiconductor element as claimed in claim 5 is characterized in that, described second optical parametric equals 0.6.
8. the method for dwindling the parsing cycle of semiconductor element as claimed in claim 5 is characterized in that, described transmittance with light shield of semi-transparent characteristic is 40%.
9. the method for dwindling the parsing cycle of semiconductor element as claimed in claim 5 is characterized in that, described second live width is half of this first live width.
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| CNB021030863A CN100383667C (en) | 2002-02-08 | 2002-02-08 | Semiconductor element pattern transferring method |
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| CNB021030863A CN100383667C (en) | 2002-02-08 | 2002-02-08 | Semiconductor element pattern transferring method |
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| CN1303478C (en) * | 2004-08-05 | 2007-03-07 | 上海交通大学 | Method for realizing micro nano pattern transfer based on rotary coating and bonding |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0917769A (en) * | 1995-06-30 | 1997-01-17 | Daewoo Electron Co Ltd | Thin film layer patterning method |
| US5895740A (en) * | 1996-11-13 | 1999-04-20 | Vanguard International Semiconductor Corp. | Method of forming contact holes of reduced dimensions by using in-situ formed polymeric sidewall spacers |
| CN1237780A (en) * | 1998-05-20 | 1999-12-08 | 华隆微电子股份有限公司 | Contact window and its etching method |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0917769A (en) * | 1995-06-30 | 1997-01-17 | Daewoo Electron Co Ltd | Thin film layer patterning method |
| US5895740A (en) * | 1996-11-13 | 1999-04-20 | Vanguard International Semiconductor Corp. | Method of forming contact holes of reduced dimensions by using in-situ formed polymeric sidewall spacers |
| CN1237780A (en) * | 1998-05-20 | 1999-12-08 | 华隆微电子股份有限公司 | Contact window and its etching method |
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