CN100382122C - Display driver and electronic instrument - Google Patents

Display driver and electronic instrument Download PDF

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Publication number
CN100382122C
CN100382122C CNB2005100569297A CN200510056929A CN100382122C CN 100382122 C CN100382122 C CN 100382122C CN B2005100569297 A CNB2005100569297 A CN B2005100569297A CN 200510056929 A CN200510056929 A CN 200510056929A CN 100382122 C CN100382122 C CN 100382122C
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China
Prior art keywords
data
latch
display
code translator
address
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Expired - Fee Related
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CNB2005100569297A
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Chinese (zh)
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CN1674067A (en
Inventor
福田雅文
安江匡
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Seiko Epson Corp
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Seiko Epson Corp
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F25—REFRIGERATION OR COOLING; COMBINED HEATING AND REFRIGERATION SYSTEMS; HEAT PUMP SYSTEMS; MANUFACTURE OR STORAGE OF ICE; LIQUEFACTION SOLIDIFICATION OF GASES
    • F25B—REFRIGERATION MACHINES, PLANTS OR SYSTEMS; COMBINED HEATING AND REFRIGERATION SYSTEMS; HEAT PUMP SYSTEMS
    • F25B27/00—Machines, plants or systems, using particular sources of energy
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/34—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators for rolling or scrolling
    • G09G5/346—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators for rolling or scrolling for systems having a bit-mapped display memory
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F25—REFRIGERATION OR COOLING; COMBINED HEATING AND REFRIGERATION SYSTEMS; HEAT PUMP SYSTEMS; MANUFACTURE OR STORAGE OF ICE; LIQUEFACTION SOLIDIFICATION OF GASES
    • F25B—REFRIGERATION MACHINES, PLANTS OR SYSTEMS; COMBINED HEATING AND REFRIGERATION SYSTEMS; HEAT PUMP SYSTEMS
    • F25B2313/00—Compression machines, plants or systems with reversible cycle not otherwise provided for
    • F25B2313/002—Compression machines, plants or systems with reversible cycle not otherwise provided for geothermal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0205—Simultaneous scanning of several lines in flat panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0283—Arrangement of drivers for different directions of scanning
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2352/00—Parallel handling of streams of display data
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • G09G3/2025—Display of intermediate tones by time modulation using two or more time intervals using sub-frames the sub-frames having all the same time duration

Abstract

A display driver includes: a decoder which decodes n-bit (n is an integer greater than one) display data sequentially input from a display memory in units of n bits; a plurality of latch circuits which latch output data of the decoder; an address decoder which generates a latch pulse for the latch circuits to latch output from the decoder; and a plurality of data line driver sections. The n-bit display data is read from the display memory and input to the decoder by performing wordline control once. The decoder decodes the n-bit display data, and sequentially outputs the decoded data to the latch circuits. The address decoder outputs the latch pulse to one of the latch circuits selected based on address information on the display memory when the n-bit display data is read and storage destination designation information arbitrarily set from a control circuit.

Description

Display driver and electronic equipment
Technical field
The present invention relates to a kind of display driver and electronic equipment.
Background technology
In recent years, be accompanied by the multifunction of electronic equipment, the demand of display panel is also increasing.The type of drive of display panel has variety of way, and as an example wherein, it is well-known driving the driving circuit disclosed in the flat 7-281636 communique the spy.Open in the flat 7-281636 communique the spy, for example show when display panel is 640 * 480 pixels, use 10 row drivers to drive the circuit of display panel.On each row driver, be provided with computing circuit.For example in order to handle 7 capable * 480 video datas of reading from storer that are listed as simultaneously, it is complicated that the circuit of computing circuit will become for this computing circuit, and circuit area also will increase.
In addition, when display panel was high resolving power, the data volume of video data also increased, and therefore, it is complicated that the driving circuit of display panel also becomes.Because of circuit is complicated, makes the increase, design time etc. of chip area elongated, thereby caused occurring the problem that manufacturing cost increases.Particularly, the spy opens in the driving circuit disclosed in the flat 7-281636 communique, carries out laterally moving on display panel showing or during left and right sides flip displays etc., carrying out all needing display-memory is rewritten when these show at every turn.
Summary of the invention
The present invention has overcome above-mentioned technical matters, and its purpose is to provide that a kind of design area is little, the ratio of performance to price is good, can handle easily laterally to move and show or display driver and electronic equipment that left and right sides flip displays etc. shows.
The present invention relates to a kind of display driver, it comprises: code translator, to deciphering processing with n position (n is the integer more than or equal to 2) unit n position video data of (in order) output successively from display-memory; A plurality of latch cicuits latch and have carried out the data that decoding is handled by described code translator; Address decoder produces the latch pulse of the output be used to make the described code translator of described a plurality of latch circuit latches; A plurality of data line drive divisions according to by the data of each latch circuit latches of described a plurality of latch cicuits, drive the data line of display panel.Described code translator is read and exported to described n position video data by described display-memory being carried out a word line control, from described display-memory; Described code translator to being that the n position video data that unit exports is successively deciphered processing from described display-memory with n position (n for more than or equal to 2 integer), and exports described decoding data processed to described a plurality of latch cicuit successively; Described address decoder, the address information of the described display-memory when reading described n position video data, the storage purpose ground appointed information that is provided with arbitrarily by control circuit, from described a plurality of latch cicuits, select somely, and export described latch pulse to selected latch cicuit; Each data line drive division of described a plurality of data line drive divisions after described decoding data processed is stored in described a plurality of latch cicuit, drives each data line drive division corresponding data lines of described a plurality of data line drive divisions.
According to the present invention, read n position video data by a word line control, thereby n position video data is deciphered processing.Described code translator, n position video data to input is successively deciphered processing, exports described decoding data processed successively to described a plurality of latch cicuits, therefore, need not on each data line drive division, code translator to be set, thereby can reduce the quantity of described code translator.Also have, described address decoder can be selected latch cicuit according to the address information of described display-memory with from the storage purpose ground appointed information of control circuit, therefore, by storage purpose ground appointed information is set, the decoding data processed can be latched in arbitrarily in the latch cicuit.
In addition, in the present invention, the storage purpose ground appointed information by described control circuit is provided with arbitrarily comprises horizontal mobile data, according to the address information of described display-memory, be provided with expression by the latch address data on the storage purpose ground of described decoding data processed; Described address decoder comprises address conversion circuit; Described address conversion circuit, receive described horizontal mobile data and described latch address data, when making image horizontal when mobile on first direction on the display panel, described horizontal mobile data of addition process and described latch address data, and from described a plurality of latch cicuits, select one, and export described latch pulse to selected latch cicuit according to its result; And when making image horizontal when mobile on the second direction opposite on the display panel with described first direction, described horizontal mobile data of subtraction process and described latch address data, and from described a plurality of latch cicuits, select one, and export described latch pulse to selected latch cicuit according to its result.
In addition, in the present invention, the storage purpose ground appointed information that is provided with arbitrarily by described control circuit comprises left and right sides roll data, according to the address information of described display-memory, expression is set by the latch address data on the storage purpose ground of described decoding data processed; Described address decoder comprises address conversion circuit; Described address conversion circuit, receive described left and right sides roll data and described latch address data, described left and right sides roll data and described latch address data are carried out subtraction process, and from described a plurality of latch cicuits, select somely according to its result, and described latch pulse exported in the selected latch cicuit.Thus, the video data that is stored in display-memory needn't be rewritten, just left and right sides flip displays can be carried out.
In addition, in the present invention, the storage purpose ground appointed information that is provided with arbitrarily by described control circuit also comprises left and right sides roll data, described address conversion circuit, receive described left and right sides roll data and described latch address data, described left and right sides roll data and described latch address data are carried out subtraction process, when on display panel, making image laterally move demonstration, the latch cicuit output latch pulse that described address decoder also can be chosen to the result according to addition process or described horizontal mobile data of subtraction process and described latch address data; And when when apparent location code translator makes image left and right sides flip displays on display panel, the also latch cicuit output latch pulse that can choose to result according to subtraction process described left and right sides reversal data and described latch address data.Thus, can not rewrite the video data that is stored in display-memory, just can carry out laterally moving showing or left and right sides flip displays.
In addition, in the present invention, described code translator comprises the multi-thread driving code translator of selecting simultaneously, the described multi-thread driving code translator of selecting simultaneously, video data according to the m of the video data that is included in described n position (m for more than or equal to 2 integer) pixel, generation is used for selecting the driving voltage of driving voltage to select data from the multi-thread a plurality of driving voltages selecting simultaneously to drive corresponding to sweep trace, thereby can select data to export described a plurality of latch cicuit to described driving voltage.
Thus, can reduce the multi-thread quantity of selecting simultaneously to drive with code translator, therefore, can provide circuit area little display driver described a plurality of latch cicuits.
In addition, in the present invention, each data line drive division of described a plurality of data line drive divisions, select data according to the described driving voltage that is stored in described a plurality of latch cicuit, from described a plurality of driving voltages, select the data line driving voltage, each data line drive division of described a plurality of data line drive divisions can use described data line driving voltage driving data lines.
Thus, select data, can carry out multi-thread the selection simultaneously to display panel and drive by the described driving voltage of storage in described a plurality of latch cicuits.
In addition, in the present invention, described code translator comprises the GTG code translator, and this GTG code translator can determine to become the display mode of described n position video data object pixels according to described n position video data and frame number.
Thus, can carry out GTG (gray shade scale) performance according to n position video data.
In addition, in the present invention, described GTG code translator also can export 0 or 1 data in described a plurality of latch cicuit at least one according to described display mode.
In addition, in the present invention, described code translator also comprises the multi-thread driving code translator of selecting simultaneously, the multi-thread driving of selection simultaneously is used for corresponding with the multi-thread type of drive of selecting simultaneously of the sweep trace of selecting driving m (m is the integer more than or equal to 2) root simultaneously with code translator, the described multi-thread driving code translator of selecting simultaneously, also can be according to the display mode of determining by described GTG code translator, the driving voltage that selection is used for the data line driving voltage of driving data lines selects data to export described a plurality of latch cicuit to.
Thus, can carry out driving to display panel based on the GTG performance and multi-thread the selection simultaneously of n position video data.
In addition, in the present invention, each data line drive division of described a plurality of data line drive divisions, select data according to the described driving voltage that is stored in described a plurality of latch cicuit, from being used for selecting the data line driving voltage with the multi-thread corresponding multiple driving voltage of driving of selecting simultaneously of sweep trace, each data line drive division of described a plurality of data line drive divisions also can use described data line driving voltage to come driving data lines.
In addition, in the present invention, each pixel gray level the video data of the m pixel of choosing from described n position video data, (k is the integer more than or equal to 2 with k, n=k * m) the position luma data is represented, described GTG code translator comprises the GTG ROM according to the grayscale mode of described k position luma data and two kinds of show states of the definite expression of frame number, described GTG code translator is determined described grayscale mode about each pixel of m pixel according to described GTG ROM, export in the described multi-thread driving of the selection simultaneously usefulness code translator with the 0 or 1 m position video data of representing according to the show state of fixed described grayscale mode each pixel of m pixel, described multi-thread the selection simultaneously drives with code translator according to described m position video data, also can generate described driving voltage and select data, and export described a plurality of latch cicuit to.
In addition, in the present invention, described n position video data is with from one in the rising edge of clock signal of control circuit or the negative edge synchronously, read from described display-memory, in described address decoder and described rising edge of clock signal or the negative edge another is synchronous, also exportable described latch pulse.
According to the present invention, the timing of the latch pulse of OPADD code translator and can stagger with clock from the timing that display-memory is read video data, therefore, to deciphering the latch cicuit of the data of processing by described code translator, the exportable latch pulse of address decoder as object.
In addition, the present invention relates to a kind of electronic equipment, comprise above-mentioned any controller, and power circuit of scanner driver, control described display driver and described scanner driver of the described display panel sweep trace of display driver, display panel, driving.
Description of drawings
Fig. 1 is the block diagram of the related display driver of present embodiment.
Fig. 2 is the figure that is connected that the related address decoder of present embodiment and a plurality of latch cicuits are shown.
Fig. 3 is the figure that the part of the related shift register of present embodiment is shown.
Fig. 4 is the figure that corresponding relation between the pixel of the video data that is stored on the related display-memory of present embodiment and display panel is shown.
Fig. 5 is the block diagram that is used to illustrate FRC code translator and MLS decoder action.
Fig. 6 be the related demonstration of present embodiment is shown during, the figure of the relation during image duration and the territory.
Fig. 7 is the illustration that the related display mode form of present embodiment is shown.
Fig. 8 is the figure of the FRC decoder action that is used to illustrate that present embodiment is related.
Fig. 9 is the sequential chart in the input and latch arteries and veins time on the related latch cicuit of present embodiment.
Figure 10 is one one the sequential chart that is shown specifically during shown in Figure 9.
Figure 11 is the figure that the related address decoder of present embodiment is shown.
Figure 12 is the figure that the related address conversion circuit of present embodiment is shown.
Figure 13 be used to illustrate present embodiment related laterally move the figure that shows.
Figure 14 be used to illustrate present embodiment related laterally move other figure that shows.
Figure 15 be used to illustrate present embodiment related laterally move other figure that shows.
Figure 16 be used to illustrate present embodiment related laterally move other figure that shows.
Figure 17 is the figure of the left and right sides flip displays that is used to illustrate that present embodiment is related.
Figure 18 is other figure of the left and right sides flip displays that is used to illustrate that present embodiment is related.
Figure 19 is other figure that the related address conversion circuit of present embodiment is shown.
Figure 20 is the figure that the related display-memory of present embodiment is shown.
Figure 21 illustrates the figure that concerns between the storage unit that is arranged on the related display-memory of present embodiment and the video data.
Figure 22 is the figure that the display driver of comparative example is shown.
Figure 23 is the figure that the display-memory of comparative example is shown.
Figure 24 is the circuit diagram of a part that the verselet storer of comparative example is shown.
Figure 25 is the figure that the related display driver of the variation of present embodiment is shown.
Figure 26 is the figure that the related electronic equipment of present embodiment is shown.
Embodiment
Below, with reference to accompanying drawing one embodiment of the present of invention are described.The enforcement that the following describes is fallen, and is not the improper qualification to the content of the present invention described in the claim.In addition, the structure that the following describes not is all to be necessary constitutive requirements of the present invention.
1. display driver
Fig. 1 is the block diagram of display driver 10.In the present embodiment, display driver 10 comprises code translator 100, display-memory 200, control circuit 300, address decoder 400, data line drive division DRV and a plurality of latch cicuit LA1～LAx (x is the integer more than or equal to 2).
Code translator 100 comprises FRC code translator (broadly being the GTG code translator) 110 and MLS code translator (broadly selecting simultaneously to drive to use code translator for multi-thread) 120.FRC code translator 110 has used FRC (Frame-Rate-Control) mode as the GTG display mode.The FRC code translator 110 of present embodiment can use 2 luma data (broadly being k position luma data) to carry out the GTG performance of 4 GTGs for each pixel, but be not limited thereto.For example, data length that also can luma data is set to 4, carries out the GTG performance of 16 GTGs.Thus, for FRC code translator 110, the data length of luma data can be set according to the grey exponent number of wishing the GTG performance.In addition, MLS code translator 120 has used MLS (Multi-Line-Selection) type of drive (the multi-thread type of drive of selecting simultaneously) as type of drive.The MLS code translator 120 of present embodiment carries out selecting simultaneously to drive about for example 4 lines of the sweep trace of display panel, but is not limited thereto.For example, the line quantity of selecting is simultaneously selected to drive etc., can suitably be provided with to 3,5～8 lines simultaneously.In addition, present embodiment can corresponding colored show, also the some pixels in R pixel, G pixel, the B pixel among the RGB that a pixel of present embodiment can be shown as colour.
On display-memory 200, storing the video data that is used for display image on display panel.Video data DA1 is made of n bit data (the n position video data on the same meaning), is the data of reading when having selected for example word line WL1 of display-memory 200.That is, when having selected a word line, from display-memory 200, can read a video data DA1 at least.In the present embodiment, for example, word line extends to form on display-memory 200 along the Y direction.On display-memory 200, arrange a plurality of word line WL1～WLQ (Q is the integer more than or equal to 2) along directions X, but be not limited thereto, for example a word line also is fine.
Video data DA1 has the luma data of for example a plurality of pixels (broadly for m pixel, m for more than or equal to 2 integer).
Display-memory 200, the control signal of reception control circuit 300, and select for example word line WL1 according to control signal, video data DA1 exports code translator 100 to the n position.The control signal of control circuit 300 comprises the selection signal (broadly being the address information of display-memory) of selecting word line from a plurality of word lines of display-memory 200.
Code translator 100 is deciphered processing to the n position video data DA1 that reads from display-memory 200.
FRC code translator 110 is deciphered processing to the luma data of the m pixel that is included in n position video data DA1.
MLS code translator 120 is selected data according to the result generation driving voltage of FRC code translator 110, and is exported a plurality of latch cicuit LA1～LAx to.For example, in the MLS type of drive, when making the quantity of selecting driving simultaneously be 4 lines, the voltage that data line drive division DRV uses for example has 5 kinds, and therefore, it is that 3 bit data are advisable that driving voltage is selected data.
Address decoder 400 for example receives the selection signal (address information of display-memory) of selecting word line.Address decoder 400 comprises address conversion circuit 410, but is not limited thereto.Address decoder 400 also can be to have omitted for example structure of address conversion circuit 410.To narrate in the back in detail of address conversion circuit 410.Address decoder 400 is selected a latch cicuit according to the selection signal of selecting word line from a plurality of latch cicuit LA1～LAx, and to the latch cicuit output latch pulse of choosing.Receive the latch cicuit of latch pulse, latch driving voltage and select data.In addition, also can be not use such selection signal (address information) to come the structure of output latch pulse.
For example, by selecting the word line WL1 of display-memory 200, video data DA1 inputs to code translator 100.Video data DA1 deciphers processing by code translator 100, and the data of decoded processing select data to export on the bus LB1 as driving voltage.Selection signal when thus, selecting word line WL1 exports on the address decoder 400.Address decoder 400, the signal according to selecting this word line WL1 exports latch pulse LP1 on the latch cicuit LA1 to by bus LB2.That is, latch cicuit LA1 latchs video data DA1 is deciphered the driving voltage selection data that processing obtains.This data latching is finished by selecting a plurality of word line WL1～WLQ successively.
Data line drive division DRV selects data according to the driving voltage that is stored in latch cicuit LA1～LAx, drives each data line of display panel.Below, identical Reference numeral is represented identical meaning.
Fig. 2 is the figure that is connected of address decoder 400 and a plurality of latch cicuit LA1～LAx.Address conversion circuit 410 to horizontal mobile data SCD and comprise that the word line selection signal WLS of address information of the selected word line of display-memory 200 carries out calculation process, and is selected latch cicuit according to its operation result.By this horizontal mobile data SCD is set, video data is laterally moved show.To be described in detail laterally moving demonstration in the back.
Address decoder 400 receives the word line selection signal WLS from control circuit 300, and to the latch cicuit output latch pulse of selecting by address conversion circuit 410.At this moment, address conversion circuit 410 receives and the horizontal different word line selection signal of mobile data SCD from control circuit 300.Be included in the wordline address information in the word line selection signal, but comprise the information of assigned address, the information of this address is meant the information of the some addresses in the address of distributing to each latch cicuit LA1～LAx.According to this information, code translator 400 can obtain distributing to certain address in the address of each latch cicuit LA1～LAx from wordline address information.In addition, when laterally mobile data SCD for example is 0 value, do not carry out laterally moving showing, but common demonstration (for example, not carrying out laterally moving the demonstration of demonstration or left and right sides flip displays).Particularly, when for example having selected word line WL1, driving voltage selects data VSD1 to be output on the bus LB1 by code translator 100.When horizontal mobile data SCD for example was 0 value, address conversion circuit 410 was selected latch cicuit LA1 according to the address that is assigned to latch cicuit LA1.Thus, address decoder 400 is to latch cicuit LA1 output latch pulse LP1, and storing driver voltage is selected data VSD1 on latch cicuit LA1.Thus, data line drive division DRV1 driving data lines, thus be shown corresponding to the pixel of video data DA1.
Replace address decoder 400 and latch cicuit LA1～LAx, also can use shift register.Fig. 3 is the figure that the part of shift register SR structure is shown.A plurality of trigger FF (broadly being latch cicuit) are connected in series, thereby have constituted shift register SR.The data output Q (broadly being lead-out terminal) of the trigger FF of prime, the data that are connected the trigger FF of back level are imported D (broadly being input terminal).Driving voltage is selected data, imports to shift register SR from code translator 100 by bus LB3.The clock signal of importing C with the clock of each trigger FF of input is synchronous, and the data that are stored in each trigger FF are shifted to the right with respect to the DR1 direction.Be arranged on the output line OL between each trigger FF, for example be connected on the data line drive division DRV by line latch cicuit etc.For example, when the data storage of one scan line behind shift register SR, by to output latch pulses such as line latch cicuits, thereby storing driver voltage is selected data on latch cicuit etc.Thus, data line drive division DRV can select the data-driven data line according to the driving voltage of storage online latch cicuit etc.
The video data that be stored in display-memory 200 of Fig. 4 when common demonstration (for example do not carry out laterally moving and show or the demonstration of left and right sides flip displays) is shown and the figure of the corresponding relation between the pixel of display panel 500.The video data DA1 of display-memory 200 deciphers processing by code translator 100.In showing usually, the data of decoded processing are stored in latch cicuit LA1 as driving voltage VSD1.Data line drive division DRV1 selects data VSD1 driving data lines DL1 according to voltage.At this moment, m selected pixel PA1 carries out Control of Voltage by data line DL1 simultaneously.That is, the video data DA1 of display-memory 200 is corresponding with m pixel PA1 of display panel 500.Similarly, the video data DA2 of display-memory 200 is corresponding with m pixel PA2 of display panel 500.
For example, when on a pixel, using the luma data of k position (k is the integer more than or equal to 1), by the n position video data DA1 that selects word line WL1 to obtain, in order to show m pixel PA1, by (k * m) position constitutes.That is, select by display-memory 200 being carried out a word line, thereby (k * m) video data of position exports code translator 100 to, and the decoding that is used to make m pixel be presented at display panel 500 in code translator 100 is handled.
2. code translator
Fig. 5 is the block diagram of the action of explanation FRC code translator 110 and MLS code translator 120.Among Fig. 5, showing n position video data for example is the situation of 8 video data DA1.Symbol D0～D7 represents each the data of 8 video data DA1.The code translator 100 of present embodiment, for example used the performances of 4 GTGs, 4 lines to select type of drive (broadly for selecting to drive the multi-thread type of drive of selecting simultaneously of m bar sweep trace simultaneously) simultaneously, therefore, 8 video data DA1 comprise the video data of 4 pixels, and each pixel gray level of 4 pixels is represented by 2 luma data.At this, will become 4 pixels of 8 video data DA1 objects, be called first～the 4th pixel.That is, the D0 of video data DA1, D1 are the luma data of first pixel, and D2 and D3 are the luma data of second pixel.Similarly, D4～D7 of video data DA1 also is the luma data of the 3rd, the 4th pixel.
8 video data DA1 have been carried out decoding by FRC code translator 110 and have handled.FRC code translator 110 has comprised FRCROM (broadly being GTG ROM) 112, but has been not limited thereto.FRC code translator 110 is from control circuit 300 received frame information.In frame information, video data DA1 has comprised the decoded frame number constantly of handling.FRCROM 112, are the luma data according to frame number and pixel, and storage is used for determining the memory circuit of the one digit number of a corresponding pixel according to (broadly being display mode).
FRC code translator 110, according to the display mode form (with reference to Fig. 7) that is stored in FRCROM 112, from this frame information, first～the 4th pixel gray level data D0～D7, export the video data MA1 (broadly being the video data of m pixel) of 4 (broadly being the m position).Among Fig. 5, symbol M D0～MD3 shows each the data of video data MA1.
MLS code translator 120 is deciphered processing to 4 video data MA1, selects data VSD1 thereby generate to drive, and exports a plurality of latch cicuit LA1～LAx to.In addition, driving voltage is selected data VSD1, is latched by latch cicuit LA1 among a plurality of latch cicuit LA1～LAx, that for example receive latch pulse LP1 from address decoder 400.
FRC GTG method (frame GTG method) will show during the demonstration of a picture that 1T is divided into image duration during will showing as during the demonstration during 1T, whether controls display pixel in each image duration.FRC GTG method, the quantity of the image duration by adjusting display pixel realizes the GTG performance.In addition, be included in the frame number in the described frame information, be used to select one select each image duration number.For example, illustrated among Fig. 6 will show during 1T be divided into the examples of 4 image durations.For example, carry out GTG when performance of 4 GTGs, when being 2 luma data (11), can be at for example whole display pixel in image durations of frame 1～frame 4 each of Fig. 6 image duration.The luma data that is 2 when (01), can be in for example a certain image duration in each of Fig. 6 frame 1～frame 4 image duration display pixel.
In addition, in the present embodiment, for example carry out 4 lines and select simultaneously to drive, therefore, decipher the data of processing, decipher processing by MLS code translator 120 by FRC code translator 110.At this moment, each, frame 1～frame 4 image duration, comprised F1～F4 during 4 territories (field).According to the data of in each image duration, deciphering processing by code translator 110, generate driving voltage in during each territory and select data, select simultaneously to drive thereby carry out 4 lines.
One example of display mode form has been shown among Fig. 7.FRC code translator 110, along with the display mode form that is stored in the FRCROM 112, output video data MA1.The display mode form as shown in Figure 7, is the form that is used for determining according to frame number and luma data one value.For example, in the image duration of Fig. 6 frame 1 video data is deciphered when handling, promptly frame number is 1 o'clock, to luma data (00) output 0 value of pixel.Frame number is 4 o'clock, to luma data (00) output 0 value of pixel, to pixel gray level data (10) output 1 value.
Each video data MA1-1～MA1-4 shown in Figure 8 shows the value video data MA1 of decoding output in each image duration when (00011011) for example of each data D0～D7 of video data DA1.According to the display mode form of Fig. 7, during frame 1 in, the value of each data M D0～MD3 of video data MA1-1 is (0111) decoded output.During frame 2, the value of each data M D0～MD3 of video data MA1-2 is output for (0001).Similarly, the value of each data M D0～MD3 of video data MA1-3, MA1-4 is that (0011), (0111) are output.
In addition, each data value that figure 8 illustrates video data is that 1 o'clock display pixel, each data value are 0 o'clock not synoptic diagram of display pixel, otherwise also can.
Secondly, use Fig. 9, Figure 10 to from the decoded successively processing of display-memory 200n position video data, the flow process that driving voltage selects data to export a plurality of latch cicuit LA1～LAx to describes.
Fig. 9 is the sequential chart when a plurality of latch cicuit LA1～LAx input and latch pulse in usually showing.Word line selection signal is the selection signal (broadly being the address information of display-memory) that is used for selecting from a plurality of word lines of display-memory 200 word line.According to the word line selection signal shown in the symbol E1, driving voltage selects data to be latched on the latch cicuit LA1.Word line WL1～the WLQ of display-memory 200 is selected successively, selects data thereby latch driving voltage on a plurality of latch cicuit LA1～LAx.After latching driving voltage selection signal on a plurality of latch cicuit LA1～LAx, the output shown in the symbol E2 allows signal to export a plurality of data line drive division DRV to, thereby a plurality of data line is driven by a plurality of data line drive division DRV.
Figure 10 be amplified shown in the symbol SD of Fig. 9 during sequential chart.SD is for example suitable with 1 cycle of clock signal during this time.Synchronous with the rising edge of clock signal shown in the symbol E3, word line selection signal exports display-memory 200 to from control circuit 300.In display-memory 200, select for example word line WL1 according to word line selection signal.Thus, in for example timing shown in the symbol E4 (timing), video data DA1 inputs in the FRC code translator 110, thereby is deciphered processing by FRC code translator 100.Deciphered the data of processing by FRC code translator 110,,, thereby deciphered processing by MLS code translator 120 to 120 inputs of MLS code translator in for example timing shown in the symbol E5.Carried out the data that decoding is handled by MLS code translator 120, for example selected data VSD1 to export a plurality of latch cicuit LA1～LAx to as driving voltage.
Synchronous with the negative edge of the clock signal shown in the symbol E6, for example the latch pulse LP1 shown in the symbol E7 exports latch cicuit LA1 to from address decoder 400.Thus, latch cicuit LA1 can latch the driving voltage that is generated by MLS code translator 120 and select data VSD1.
During more preceding than the negative edge of the clock signal shown in the symbol E6, MLS code translator 120 will be deciphered the output data of handling from FRC code translator 110.Thus, in the timing of the negative edge of the clock signal shown in the symbol E6, MLS code translator 120 exportable voltages are selected data VSD1.
In addition, word line selection signal and rising edge of clock signal are output synchronously, and for example the negative edge of latch pulse LP1 and clock signal is output synchronously, but are not limited thereto.For example, word line selection signal also can be output synchronously with the negative edge of clock signal, and latch pulse LP1 also can be output synchronously with rising edge of clock signal.
In addition, export word line selection signal synchronously with rising edge of clock signal, but not with the synchronous output latch pulse of the negative edge of clock signal LP1, but, generate latch pulse LP1 by after using delay circuit for example to begin to guarantee enough to be used for time that FRC code translator 110 and MLS code translator 120 handle from the rising edge of clock signal identical with word line selection signal.
In addition, the rise and fall edge of clock signal and the rise and fall of other signals are along synchronously, comprise the mistiming homogeneous on the rise and fall edge of the rise and fall edge of clock signal and other signals, also comprise the rise and fall edge of setting other signals with the negative edge of clock signal simultaneously.
3. address decoder
The address decoder 400 of Figure 11 comprises such as address conversion circuit 410.Thus, the video data that need not to be written in display-memory 200 writes again, display panel is carried out laterally moving easily show, left and right sides flip displays becomes possibility.
At first, describe laterally moving demonstration.Latch address data LAD shows the address date of distributing to latch cicuit.Address decoder 400 by receiving the address information of word line, can obtain distributing to certain address in the address of each latch cicuit LA1～LAx.410 pairs of latch address data of address conversion circuit LAD and horizontal mobile data SCD carry out calculation process.For example, when representing each the data of data of this operation result with C1～Cx, address conversion circuit 410 exports data XC1～XCx to a plurality of logical circuit AND, and these data XC1～XCx is the data of each data C1～Cx of having overturn.Each logical circuit AND possesses the input of x root at least.Reception is from each logical circuit AND of the output data XC1～XCx of address conversion circuit 410, on each logical circuit AND with the combination of mutual exclusion ground and be provided with several phase inverter INV3, thereby mutual exclusion ground output true value (for example be worth 1, high level signal etc.).The output of each logical circuit AND connects latch cicuit LA1～LAx.Thus, latch cicuit LA1～LAx.But mutual exclusion ground receives latch pulse.
Figure 12 is the figure that address conversion circuit 410 is shown.Address conversion circuit 410 comprises computing circuit 420.Computing circuit 420 comprises adding circuit 422 and subtraction circuit 424, but is not limited thereto.Also can omit any in adding circuit 422 or the subtraction circuit 424.Receive the address conversion circuit 410 of latch address data LAD and horizontal mobile data SCD, handle in computing circuit 420 enterprising row operations.Computing circuit 420 pairs of latch address data LAD and horizontal mobile data SCD carry out addition process or subtraction process.When carrying out addition process, adding circuit 422 for example carries out additive operation to latch address data LAD and horizontal mobile data SCD.In addition, when carrying out subtraction process, subtraction circuit 424 for example deducts horizontal mobile data SCD from latch address data LAD.These addition results or subtraction result are exported as the output data of computing circuit 420.The data C1 of each of the output data of computing circuit 420～Cx, for example by upsets such as phase inverters, thereby as data XC1～XCx output.
Below, utilize Figure 13～Figure 16 to illustrate and laterally move the flow process that shows.The figure of m the pixel PA1 that n position video data DA1 when Figure 13 for example is 0 value for expression by horizontal mobile data SCD shows.Do not carry out laterally moving when showing, can be set to for example 0 value by horizontal mobile data SCD.Thus, latch pulse is output to latch cicuit LA1 according to latch address data LAD, and therefore, video data DA1 decoded device 100 decodings in n position are handled, and latch thereby be latched circuit LA1.That is, data line is driven by data line drive division DRV1, thereby the m of display panel 500 pixel PA1 is shown.
Figure 14 is along directions X, carries out the figure that a pixel laterally moves demonstration on the DR2 direction (broadly being first direction) as right.On the DR2 direction, carry out laterally moving when showing of 1 pixel, can be set to for example 1 value by horizontal mobile data SCD.On the computing circuit 420 of Figure 12, latch address data LAD and horizontal mobile data SCD are carried out for example addition process.Thus, the output of address conversion circuit 410, different with the situation of Figure 13, become the data of representing latch cicuit LA2.Address decoder 400 is according to the output of address conversion circuit 410, to the pulse of latch cicuit LA2 output latch.Thus, video data DA1 decoded device 100 decodings in n position are handled and are latched circuit LA2 and latch.That is, data line drive division DRV2 driving data lines, m pixel PA2 is shown.In a word, relatively m the pixel PA2 of m pixel PA1 of Figure 13 and Figure 14 is set to 1 value by horizontal mobile data SCD as can be known, along directions X, can carry out the laterally mobile demonstration of a pixel to the right.
The figure of m the pixel PA2 that n position video data DA2 when Figure 15 for example is 0 value for the horizontal mobile data SCD of quilt shows.N position video data DA2 is by the video data of choosing the word line WL2 of the display-memory 200 of Fig. 1 for example to export.At this moment, utilize the wordline address information when word line WL2 is selected, address decoder 400 obtains distributing to the latch address data LAD of latch cicuit LA2.In a word, when horizontal mobile data SCD for example was 0 value, address decoder 400 exported latch pulse to latch cicuit LA2, and therefore, video data DA2 decoded device 100 decodings in n position are handled and are latched circuit LA2 and latch.Thus, data line drive division DRV2 driving data lines, thus the m of display panel 500 pixel PA2 is shown.
Illustrated among Figure 16 n position video data DA2, laterally moved situation about showing along carrying out a pixel on directions X, left the DR3 direction (broadly for second direction).On the DR3 direction, carry out a pixel and laterally move when showing, can be set to for example 1 value by horizontal mobile data SCD.The computing circuit 420 of Figure 12 carries out for example deducting from latch address data LAD the subtraction process of horizontal mobile data SCD.Thus, the output of address conversion circuit 410 different during with Figure 15 are the data of expression latch cicuit LA1.Address decoder 400 is along with the output of address conversion circuit 410, to the pulse of latch cicuit LA1 output latch.Thus, video data DA2 decoded device 100 decodings in n position are handled and are latched circuit LA1 and latch.That is, data line drive division DRV1 driving data lines, thus m pixel PA1 is shown.
Foregoing is only for showing laterally moving of a pixel.Along directions X, to the right or on the direction left, desire shows that for example two pixels laterally move when showing, can be set to 2 values by horizontal mobile data SCD.For example, when data line quantity was 64, the quantity of data line can be by 6 bit representations.Latch address data LAD corresponding to video data DA2 at this moment for example can be expressed as (000001).To this, the horizontal mobile data SCD that laterally moves demonstration of two pixels for example can be expressed as (000010).At this moment, when the computing circuit 420 of Figure 12 carries out for example deducting the subtraction process of horizontal mobile data SCD from video data DA2, use 2 complement code symbol, then be (000001)-(000010)=(000001)+(111110)=(111111).When the leftmost side of directions X data line was first data line, (111111) were exactly the address of distributing to the latch cicuit corresponding with the data line of the rightmost side of directions X.That is, when certain video data is carried out laterally moving demonstration, the data line of the leftmost side on the directions X can be driven, the data line of the rightmost side on the directions X can be driven afterwards.On the contrary, also can drive the data line of the rightmost side on the directions X, can drive the data line of the leftmost side on the directions X afterwards.
In a word, desire along directions X, to the right or carry out ss for example (ss for more than or equal to 1 integer) on the direction left when pixel laterally moves and shows, value that can horizontal mobile data SCD is set to the ss value.
In addition, when on the right of directions X, laterally moving demonstration, also horizontal mobile data for example can be arranged to (1) value, be used computing circuit 420 to carry out subtraction process.That is, the value of horizontal mobile data SCD is set to negative value, and uses subtraction circuit 424 to carry out subtraction process, can laterally move to the right along directions X thus to show.In addition, when showing, also horizontal mobile data SCD for example can be arranged to (1) value left, use adding circuit 422 to carry out addition process along directions X is laterally mobile.That is, the value of horizontal mobile data SCD is set to negative value, and uses adding circuit 422 to carry out addition process, can laterally move left along directions X thus to show.
Below, left and right sides flip displays is described.Figure 17 is the block diagram that is used to illustrate left and right sides flip displays.Figure 17 is letter for the purpose of simplifying the description, shows 4 data line drive division DRV1～DRV4,4 latch cicuit LA1～LA4, by 4 viewing area A～D of each data line drive division DRV1～DRV4 display driver, but is not limited thereto.In the display driver that includes address conversion circuit 410, when showing usually, same with foregoing embodiment, by selecting word line WL1, video data DA1 deciphers processing by code translator 100, and the data latching that has passed through the decoding processing is in latch cicuit LA1.At this moment, the latch address data LAD that address information comprised of word line and to be assigned to address among the latch cicuit LA1 be 0 value for example.That is, address decoder 400 is to the latch cicuit LA1 output latch pulse LP1 that distributes with the address of the identical value of latch address data LAD.Thus, data line drive division DRV1 drives the viewing area A of display panel 510.By reading video data in order, demonstrate viewing area A～D from display-memory 200.
When carrying out left and right sides flip displays, to the pulse of latch cicuit output latch, this latch cicuit during according to reading displayed data DA1 latch address data LAD and the number of the data line of display panel 510 be determined.Figure 18 carries out the figure of left and right sides flip displays situation to display panel shown in Figure 17 510 for expression.
When the flip displays of the left and right sides, by selecting word line WL1, video data DA1 deciphers processing by code translator 100, and the data latching that has passed through the decoding processing is in latch cicuit LA4.At this moment, the latch address data LAD that is comprised in the address information of word line and noted earlier equally all be 0.But according to Figure 18, the address that is assigned to latch cicuit LA4 is 3, and latch pulse is exported to latch cicuit LA4 from address decoder 400.This is the cause of the effect of address conversion circuit 410.During left and right sides flip displays, address conversion circuit 410 is selected latch cicuit LA4 according to the quantity of latch address data LAD and data line from 4 latch cicuit LA1～LA4, and to the pulse of latch cicuit LA4 output latch.When the quantity that makes the data line of display panel 510 is S (S is the integer more than or equal to 2), select when the latch cicuit LA4 for example computing (S-1)-LAD on the computing circuit 420 of address conversion circuit 410.That is, during Figure 18, obtain (4-1)-0=3.According to this result, select the latch cicuit LA4 of the address value of distribution 3, latch pulse inputs to latch cicuit LA4.
In a word, by from the value (broadly being left and right sides roll data) of quantity S subtraction 1 value of data line, deducting the value of latch address data LAD, can obtain being used for the address of the latch cicuit of left and right sides flip displays.By the video data of reading successively from display-memory 200 is carried out above-mentioned processing, left and right sides flip displays can realize easily.
In addition, promptly use address conversion circuit shown in Figure 19 412, also can realize left and right sides flip displays easily.On the address conversion circuit 412 of Figure 19, substitute the phase inverter of the address conversion circuit 410 be arranged on Figure 12 and be provided with for example XOR circuit EXOR.In the input in each XOR circuit EXOR, imported inverted pattern signal RM.In another input of each XOR circuit EXOR, imported the output data C1～Cx of computing circuit 420.At this, inverted pattern signal RM is defined as when showing usually and is set to high level signal (or logical value 1), is set to low level signal (or logical value 0) during the flip displays of the left and right sides.
When for example needing to show usually, inverted pattern signal RM is set to logical value 1, therefore, has imported logical value 1 in the input of each XOR circuit EXOR.On another of each XOR circuit EXOR, import the output of the XOR circuit EXOR of logical value 0, become logical value 1.In addition, the output of having imported the XOR circuit EXOR of logical value 1 in another input of each XOR circuit EXOR becomes logical value 0.That is, each XOR circuit EXOR as phase inverter work, therefore, has address conversion circuit 410 identical functions with Figure 12.
On the other hand, when needs carry out left and right sides flip displays, because inverted pattern signal RM is set to logical value 0, so, input logic value 0 in the input of each XOR circuit EXOR.At this moment, the output of each XOR circuit EXOR becomes the logical value of upward importing to another input of each XOR circuit EXOR.For example, the output of having imported the XOR circuit EXOR of logical value 1 in another input of each XOR circuit EXOR becomes logical value 1.That is, the output data C1 of computing circuit 420～Cx does not overturn, and data C1～Cx becomes the output of address conversion circuit 412.
Identical with address conversion circuit 410 shown in Figure 11, the output data of address conversion circuit 412 exports a plurality of logical circuit AND of address decoder 400 to.But when inverted pattern signal RM was logical value 0, each logical circuit AND of Figure 11 went up data C1～Cx that input is not reversed.For example, when data C1～Cx all was logical value 0, the output that has connected the logical circuit AND of phase inverter INV3 in whole inputs became logical value 1.In a word, the output that is connected the logical circuit AND of latch cicuit LAx becomes logical value 1, selects latch cicuit LAx from a plurality of latch cicuit LA1～LAx.
But, being under the situation about usually showing, when data C1～Cx all is logical value 0, all be logical value 1, so the output of logical circuit AND that is connected in the latch cicuit LA1 of Figure 11 becomes logical value 1 as the XC1～XCx of its roll data.That is, when the output data C1～Cx of address change-over circuit 410 all is logical value 0, to the pulse of latch cicuit LA1 input and latch.
That is, according to inverted pattern signal RM, the latch cicuit of choosing is opposite about on the directions X, and left and right sides flip displays is carried out easily.And this address conversion circuit 412 also can be used for laterally moving the computing that shows on computing circuit 420, so the horizontal mobile demonstration under the flip displays state of the left and right sides also can be carried out simply.
According to above-described present embodiment and variation, by freely selecting a plurality of latch cicuit LA1～LAx, needn't write for example video data of display-memory again, just the latch cicuit corresponding data line that can drive and choose shows video data on display panel.As laterally moving shown in demonstration, the move left and right demonstration etc., when the object pixels position that becomes video data changes in real time, in comparative example, each location of pixels changes the video data that all needs the update displayed storer, make the control complicated, but also have the problem of the load increased processor etc.But, need not rewrite for example video data of display-memory in present embodiment and the variation thereof, just can carry out laterally moving showing and left and right sides flip displays.
4. display-memory
Show display-memory 200 on Figure 20.On the display-memory 200, a plurality of bit line BL are being set.Each bit line BL extends and forms along directions X.When for example word line WL1 is selected, from a plurality of bit line BL output n bit data.
Figure 21 shows a plurality of storage unit that are arranged on the display-memory 200 and the relation between the video data DA1.Figure 21 shows the part of display-memory 200.On each bit line of bit line NBL1～NBL4, imported the energizing signal that the signal on each bit line that inputs to bit line BL1～BL4 is reversed.Each storage unit of display-memory 200 comprises N transistor npn npn NTR1, NTR2 and phase inverter INV1, INV2.For example storage unit MC1 carries out data write by bit line BL1, NBL1.In a word, storage unit MC1 utilizes the line of same system to carry out data input and output, therefore, becomes the storage unit of 1 passage at this.
When word line WL1 was selected, the grid of N transistor npn npn NTR1, the NTR2 of storage unit MC1 was a conducting state.Thus, can be from storage unit MC1 sense data, or can write data to storage unit MC1.Arranged on the display-memory 200 of a plurality of such 1 passage storage unit and stored video data DA1.The data D0 of n position video data DA1 for example is stored on the storage unit MC1.The data D1 of n position video data DA1 for example is stored on the storage unit MC2.Similarly, the data D2 of video data DA1, D3 for example are stored on storage unit MC3, the MC4.
Be stored in the video data DA1 on the display-memory 200, export code translator 100 to by selecting word line WL1.For example, by the output of readout bit line BL1, NBL1 such as sensor amplifier, thereby can read the data D0 of video data DA1.For data D2～D3 of video data DA1 too, can read from the output of bit line BL2～BL4, bit line NBL2～NBL4.
5. with the comparison of comparative example
Figure 22 is the figure that the display driver 1000 of comparative example is shown.Display driver 1000 for example comprises display-memory 210, a plurality of code translator 1100, a plurality of latch cicuit 1200 and a plurality of data line drive division 1300.Code translator 1100 for example comprises the multi-thread driving code translator of selecting simultaneously of the GTG code translator of deciphering luma data and the data that generate the driving voltage of selecting data line drive division 1300.
On display-memory 210, word line extends and forms along directions X.In addition, extend and form along the Y direction at display-memory 210 up line QBL, a plurality of bit line QBL arrange along directions X.On display-memory 210, arranged a plurality of word line WLX along the Y direction, but for the purpose of simplifying the description, a word line WLX1 has been shown among Figure 22.
When word line WLX1 is selected,, export to code translator 1100A from 1 bit data DA1-1 among the n position video data DA1 that is stored in display-memory 210, that be stored in the storage unit that is connected with word line WLX1.Similarly, from 1 bit data among n position video data DA2～DAx (x is the integer more than or equal to 2), that be stored in the storage unit that is connected with word line WLX1, export to each code translator 1100 by bit line QBL.
In a word, select, to 1 video data of each code translator output of a plurality of code translators 1100 by a word line.For example, when being the n position in order to make code translator 1100 decipher the required quantity of information of processes and displays data, by on each code translator 1100 latch cicuit etc. being set, n selection word line can be stored in the n bit data on the code translator 1100.
But when display panel is high resolving power, along with the increase of data line, the quantity of code translator 1100 also will increase.The increase of the quantity of this code translator 1100 will cause the increase of chip area, thereby increase manufacturing cost.In the display driver 10 of present embodiment, for example a code translator 100 selects data to export a plurality of latch cicuit LA1～LAx to driving voltage, therefore, can significantly dwindle chip area.Dwindling of chip area except cutting down manufacturing cost, also can be improved the degree of freedom of design.
Below, illustrate that the display-memory 210 as the display driver 1000 of comparative example writes the action of video data.Figure 23 is the figure that the display-memory 210 of comparative example is shown.Display-memory 210 except a plurality of bit line QBL, also comprises a plurality of word line WLY.Each word line WLY extends to form in display-memory 210 upper edge Y directions.When writing n position video data DA1 on the display-memory 210, word line WLY writes video data DA1 with selected on the storage unit that connects word line WLY-1.That is, every data of n position video data DA1 are stored in along on the storage unit of Y direction arrangement.Stored each the arrangement of storage unit of data of this video data DA1, identical with n position video data DA1 on the display-memory 200 that is stored in present embodiment.
In a word, identical during with the display driver 1000 that uses comparative example, can write video data DA1 to display-memory 200.For example, be the storer control program that the display driver 1000 that uses comparative example is made, also can easily be applicable to the display driver 10 of present embodiment.In the wiring method of such video data to display-memory, have the interchangeability with the display driver 1000 of comparative example, thus, can shorten design time.
Also have, the display-memory 200 of present embodiment is compared with the display-memory 210 of comparative example, and the data volume of unit area that can be stored in display-memory is extended.That is, the space of a whole page size that is equivalent to 1 storage unit is dwindled, and the distribution number that is arranged on the display-memory is also cut down.Thus, for example comprise the display driver 10 of display-memory 200, compare, can significantly dwindle chip area, thereby reach the effect that reduces manufacturing cost with the display driver 1000 of comparative example.
For above-mentioned effect is described, on Figure 24, show the circuit diagram of the part of the display-memory 210 of representing comparative example.On display-memory 210, be provided with a plurality of word line WLY, a plurality of bit line QBL, a plurality of word line WLX as described above.In addition, on display-memory 210, be provided with a plurality of bit line BL, NBL that extend to form along directions X, but show bit line BL1～BL4, NBL1～NBL4 as its part among Figure 24.In the display-memory 210, the storage unit of 1 bit data be can store, N transistor npn npn NTR1, NTR2 and P transistor npn npn PTR3, PTR4 comprised.In addition, the storage unit of display-memory 210 comprises phase inverter INV1, INV2.
When this display-memory 210 writes video data, selected along the word line WLY that the Y direction extends to form, write data by bit line BL, the NBL that extends to form along directions X to each storage unit.When reading video data from display-memory 210, selected along the word line WLX that directions X extends to form, the bit line QBL output that extends to form by the Y direction is stored in the data of each storage unit.Like this for a storage unit, data are for example from the input of two systems of bit line BL1, NBL1, the data that are stored in storage unit from bit line BL1, NBL1 be not the storage unit that the unit of 1 a system system, for example bit line QBL output is called 1.5 passages.
At this, when observing the storage unit of 1 passage shown in Figure 21, on the 1 passage storage unit of Figure 21, be not arranged on 2 P transistor npn npn PTR3, PTR4 being provided with on the storage unit of 1.5 passages of comparative example.Also have, be arranged on a plurality of word line WLX and a plurality of bit line QBL on the display-memory 210 of comparative example, be not arranged on the display-memory 200 of present embodiment.That is, when display-memory 200 and display-memory 210 can be stored with the data of capacity, the display-memory 200 of present embodiment was compared with the display-memory 210 of comparative example and can significantly be dwindled die size.
6. variation
The display driver 10 of Fig. 1 comprises: code translator 100, display-memory 200, control circuit 300, address decoder 400, data line drive division DRV and latch cicuit LA1～LAx, but be not limited thereto.For example, display driver 10, it also is possible omitting some in the foregoing circuit etc. or comprising other circuit.For example, display driver 10 can omit display-memory 200, control circuit 300 or address decoder 400.
In addition, the code translator 100 of Fig. 1 comprises FRC code translator 110 and MLS code translator 120, but is not limited thereto.For example, in code translator 100, can omit FRC code translator 110 or MLS code translator 120.
The variation of the display driver 10 of present embodiment has been shown among Figure 25.The display driver 2000 of the variation of present embodiment comprises: display-memory 200, code translator 101 and 102, address decoder 400, a plurality of latch cicuit, a plurality of data line drive division, but be not limited thereto.For example, display driver 2000 also can be a structure of having omitted display-memory 200.Read the total 2n bit data of n position video data DA1 and n position video data DA2 from display-memory 200.In the 2n bit data, for example export n position video data DA1 to code translator 101, for example export n position video data DA2 to code translator 102.When the resolution of display panel uprises, do not append the decoding of video data in during 1 demonstration and handle the show state that just might influence display panel.But, by using display driver 2000, even under the higher situation of the resolution of display panel, the decoding of video data can be handled being dispersed on the code translator 101,102, therefore, can with the video data high image quality be presented on the display panel.
7. electronic equipment
Figure 26 is the block diagram that the electronic devices structure that comprises the related display driver of present embodiment 10 is shown.The electronic equipment 4000 of Figure 27 comprises: display driver 10, display panel 500, drive the sweep trace of display panel 500 scanner driver 4100, provide controller 4200, the power supply 4300 of control signal etc. to display driver 10 and scanner driver 4100, but be not limited thereto.For example, also can omit controller 4200 or power supply, also miscellaneous equipment can be set.
On electronic equipment 4000, be provided with display driver 10, therefore, can cut down the manufacturing cost of electronic equipment 4000.
In addition, the invention is not restricted to the explanation in the foregoing description, can carry out various distortion and implement.For example, in the description of instructions or accompanying drawing, the term that is cited as the term of broad sense or synonym (GTG code translator, GTG ROM, multi-thread select simultaneously to drive address information with code translator, display-memory, latch cicuit etc.), during other of instructions or accompanying drawing described, also can replace to the term (FRC code translator, FRCROM, MLS code translator, the selection signal of selecting word line, trigger etc.) of broad sense or synonym.
Symbol description
10 display drivers, 100 decoders, 110 FRC decoders
112 FRCROM, 120 MLS decoders, 200 display-memories
300 control circuits, 400 address decoders, 410 address conversion circuits
500 display floaters, 4000 electronic equipments, 4100 scanner drivers
The input of 4200 controllers, 4300 power supply D data
DA1 shows that data DA2 shows data DR2 first direction
DR3 second direction DRV data wire drive division FF trigger
LA1～LAx latch cicuit LP1 latch pulse
MA1 shows the output of data Q data
SCD transverse shifting data SR shift register
The VSD1 driving voltage is selected data W L1～WLQ word line

Claims (17)

1. display driver is characterized in that comprising:
Code translator, to being that the n position video data that unit exports is successively deciphered processing from display-memory with the n position, wherein, n is the integer more than or equal to 2; A plurality of latch cicuits latch and have carried out the data that decoding is handled by described code translator;
Address decoder produces latch pulse, and described latch pulse is used to make the output of described a plurality of latch circuit latches from described code translator; And
A plurality of data line drive divisions according to by the data of each latch circuit latches of described a plurality of latch cicuits, drive the data line of display panel,
Wherein, by described display-memory being carried out a word line control, read described n position video data from described display-memory, and export described code translator to; Described code translator to being that the described n position video data that unit exports is successively deciphered processing from described display-memory with the n position, and exports described decoding data processed to described a plurality of latch cicuit successively;
Described address decoder, the address information of the described display-memory when reading described n position video data and the storage purpose ground appointed information that is provided with arbitrarily by control circuit, from described a plurality of latch cicuits, select one, and export described latch pulse to selected latch cicuit;
Each data line drive division of described a plurality of data line drive divisions after described decoding data processed is stored in described a plurality of latch cicuit, drives each the data line drive division corresponding data line with described a plurality of data line drive divisions.
2. display driver according to claim 1 is characterized in that:
The storage purpose ground appointed information that is provided with arbitrarily by described control circuit comprises horizontal mobile data,
According to the address information of described display-memory, the latch address data on the storage purpose ground of the described decoding data processed of expression are set,
Described address decoder comprises address conversion circuit,
Described address conversion circuit receives described horizontal mobile data and described latch address data,
When making image horizontal when mobile on first direction on the display panel, described horizontal mobile data and described latch address data are carried out addition process, and from described a plurality of latch cicuits, select one, and export described latch pulse to selected latch cicuit according to its result
When making image horizontal when mobile on the second direction opposite on the display panel with described first direction, described horizontal mobile data and described latch address data are carried out subtraction process, and from described a plurality of latch cicuits, select one, and export described latch pulse to selected latch cicuit according to its result.
3. display driver according to claim 1 is characterized in that:
The storage purpose ground appointed information that is provided with arbitrarily by described control circuit comprises left and right sides roll data,
According to the address information of described display-memory, the latch address data on the storage purpose ground of the described decoding data processed of expression are set,
Described address decoder comprises address conversion circuit,
Described address conversion circuit, receive described left and right sides roll data and described latch address data, described left and right sides roll data and described latch address data are carried out subtraction process, and from described a plurality of latch cicuits, select one, and export described latch pulse to selected latch cicuit according to its result.
4. display driver according to claim 2 is characterized in that:
The storage purpose ground appointed information that is provided with arbitrarily by described control circuit also comprises left and right sides roll data;
Described address conversion circuit receives described left and right sides roll data and described latch address data, and described left and right sides roll data and described latch address data are carried out subtraction process;
When image laterally being moved show on display panel, described address decoder is to according to described horizontal mobile data and described latch address data being carried out the latch cicuit output latch pulse that addition process or result of subtraction are chosen; When making image on display panel during the flip displays of the left and right sides, described address decoder is to according to described left and right sides roll data and described latch address data are carried out the latch cicuit output latch pulse that result of subtraction is chosen.
5. according to each described display driver in the claim 1 to 4, it is characterized in that:
Described code translator comprises the multi-thread driving code translator of selecting simultaneously;
The described multi-thread driving code translator of selecting simultaneously, video data according to the m pixel in the video data that is included in described n position, generation is used for from selecting data with the multi-thread driving voltage of selecting simultaneously to drive corresponding a plurality of driving voltages selection driving voltages of sweep trace, and select data to export described a plurality of latch cicuit to the described driving voltage, wherein, m is the integer more than or equal to 2.
6. display driver according to claim 5 is characterized in that:
Each data line drive division of described a plurality of data line drive divisions is according to being stored in
Described driving voltage in described a plurality of latch cicuit is selected data, selects the data line driving voltage from described a plurality of driving voltages;
Each data line drive division of described a plurality of data line drive divisions uses described data line driving voltage driving data lines.
7. according to each described display driver in the claim 1 to 4, it is characterized in that:
Described code translator comprises the GTG code translator;
Described GTG code translator is according to described n position video data and frame number, determines to become the display mode of the object pixels of described n position video data.
8. display driver according to claim 7 is characterized in that:
Described GTG code translator exports 0 or 1 data in described a plurality of latch cicuit at least one according to described display mode.
9. display driver according to claim 7 is characterized in that:
Described code translator comprises also being used for selecting the corresponding multi-thread driving of selection simultaneously of type of drive to use code translator simultaneously with the multi-thread of the sweep trace of selecting driving m bar simultaneously that wherein, m is the integer more than or equal to 2;
The described multi-thread driving code translator of selecting simultaneously, according to the display mode of determining by described GTG code translator, to be used to select the driving voltage of data line driving voltage to select data to export described a plurality of latch cicuit to, described data line driving voltage is used for driving data lines.
10. display driver according to claim 9 is characterized in that:
Each data line drive division of described a plurality of data line drive divisions, select data according to the described driving voltage that is stored in described a plurality of latch cicuit, from being used for selecting the data line driving voltage with the multi-thread corresponding multiple driving voltage of driving of selecting simultaneously of sweep trace;
Each data line drive division of described a plurality of data line drive divisions uses described data line driving voltage driving data lines.
11. display driver according to claim 10 is characterized in that:
The GTG of each pixel in the video data of the m pixel of choosing from the video data of described n position represents that with k position luma data wherein, k is the integer more than or equal to 2, n=k * m;
Described GTG code translator comprises GTG ROM, and described GTG ROM determines the grayscale mode of two kinds of show states of expression according to described k position luma data and frame number;
Described GTG code translator is determined described grayscale mode about each pixel of m pixel according to described GTG ROM, according to fixed described grayscale mode, the show state of each pixel of m pixel exported to the m position video data of 0 or 1 expression describedly multi-threadly select simultaneously to drive to use code translator;
Described multi-thread selection simultaneously drives uses code translator according to described m position video data, generates described driving voltage and selects data, and export described a plurality of latch cicuit to.
12., it is characterized in that according to each described display driver in the claim 1 to 4:
Described n position video data, with from one in the rising edge of clock signal of control circuit or the negative edge synchronously, read from described display-memory;
In described address decoder and described rising edge of clock signal or the negative edge another is synchronous, exports described latch pulse.
13. display driver according to claim 5 is characterized in that:
Described n position video data, with from one in the rising edge of clock signal of control circuit or the negative edge synchronously, read from described display-memory;
In described address decoder and described rising edge of clock signal or the negative edge another is synchronous, exports described latch pulse.
14. display driver according to claim 7 is characterized in that:
Described n position video data, with from one in the rising edge of clock signal of control circuit or the negative edge synchronously, read from described display-memory;
In described address decoder and described rising edge of clock signal or the negative edge another is synchronous, exports described latch pulse.
15. an electronic equipment is characterized in that comprising:
Display driver;
Display panel;
Drive the scanner driver of the sweep trace of described display panel;
The controller that described display driver and described scanner driver are controlled; And
Power circuit,
Wherein, described display driver comprises:
Code translator, to being that the n position video data that unit exports is successively deciphered processing from display-memory with the n position, wherein, n is the integer more than or equal to 2; A plurality of latch cicuits latch and have carried out the data that decoding is handled by described code translator;
Address decoder produces latch pulse, and described latch pulse is used to make the output of described a plurality of latch circuit latches from described code translator; And
A plurality of data line drive divisions according to by the data of each latch circuit latches of described a plurality of latch cicuits, drive the data line of display panel,
Wherein, described n position video data by described display-memory being carried out a word line control, is read from described display-memory, and is exported to described code translator;
Described code translator to being that the described n position video data that unit exports is successively deciphered processing from described display-memory with the n position, and exports described decoding data processed to described a plurality of latch cicuit successively;
Described address decoder, the address information of the described display-memory when reading described n position video data and the storage purpose ground appointed information that is provided with arbitrarily by control circuit, from described a plurality of latch cicuits, select one, and export described latch pulse to selected latch cicuit;
Each data line drive division of described a plurality of data line drive divisions after described decoding data processed is stored in described a plurality of latch cicuit, drives each the data line drive division corresponding data line with described a plurality of data line drive divisions.
16. electronic equipment according to claim 15 is characterized in that:
Described code translator comprises the multi-thread driving code translator of selecting simultaneously;
The described multi-thread driving code translator of selecting simultaneously, video data according to the m pixel in the video data that is included in described n position, generation is used for from selecting data with the multi-thread driving voltage of selecting simultaneously to drive corresponding a plurality of driving voltages selection driving voltages of sweep trace, and select data to export described a plurality of latch cicuit to the described driving voltage, wherein, m is the integer more than or equal to 2.
17. electronic equipment according to claim 15 is characterized in that:
Described code translator comprises the GTG code translator;
Described GTG code translator is according to described n position video data and frame number, determines to become the display mode of the object pixels of described n position video data.
CNB2005100569297A 2004-03-23 2005-03-23 Display driver and electronic instrument Expired - Fee Related CN100382122C (en)

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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100600946B1 (en) * 2004-05-10 2006-07-13 매그나칩 반도체 유한회사 Organic electro-luminescent operation circuit and method for saving screen with the same
KR100780943B1 (en) * 2005-09-21 2007-12-03 삼성전자주식회사 Driving IC for display device and driving method thereof
KR100712538B1 (en) 2005-10-28 2007-04-30 삼성전자주식회사 Pulse generator based on latch and control signal generator having the same
KR100780945B1 (en) * 2006-02-15 2007-12-03 삼성전자주식회사 Driving apparatus of display panel
JP4776646B2 (en) * 2008-03-10 2011-09-21 株式会社リコー Image processing apparatus, image processing method, program, and recording medium
CN103137052B (en) * 2011-11-23 2016-04-27 苏州艾隆科技股份有限公司 The numeric displaying method controlled based on PLC and system
TWI515714B (en) * 2013-10-30 2016-01-01 矽創電子股份有限公司 Method of refreshing memory array, driving circuit and display
JP6143646B2 (en) * 2013-11-05 2017-06-07 株式会社東芝 Semiconductor device
US10714166B2 (en) * 2018-08-13 2020-07-14 Micron Technology, Inc. Apparatus and methods for decoding memory access addresses for access operations

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1170183A (en) * 1996-05-21 1998-01-14 摩托罗拉公司 System for horizontal scrolling of display data
JPH1152926A (en) * 1997-08-05 1999-02-26 Oki Micro Design Miyazaki:Kk Display device
JP2001318653A (en) * 2000-05-08 2001-11-16 Matsushita Electric Ind Co Ltd Picture display device
US20020075217A1 (en) * 2000-11-02 2002-06-20 Masafumi Hoshino Method of driving liquid crystal display panel
US20020135604A1 (en) * 2001-02-07 2002-09-26 Seiko Epson Corporation Display drive circuit, semiconductor integrated circuit, display panel, and display drive method
CN1406368A (en) * 2000-12-27 2003-03-26 松下电器产业株式会社 Matrix display and its drive method
JP2003099014A (en) * 2001-09-26 2003-04-04 Toshiba Corp Control circuit for driving liquid crystal and method for re-arranging display data for driving liquid crystal
US20040032403A1 (en) * 2002-05-23 2004-02-19 Stmicroelectronics S.R.I. And Dora S.P.A. Driving method for flat-panel display devices

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4734689A (en) * 1985-03-07 1988-03-29 Casio Computer Co., Ltd. Display apparatus which can scroll displayed data with regard to cursor position
JP2667204B2 (en) * 1988-06-18 1997-10-27 株式会社日立製作所 Gradation display device
JP2785092B2 (en) 1992-09-16 1998-08-13 ローム株式会社 Flat panel display
JPH0695618A (en) 1992-09-16 1994-04-08 Matsushita Electric Ind Co Ltd Device for driving liquid crystal
JPH06195043A (en) 1992-12-25 1994-07-15 Hitachi Ltd Matrix type liquid crystal display device and its driving method
JPH07219508A (en) * 1993-12-07 1995-08-18 Hitachi Ltd Display controller
JPH07281636A (en) 1994-04-07 1995-10-27 Asahi Glass Co Ltd Driving device used for liquid crystal display device, semiconductor integrated circuit for driving column electrode and semiconductor integrated circuit for driving row electrode
JPH09230834A (en) 1996-02-27 1997-09-05 Sony Corp Active matrix display device
EP1011087A4 (en) * 1998-07-03 2005-01-19 Seiko Epson Corp Semiconductor device, image display system and electronic system
JP3522628B2 (en) * 1999-11-09 2004-04-26 シャープ株式会社 Semiconductor device and display device module
US6801219B2 (en) * 2001-08-01 2004-10-05 Stmicroelectronics, Inc. Method and apparatus using a two-dimensional circular data buffer for scrollable image display
EP1431952A4 (en) * 2001-09-28 2009-12-02 Sony Corp Display memory; driver circuit; display; and cellular information apparatus

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1170183A (en) * 1996-05-21 1998-01-14 摩托罗拉公司 System for horizontal scrolling of display data
JPH1152926A (en) * 1997-08-05 1999-02-26 Oki Micro Design Miyazaki:Kk Display device
JP2001318653A (en) * 2000-05-08 2001-11-16 Matsushita Electric Ind Co Ltd Picture display device
US20020075217A1 (en) * 2000-11-02 2002-06-20 Masafumi Hoshino Method of driving liquid crystal display panel
CN1406368A (en) * 2000-12-27 2003-03-26 松下电器产业株式会社 Matrix display and its drive method
US20020135604A1 (en) * 2001-02-07 2002-09-26 Seiko Epson Corporation Display drive circuit, semiconductor integrated circuit, display panel, and display drive method
JP2003099014A (en) * 2001-09-26 2003-04-04 Toshiba Corp Control circuit for driving liquid crystal and method for re-arranging display data for driving liquid crystal
US20040032403A1 (en) * 2002-05-23 2004-02-19 Stmicroelectronics S.R.I. And Dora S.P.A. Driving method for flat-panel display devices

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US20050212785A1 (en) 2005-09-29
KR20060044548A (en) 2006-05-16
JP2005274759A (en) 2005-10-06

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