CN100371808C - Glass flip-chip arrangement - Google Patents
Glass flip-chip arrangement Download PDFInfo
- Publication number
- CN100371808C CN100371808C CNB031398111A CN03139811A CN100371808C CN 100371808 C CN100371808 C CN 100371808C CN B031398111 A CNB031398111 A CN B031398111A CN 03139811 A CN03139811 A CN 03139811A CN 100371808 C CN100371808 C CN 100371808C
- Authority
- CN
- China
- Prior art keywords
- drive
- glass
- mute
- flip chip
- function projection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13012—Shape in top view
- H01L2224/13013—Shape in top view being rectangular or square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
The present invention relates to a glass flip chip structure which comprises a drive IC, a glass base board for bearing the drive IC, and an anisotropic conductive film by which the drive IC and the glass base board are connected, wherein the drive IC relative to the surface of the glass base board is provided with a plurality of functional projections. The bearing surface of the glass base board is provided with a plurality of functional conductive shims whose number and positions correspond to those of the functional projections of the drive IC. The drive IC relative to four corners of the surface of the glass base board is further provided with a plurality of mute functional projections. The bearing surface of the glass base board is further provided with mute functional conductive shims whose number and positions correspond to those of the mute functional projections of the drive IC.
Description
[technical field]
The present invention relates to a kind of glass flip chip structure (Structure of Chip On Glass), especially relates to a kind of glass flip chip structure that is used for liquid crystal display-driving IC (Integrated Circuit) encapsulation.
[background technology]
LCD since its compare with triniscope (Cathode Ray Tube) have low voltage drive, low-power consumption, the capacity of display are big, hang down radiation and frivolous advantage, various audio-visual devices and communication apparatus have been widely used in, the packaged type of its drive IC also develops into glass flip chip of today (Chip on Glass by early stage COB (Chip on Board), TAB (Tape Carrier Bonding), COG) and pad cover crystalline substance (Chip on Film COF) wait packaged type.
Seeing also Fig. 1, is a kind of glass flip chip structural representation of prior art.This glass flip chip structure 1 comprises a drive IC 11, carry the glass substrate 13 and the Anisotropically conductive film (AnisotropicConductor Film) 12 that is used to be connected this drive IC 11 and this glass substrate 13 of this drive IC 11, the surface 110 of these drive IC 11 relative these glass substrates 13 has a plurality of function projections (Function Bump) 111, the loading end 130 of this glass substrate 13 has the corresponding functional conductive pad (Function Conductor Pattern) 131 of function projection 111 numbers and position a plurality of and drive IC 11, and this Anisotropically conductive film 12 is made up of binder 121 and the conducting particles 122 that is positioned at wherein.This glass flip chip structure 1 is carried out crimping, and the function projection 111 of this drive IC 11 can be realized conducting by the conducting particles 122 of this Anisotropically conductive film 12 with 131 on the functional conductive pad of glass substrate 13.
Please consult Fig. 2 together, the crimping process of this glass flip chip structure 1 comprises: glass substrate 13 is provided, and the loading end 130 of this glass substrate 13 has a plurality of functional conductive pad 13l; Anisotropically conductive film 12 is pasted loading end 130 at this glass substrate 13; This drive IC 11 is placed on this Anisotropically conductive film 12, have a plurality of function projections 111 on the surface 110 of these drive IC 11 relative these glass substrates 13, these a plurality of function projections 111 are corresponding with a plurality of functional conductive pads 131 on the loading end 130 of glass substrate 13 respectively; Under uniform temperature, speed and pressure condition, said structure is carried out precompressed and this press operation, make the function projection 111 of drive IC 11 realize electrically connecting by the conducting particles 122 of this Anisotropically conductive film 12, and drive IC 11 and glass substrate 13 are binded by binder 121 with the functional conductive pad 131 of glass substrate 11.Usually, after finishing, this crimping process needs the stress relief that produces in the crimping process, yet because these drive IC 11 length are longer, material stress is distributed in four corners of drive IC 11, make the impression in encapsulation rear drive IC 11 4 corners not obvious, be that function projection 111 on drive IC 11 4 corners is relatively poor with the electric connection effect of the functional conductive pad 131 of corresponding glass substrate 13, even connection failure, influence the stability and the reliability of product.Though, adopt reducing parameters such as this pressures temperature, this pressure speed in the actual engineering and improve the unconspicuous situation of this impression, it is failed thoroughly to solve stress distribution all the time and causes in four corners that impression is not obvious, the relatively poor problem of electric connection effect.
[summary of the invention]
The glass flip chip structure electrically connects poor defective in the prior art in order to overcome, and the invention provides a kind of preferable glass flip chip structure that electrically connects.
The technical scheme that technical solution problem of the present invention is adopted is: a kind of glass flip chip structure is provided, it comprises a drive IC, carry the glass substrate and the Anisotropically conductive film that is used to be connected this drive IC and this glass substrate of this drive IC, this drive IC surface of this glass substrate relatively has a plurality of function projections and mute function projection (Dummy Bump), four corners that should mute function projection be distributed in this drive IC, have on the loading end of this glass substrate a plurality of respectively with the function projection and corresponding functional conductive pad and the mute functional conductive pad (Dummy Conductor Pattern) of mute function projection number and position of this drive IC.
Compared with prior art, glass flip chip structure of the present invention is owing to further be provided with four corners of mute function projection in drive IC, be connected with the mute functional conductive pad of glass substrate by the Anisotropically conductive pad function projection of will making mute, can effectively reduce or eliminate the destruction of material stress to function projection and the electric connection of functional conductive pad, therefore it is more reliable function projection and functional conductive pad to be electrically connected, and guarantees that product electrically connects preferable and good stable.
[description of drawings]
Fig. 1 is a kind of glass flip chip structural representation of prior art.
Fig. 2 is the crimping synoptic diagram of glass flip chip structure shown in Figure 1.
Fig. 3 is the synoptic diagram of glass flip chip structure of the present invention.
Fig. 4 is the function projection of Fig. 3 drive IC and the distribution schematic diagram of mute function projection.
Fig. 5 is the crimping procedure chart of glass flip chip structure of the present invention.
Fig. 6 is the anti-failure synoptic diagram that electrically connects of Fig. 3 glass flip chip structure.
[embodiment]
Seeing also Fig. 3, is the synoptic diagram of glass flip chip structure of the present invention.This glass flip chip structure 2 comprises a drive IC 21, carry the glass substrate 23 and the Anisotropically conductive film 22 that is used to be connected this drive IC 21 and this glass substrate 23 of this drive IC 21, wherein this drive IC 21 is elongated, the surface 210 of its relative glass substrate 23 has a plurality of equally distributed function projections 211 and mute function projection 212, the function projection 212 of should making mute is distributed in four corners of this drive IC 21, the loading end 230 of this glass substrate 23 have a plurality of respectively with the function projection 211 of drive IC 21 and the corresponding functional conductive pad 231 and mute functional conductive pad 232 of mute function projection 212 numbers and position, this Anisotropically conductive film 22 is made up of binder 221 and the conducting particles 222 that is positioned at wherein.This glass flip chip structure 2 is carried out crimping, and the function projection 211 of drive IC 21 is realized conducting with the functional conductive pad 231 of glass substrate 23 by this Anisotropically conductive film 22, and mute function projection 212 is realized being connected with mute functional conductive pad 232.
Please consult Fig. 4 together, this drive IC 21 is elongated, this function projection 211 is evenly distributed on the surface 210 of drive IC 21 relative glass substrates 23 (Fig. 4 does not show) with mute function projection 212, the function projection 212 of should making mute is distributed in four corners of drive IC 21, each corner of this drive IC 21 comprises at least one mute function projection 212, this function projection 211 is consistent with mute function projection 212 external forms and size, its shape is square or circular, and according to the demand of cost or function projection 211 with mute function projection 212 pitches (Pitch), this function projection 211 also can be different with mute function projection 212 external forms and size.
See also Fig. 5, the crimping process of glass flip chip structure 2 of the present invention comprises: glass substrate 23 is provided, has a plurality of functional conductive pads 231 and mute functional conductive pad 232 on the loading end 230 of this glass substrate 23; Anisotropically conductive film 22 is pasted on the loading end 230 of this glass substrate 23; This drive IC 21 is placed on this Anisotropically conductive film 22, wherein, this drive IC 21 is elongated, have a plurality of equally distributed function projections 211 and mute function projection 212 on the surface 210 of its relative glass substrate 23, the function projection 212 of should making mute is distributed in four corners of this drive IC 21, and the number of this function projection 211 and mute function projection 212 and position correspond respectively to functional conductive pad 231 and mute functional conductive pad 232; Under uniform temperature, speed and pressure condition, this glass flip chip structure 2 is carried out precompressed and this press operation, the function projection 211 of drive IC 21 is realized electrically connecting by the conducting particles 222 of this Anisotropically conductive film 22 with the functional conductive pad 231 of glass substrate 23, mute simultaneously function projection 212 is realized being connected by Anisotropically conductive film 22 with mute functional conductive pad 232, to realize the bonding of drive IC 21 and glass substrate 23.
Seeing also Fig. 6, is the glass flip chip structure 2 anti-failure synoptic diagram that electrically connect of the present invention.This drive IC 21 is in uniform temperature, following and glass substrate 23 bondings of speed and pressure condition, because these drive IC 21 length are longer, the residual stress distribution that exists is in four corners of this drive IC 21, to connect effects relatively poor so four corners of this drive IC 21 may produce its corresponding mute functional conductive pads 232 of mute function projection 212 of four corners that deformation makes the surface 210 of drive IC 21 relative glass substrates 23, even connection failure, but this situation can't influence functional conductive pad 231 electric connections of function projection 211 with the glass substrate 23 of drive IC 21, promptly mute function projection 212 positions that increase a plurality of mute function projections 212 and glass substrate 23 loading ends 230 corresponding drive IC 21 by four corners on the surface 210 of the relative glass substrate 23 of drive IC 21 increase the mute functional conductive pad 232 of corresponding number, effectively reduce or eliminate the destruction that material stress electrically connects function projection 211 and functional conductive pad 231, thereby guarantee that product electrically connects preferable and good stable.
This glass flip chip structure 2 can be used as the drive IC packing forms, is used for LCD.
The function projection 211 and mute function projection 212 materials of this drive IC 21 can be gold or leypewter.
Claims (7)
1. glass flip chip structure, it comprises the glass substrate and the Anisotropically conductive film that is used to be connected this drive IC and this glass substrate of a drive IC, this drive IC of carrying, this drive IC surface of this glass substrate relatively has a plurality of function projections, the loading end of this glass substrate has a plurality of and the corresponding functional conductive pad of drive IC function projection number and position, it is characterized in that: this drive IC four corners on the surface of this glass substrate relatively further has a plurality of mute function projections; The loading end of this glass substrate further has and mute function projection number of drive IC and the corresponding mute functional conductive pad in position.
2. glass flip chip structure as claimed in claim 1 is characterized in that: the function projection of this drive IC and mute function projection are even distributions.
3. glass flip chip structure as claimed in claim 1 is characterized in that: this drive IC shape is a strip.
4. glass flip chip structure as claimed in claim 1 is characterized in that: the function projection of this drive IC and mute function projection are square or round bump.
5. glass flip chip structure as claimed in claim 1 is characterized in that: this Anisotropically conductive film is made up of binder and the conducting particles that is positioned at wherein.
6. glass flip chip structure as claimed in claim 1 is characterized in that: the function projection of this drive IC and the material of mute function projection are gold.
7. glass flip chip structure as claimed in claim 1 is characterized in that: the function projection of this drive IC and the material of mute function projection are leypewters.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB031398111A CN100371808C (en) | 2003-07-08 | 2003-07-08 | Glass flip-chip arrangement |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB031398111A CN100371808C (en) | 2003-07-08 | 2003-07-08 | Glass flip-chip arrangement |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1567069A CN1567069A (en) | 2005-01-19 |
CN100371808C true CN100371808C (en) | 2008-02-27 |
Family
ID=34470726
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB031398111A Expired - Lifetime CN100371808C (en) | 2003-07-08 | 2003-07-08 | Glass flip-chip arrangement |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN100371808C (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100428433C (en) * | 2005-06-23 | 2008-10-22 | 矽创电子股份有限公司 | Structure of electric connection pad |
CN100342532C (en) * | 2005-09-01 | 2007-10-10 | 友达光电股份有限公司 | Structure of conductive pad in use for encapsulating chips |
CN102253561B (en) * | 2011-07-28 | 2014-04-16 | 信利半导体有限公司 | Manufacturing method of electronic ink display panel |
CN108987439A (en) * | 2018-06-21 | 2018-12-11 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10117049A (en) * | 1997-10-27 | 1998-05-06 | Seiko Epson Corp | Liquid crystal apparatus |
JPH1138432A (en) * | 1997-07-18 | 1999-02-12 | Hitachi Ltd | Liquid crystal display device |
JP2001085083A (en) * | 1999-09-14 | 2001-03-30 | Sony Chem Corp | Cog mounting article and connecting material |
JP2001135665A (en) * | 1999-11-10 | 2001-05-18 | Matsushita Electric Ind Co Ltd | Monolithic semiconductor integrated circuit and display device using it |
-
2003
- 2003-07-08 CN CNB031398111A patent/CN100371808C/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1138432A (en) * | 1997-07-18 | 1999-02-12 | Hitachi Ltd | Liquid crystal display device |
JPH10117049A (en) * | 1997-10-27 | 1998-05-06 | Seiko Epson Corp | Liquid crystal apparatus |
JP2001085083A (en) * | 1999-09-14 | 2001-03-30 | Sony Chem Corp | Cog mounting article and connecting material |
JP2001135665A (en) * | 1999-11-10 | 2001-05-18 | Matsushita Electric Ind Co Ltd | Monolithic semiconductor integrated circuit and display device using it |
Also Published As
Publication number | Publication date |
---|---|
CN1567069A (en) | 2005-01-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6552419B2 (en) | Semiconductor device and liquid crystal module using the same | |
US7109575B2 (en) | Low-cost flexible film package module and method of manufacturing the same | |
US10971465B2 (en) | Driving chip, display substrate, display device and method for manufacturing display device | |
JP2005026682A (en) | Structure of cog mounting | |
US20070063347A1 (en) | Packages, anisotropic conductive films, and conductive particles utilized therein | |
CN101136388A (en) | Chip film package and display panel assembly having the same | |
JPH09152621A (en) | Liquid crystal display device and its production | |
CN207993860U (en) | Packaging | |
JPH09293751A (en) | Tape carrier package and connection method | |
US10178771B2 (en) | Circuit board, manufacturing method thereof and display apparatus | |
TW200523610A (en) | Driver chip and display apparatus including the same | |
CN100371808C (en) | Glass flip-chip arrangement | |
US11874568B2 (en) | Display panel and display device | |
CN2735377Y (en) | Flip chip structure | |
CN100416343C (en) | Structure for increasing reliability of metal connecting line | |
CN100480786C (en) | Composite crystal structure of glass, and LCD of using the composite crystal structure of glass | |
CN102097158A (en) | Anisotropic conductive film (ACF) structure | |
US7538278B2 (en) | Printed circuit board for preventing increase of thermal expansion | |
CN1979266A (en) | Liquid crystal display | |
US11259414B2 (en) | Flex on board anisotropic conductive adhesive interconnection | |
JP2000150584A (en) | Semiconductor device mounting device | |
CN201489231U (en) | Flexible printed circuit board and liquid crystal display device | |
CN107833524B (en) | Chip, flexible display panel and display device | |
JPH05109821A (en) | Structure, method and equipment for mounting semiconductor device | |
CN109037998A (en) | Electrical connection module and display device, electrically connected method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CX01 | Expiry of patent term | ||
CX01 | Expiry of patent term |
Granted publication date: 20080227 |