CN100356595C - III-nitride semiconductor element and manufacturing method thereof - Google Patents
III-nitride semiconductor element and manufacturing method thereof Download PDFInfo
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- CN100356595C CN100356595C CNB2004100826728A CN200410082672A CN100356595C CN 100356595 C CN100356595 C CN 100356595C CN B2004100826728 A CNB2004100826728 A CN B2004100826728A CN 200410082672 A CN200410082672 A CN 200410082672A CN 100356595 C CN100356595 C CN 100356595C
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Abstract
The present invention relates to a structure and a manufacture method of III family nitride semiconductor components. A stress relieving layer is composed of an amorphous silicon nitride layer, a metal aluminium interface layer, an amorphous aluminium nitride prearranged layer and a polycrystal III family nitride layer containing an aluminium element, and is positioned between a silicon substrate and a III family nitride semiconductor to relieve stress generated due to the differences of lattice constants and thermal expansion coefficients of III family nitride materials and the silicon substrate. The breakage of the III family nitride semiconductor due to the stress is avoided.
Description
Technical field
The present invention relates to a kind of III group-III nitride semiconductor element and manufacture method thereof, particularly at a kind of by the stress sustained release layer that is positioned between silicon substrate and III group-III nitride semiconductor, alleviate between III group nitride material and silicon substrate because of lattice constant each other and stress that thermal expansion coefficient difference produced, III group-III nitride semiconductor element and the manufacture method thereof of avoiding stress to cause the III group-III nitride semiconductor to break.
Background technology
The employed growing method of deposition of high-quality GaN compound film generally can be distinguished into two group of methods.First group is to comprise that it is the method for MOCVD variation and so on that Metalorganic chemical vapor deposition (MOCVD) method or plasma quicken mocvd method.These characteristics of organizing all methods are to use the representative reaction furnace pressure of 10～1030hPa and 500～1100 ℃ high-quality GaN growth temperature.The gimmick that control GaN grows up comprises the chemical reaction between gas-phase chemical reaction and substrate surface or semiconductive thin film surface.Second group of correlating method that comprises molecular beam epitaxy (MBE) method and gas source molecular beam epitaxy (GSMBE) method, chemical light beam epitaxy (CBE) method or organic metal molecular beam epitaxy (MOMBE) method and so on.This group is different with aforesaid mocvd method because of the low furnace pressure below the no 0.001hPa and gas-phase reaction.
Fig. 1 is for showing the schematic diagram of mocvd method, and the member among the figure is respectively sapphire substrate 10, reacting furnace 11, pedestal 12, heater 13, reacting gas ascending pipe 14, injects looped pipeline 15, excavationg pump 16, motor 17 and discharge pipe 18.Utilize the GaN epitaxial loayer of following steps at sapphire substrate 10 growth 4um thickness.At first, remain in reacting furnace 11 under the pressure of 1030hPa, the sapphire substrate of cleaning 10 that will have 2 inch diameters is positioned on the pedestal 12.And with excavationg pump 16 abundant air of discharging in the stainless steel reacting furnace 11.Secondly, with H
2Gas imports in the reacting furnace 11, by this with H
2Air in the gas transposing reacting furnace 11.Then, reach H in the injection looped pipeline 15 supply response stoves 11 on reacting furnace 11 tops from reacting furnace 11 interior reacting gas ascending pipes 14 on the one hand
2Gas then utilizes the heater 13 of pedestal 12 belows to be heated to 1060 ℃ on the one hand, keeps this state 10 minutes, and this is in order to remove oxide-film from sapphire substrate 10 surfaces.Next, the temperature of pedestal 12 is reduced to 500 ℃, behind sapphire substrate 10 temperature stabilizations, injects H from injecting looped pipeline 15 again
2And N
2Admixture of gas, reacting gas ascending pipe 14 is supplied with ammonia (NH
3) and H
2The admixture of gas of gas.From injecting the H that looped pipeline 15 is supplied with
2Gas and N
2Each self-flow rate of gas is 10 liters/minute, the ammonia and the H that are supplied with from reacting gas ascending pipe 14
2The flow velocity of gas is respectively 4 liters/minute, and 1 liter/minute, it is stable at 500 ℃ to the temperature of pedestal 12 to keep this state.Following step is removed the ammonia and the H that supply with from reacting gas ascending pipe 14 for forming resilient coating
2Outside the gas, and with 2.7 * 10
-5Mole/minute flow velocity input trimethyl gallium (TMG) gas 1 minute is to generate the thick resilient coating of a 0.02um.Then stop the input of TMG gas, but the gas of keeping except that TMG continue to flow, and the temperature of pedestal 12 risen to 1020 ℃, at this moment, again with TMG gas with 5.4 * 10
-5Mole/minute flow rate 60 minutes makes the GaN epitaxial loayer grow up to the thickness with 4.0um.
In aforesaid manufacture method, injecting looped pipeline 15 supplies with H constantly on the one hand
2Gas and N
2Gas, this is to be polluted by reacting gas for fear of the inside of reacting furnace 11.Make the speed rotation of pedestal 12 by motor 17 input power on the other hand, allow crystallization-stable ground grow up with 5rpm.In supply gas, institute's gas supplied is discharged the external world by discharge pipe 18, this discharge pipe 18 is told from the pipe arrangement of excavationg pump 16.Thus, the GaN epitaxial loayer that GaN resilient coating that 0.02um is thick and 4um are thick is formed (with reference to USP5,290, No. 393 patent specifications) on sapphire substrate 10.
Fig. 2 is for being recorded in the high speed rotating disk MOCVD reacting furnace rough schematic of the another kind of mocvd method of Inst.Phys.Conf.Ser.No 141 (1994) demonstration p.119, and member in the drawings comprises MOCVD reacting furnace 20, source nitrogen distribution manifold 21, III family distribution manifold 22, adjusts needle-valve 23, screen cloth 24 and chip carrier 25.MOCVD reacting furnace 20 is with the reacting furnace difference of Fig. 1, first, all gas supplies with by the top, and III family is supplied with by III family distribution manifold 22, and source nitrogen separates with the III clan source, by source nitrogen distribution manifold 21 is supplied with.The second, all gas available adjustment needle-valve 23 controls of distribution of flowing, and see through screen cloth 24 and supply with uniform hydrogen and flow to substrate (not shown) on chip carrier 25, to generate desirable semiconductive thin film.Three, for improving the uniformity of film, chip carrier 25 is with high speed rotating (500～1000rpm).The pressure of reacting furnace 20 is preferably between 76～200 torrs (in about 10～26hPa) the scope.In addition, high-quality GaN high development temperature with 1030 ℃ on thin GaN resilient coating is grown up, this GaN resilient coating uses ammonia and TMG to get with 540 ℃ of depositions with the furnace pressure of 200 torrs (about 26hPa).
P.912, Fig. 3 shows the MBE chamber schematic diagram that utilizes MBE method growth GaN film for being recorded in J.Crystal Growth 150 (1995), in the drawings, 30 is that high vacuum MBE chamber, 31 is that substrate, 32 is that air injector, 33 is that MBE stove, 34 is that electron diffraction apparatus, 35 is substrate heater.GaN so that MBE method or similar approach are grown up gets by following manufacture method.At first, substrate 31 is sent in the high vacuum MBE chamber 30, carries out hot tempering with about 900 ℃ high temperature.Secondly, substrate 31 is placed source nitrogen gas by air injector 32, and with 400 ℃ substrate temperature by nitrogenize.Next, import the low temperature buffer layer of Ga source beam with deposition GaN, this Ga source beam is to be used to from the atom shape gallium beam of MBE stove 33 or to utilize triethyl-gallium (TEG) that air injector 32 imported or the organic metal gallium precursor of TMG and so on.At last, with the high-quality GaN layer of high temperature deposition in 600 ℃～860 ℃ scopes.The advantage of the method can utilize electron diffraction apparatus (RHHED) 34 (in-situ) parsing then and there membranous.The most desirable precursor of N is NH
3Or N
2, NH
3Mist, the optimal precursor of Ga uses TEG or TMG usually, and uses N
2And H
2Mixture as carrier gas.In addition, in the method relevant, also can utilize electronics around resonant (ECR) plasma, N with the MBE method
2Microwave activityization or NH
3The temperature hot tearing generate nitrogen radicals or atom.
Then, just be used to obtain the substrate of high-quality GaN compound film and the structure of growth is illustrated (with reference to USP5,290, No. 393 patent specifications).The GaN compound is grown up and is generally sapphire and SiC wafer with employed substrate.Fig. 4 shows a kind of section of structure that generates high-quality GaN compound layer, comprises sapphire or SiC wafer 40, low temperature Ga
xAl
1-xN resilient coating 41, Ga
xAl
1-xN compound semiconductor layer 42.At first, on sapphire or SiC substrate 40,, be Ga with chemical composition through after the suitable clean manufacture method
xAl
1-xThe low temperature buffer layer 41 of N (0≤x≤1) is converted into level and smooth single crystalline layer again in the amorphous layer of low temperature range deposition about 10nm～200nm thickness of 200 ℃～700 ℃.At last, the temperature 700 ℃～1150 ℃ of scopes deposits Ga
xAl
1-xThe compound semiconductor layer 42 of N (0≤x≤1) structure is in low temperature Ga
xAl
1-xOn the N resilient coating 41, can obtain having the compound semiconductor layer of high-quality optics and electrical characteristic.
Yet the high-quality GaN that uses above-mentioned sapphire or SiC substrate to generate but has following problem.The first, the sapphire wafer of a slice 2 inches diameter size needs 65～240 dollars, and the SiC wafer of 1cm * 1cm size also needs 200 dollars, and is very expensive.The second, the lattice between GaN and the SiC does not match to about 3.5%, and the lattice between GaN and the sapphire does not match bigger, is about 16%.Three, because sapphire is an insulator, so can not form electrode in the substrate back side, the manufacture method that forms electrode is more expensive.The 4th, the thermal coefficient of expansion of sapphire thermal coefficient of expansion and GaN differs widely, so the growth manufacture method is more complicated.The 5th, sapphire is that crow is adopted the type crystal structure, so making the problem generation that has other on the laser diode.In order to overcome these problems, existing some research reports produce, USP6 for example, 445,009, USP6,391,748, USP6,218,207, USP5,389,571, USP5,239,188 patent specifications such as grade, below only with regard to USP5,239,188 are illustrated, Fig. 5 is the semiconductor device structure profile of growth GaN compound semiconductor layer on silicon (Si) substrate, and substrate 53 is that the low resistance indices of crystallographic plane (Miller indices) are 111 cheap n-Si substrate, deposits low temperature AI N resilient coating 54 on substrate 53 with the above-mentioned method of mentioning, again with the n-GaN layer 55 of high temperature deposition of high-quality successively and p-GaN layer 56 on low temperature AI N resilient coating 54, last and make p type electrode 57 and n type electrode 58.This structure is made because of using the Si substrate to solve the problem that aforesaid base plate costs an arm and a leg and uses sapphire substrate to produce, but because of first, GaN can't successfully form monocrystalline GaN layer on the Si substrate, form the GaN crystallization post of hexagonal taper mostly, the second, GaN and silicon substrate are because of material lattice constant and the different generations that cause stress of thermal coefficient of expansion, this cumulative stress will make the GaN epitaxial loayer produce slight crack, as shown in Figure 6, make element to make, so the processing of interface just become the most important part of epi-wafer quality between GaN and the Si.
Summary of the invention
One object of the present invention is to provide a kind of manufacture method of monocrystalline III group-III nitride semiconductor element on silicon substrate that can be formed directly in.
Another object of the present invention, be to provide a kind of and alleviate between III group nitride material and silicon substrate because of lattice constant each other and stress that thermal expansion coefficient difference was produced, avoid stress to cause the manufacture method of III group-III nitride semiconductor element fracture with the stress sustained release layer.
Another purpose of the present invention is to provide a kind of semiconductor element that can directly monocrystalline III group-III nitride semiconductor element be formed at silicon substrate.
Another purpose of this creation, being to provide a kind of alleviates between III group nitride material and silicon substrate because of lattice constant each other and stress that thermal expansion coefficient difference was produced, the semiconductor element of avoiding stress to cause the III group-III nitride semiconductor to break with the stress sustained release layer.
According to above-described purpose, the invention provides a kind of III group-III nitride semiconductor element, comprising: a monocrystalline silicon substrate; One is positioned at the stress sustained release layer of silicon substrate top; And a monocrystalline III group-III nitride semiconductor component structure layer, wherein said stress sustained release layer comprises: a noncrystalline nitridation silicon layer is formed on the silicon substrate; One metallic aluminium boundary layer is formed on the noncrystalline nitridation silicon layer; One noncrystalline nitridation aluminium prefilter layer is formed on the metallic aluminium boundary layer; Reach the III group iii nitride layer that a polycrystallinity contains aluminium element, be formed at noncrystalline nitridation aluminium prefilter layer top; And described monocrystalline III group-III nitride semiconductor component structure layer is formed at the III group iii nitride layer top that polycrystallinity contains aluminium element.
According to above-mentioned conception, wherein monocrystalline silicon substrate is the low-resistance silicon substrate.
According to above-mentioned conception, wherein the noncrystalline nitridation silicon layer forms through a nitriding process (Nitridation).
According to above-mentioned conception, wherein the thickness of noncrystalline nitridation silicon layer is between 3_～500_, and its optimum thickness then is 10_～30_.
According to above-mentioned conception, wherein the thickness of metallic aluminium boundary layer is then between 5_～20_.
According to above-mentioned conception, wherein form aluminium-nitrogen bond between metallic aluminium boundary layer and the noncrystalline nitridation silicon layer.
According to above-mentioned conception, wherein the thickness of noncrystalline nitridation aluminium prefilter layer is then between 5_～500_.
According to above-mentioned conception, when wherein noncrystalline nitridation aluminium prefilter layer forms, can reset with the metallic aluminium boundary layer, make that the stress between noncrystalline nitridation aluminium prefilter layer and the silicon substrate is released slow.
According to above-mentioned conception, wherein polycrystallinity contains the resilient coating of the III group iii nitride layer of aluminium element as monocrystalline III group iii nitride layer.
According to above-mentioned conception, wherein semiconductor element is selected from following: light-emitting diode, laser diode, photodetector (Photodiode), microelectronic element structure and microcomputer electric component structure.
According to above-mentioned conception, wherein monocrystalline III group-III nitride semiconductor component structure layer also comprises: an active layer (active layer); One the one III group-III nitride conductive layer is between active layer and stress sustained release layer; And one the 2nd III group-III nitride conductive layer, being positioned on the active layer, its conduction type and an III group-III nitride conductive layer are different.
According to above-mentioned conception, wherein monocrystalline III group-III nitride semiconductor component structure layer also comprises one first electrode, is positioned on the 2nd III group-III nitride conductive layer.
According to above-mentioned conception, wherein first electrode gets by etching part the 2nd III group-III nitride conductive layer.
According to above-mentioned conception, wherein monocrystalline III group-III nitride semiconductor component structure layer also comprises one first electrode, is positioned at the below of silicon substrate.
According to above-mentioned conception, wherein monocrystalline III group-III nitride semiconductor component structure layer also comprises a transparency electrode, is positioned on the III group-III nitride conductive layer.
According to above-mentioned conception, wherein monocrystalline III group-III nitride semiconductor component structure layer also comprises one second electrode, is positioned on the transparency electrode.
According to above-mentioned conception, wherein the material of electrode is selected from following person: Ti/Al and Ni/Au.
According to above-mentioned conception, wherein the structure of active layer is selected from following person: homostyructure (homostructure), heterostructure (heterostructurer), double-heterostructure (double-heterostructurer), single quantum (single-quantum-well) and multiple quantum trap structure (multiple-quantum-well).
According to above-described purpose, the invention provides a kind of III group-III nitride semiconductor manufacturing method, comprising: form a monocrystalline silicon substrate; Form a noncrystalline nitridation silicon layer on silicon substrate; Form a metallic aluminium boundary layer on the noncrystalline nitridation silicon layer; Form a noncrystalline nitridation aluminium prefilter layer on the metallic aluminium boundary layer; Form a polycrystallinity and contain the III group iii nitride layer of aluminium element in noncrystalline nitridation aluminium prefilter layer top; And formation one monocrystalline III group-III nitride semiconductor component structure layer contains the III group iii nitride layer top of aluminium element in polycrystallinity.
According to above-mentioned conception, wherein monocrystalline silicon substrate is the low-resistance silicon substrate.
According to above-mentioned conception, wherein the noncrystalline nitridation silicon layer through a nitriding process (Nitridation) to form.
According to above-mentioned conception, wherein the thickness of noncrystalline nitridation silicon layer is between 3_～500_, and its optimum thickness then is 10_～30_.
According to above-mentioned conception, wherein the thickness of metallic aluminium boundary layer is then between 5_～20_.
According to above-mentioned conception, wherein form aluminium-nitrogen bond between metallic aluminium boundary layer and the noncrystalline nitridation silicon layer.
According to above-mentioned conception, wherein the thickness of noncrystalline nitridation aluminium prefilter layer is then between 5_～500_.
According to above-mentioned conception, when wherein noncrystalline nitridation aluminium prefilter layer forms, can reset with the metallic aluminium boundary layer, make that the stress between noncrystalline nitridation aluminium prefilter layer and the silicon substrate is released slow.
According to above-mentioned conception, wherein polycrystallinity contains the resilient coating of the III group iii nitride layer of aluminium element as monocrystalline III group iii nitride layer.
According to above-mentioned conception, wherein semiconductor element is selected from following: light-emitting diode, laser diode, photodetector (Photodiode), microelectronic element structure and microcomputer electric component structure.
According to above-mentioned conception, the step that wherein forms this monocrystalline III group-III nitride semiconductor component structure layer also comprises: form an active layer (active layer); The III group-III nitride conductive layer of formation one between active layer and stress sustained release layer; And forming the 2nd an III group-III nitride conductive layer that is positioned on the active layer, its conduction type and an III group-III nitride conductive layer are different.
According to above-mentioned conception, the step that wherein forms monocrystalline III group-III nitride semiconductor component structure layer comprises that also formation is positioned at one first electrode of the 2nd III group-III nitride conductive layer top.
According to above-mentioned conception, wherein first electrode gets by etching part the 2nd III group-III nitride conductive layer.
According to above-mentioned conception, the step that wherein forms monocrystalline III group-III nitride semiconductor component structure layer comprises that also formation is positioned at one first electrode of silicon substrate below.
According to above-mentioned conception, the step that wherein forms monocrystalline III group-III nitride semiconductor component structure layer also comprises a transparency electrode that is positioned at III group-III nitride conductive layer top.
According to above-mentioned conception, the step that wherein forms monocrystalline III group-III nitride semiconductor component structure layer also comprises one second electrode that is positioned at the transparency electrode top.
According to above-mentioned conception, wherein the material of electrode is selected from following person: Ti/Al and Ni/Au.
According to above-mentioned conception, wherein the structure of active layer is selected from following person: homostyructure (homostructure), heterostructure (heterostructurer), double-heterostructure (double-heterostructurer), single quantum (single-quantum-well) and multiple quantum trap structure (multiple-quantum-well).
Description of drawings
What Fig. 1 illustrated is a kind of MOCVD device schematic diagram of the III of manufacturing group-III nitride semiconductor element;
What Fig. 2 illustrated is the MOCVD device schematic diagram of the another kind of III of manufacturing group-III nitride semiconductor element;
What Fig. 3 illustrated is a kind of MBE device schematic diagram of the III of manufacturing group-III nitride semiconductor element;
What Fig. 4 illustrated is a kind of section of structure of existing GaN compound layer;
What Fig. 5 illustrated is a kind of section of structure that has growth GaN compound semiconductor layer on silicon (Si) substrate now;
Fig. 6 illustrates is because of the material lattice constant of GaN and silicon substrate and thermal coefficient of expansion is different causes stress to produce and accumulation, and makes the GaN epitaxial loayer produce slight crack;
Fig. 7 illustrates is section of structure according to the semiconductor device of first embodiment of the invention;
Fig. 8 illustrates is section of structure according to the semiconductor device of second embodiment of the invention; And
Fig. 9 illustrates is section of structure according to the semiconductor device of third embodiment of the invention.
The simple symbol explanation
10 sapphire substrates
11 reacting furnaces
12 pedestals
13 heaters
14 reacting gas ascending pipes
15 inject looped pipeline
16 excavationg pumps
17 motors
18 discharge pipes
20 MOCVD reacting furnaces
21 source nitrogen distribution manifold
22 III family distribution manifold
23 adjust needle-valve
24 screen clothes
25 chip carriers
High vacuum MBE chambers 30
31 substrates
32 air injectors
33 MBE stoves
34 electron diffraction apparatus
35 substrate heaters
40 sapphires or SiC wafer
41 low temperature Ga
xAl
1-xThe N resilient coating
42 Ga
xAl
1-xThe N compound semiconductor layer
53 Si substrates
54 AlN resilient coatings
55 n-GaN layers
56 p-GaN layers
57 p type electrodes
58 n type electrodes
71 silicon (Si) substrate
72 stress sustained release layers
721 noncrystalline nitridation silicon layers
722 metallic aluminium boundary layers
723 noncrystalline nitridation aluminium prefilter layers
724 polycrystallinities contain the III group iii nitride layer of aluminium element
73 monocrystalline III group iii nitride layers
80 light emitting diode constructions
81 silicon substrates
82 stress sustained release layers
83 n type III group-III nitride conductive layers
84 active layers
85 p type III group-III nitride conductive layers
86 transparency electrodes
87 p type electrodes
88 n type electrodes
Embodiment
Some embodiments of the present invention can be described in detail as follows.Yet except describing in detail, the present invention can also be widely implements at other embodiment, and scope of the present invention do not limited, its with after claim be as the criterion.
In order to overcome the problem between existing GaN layer and the Si substrate.The present invention is at the aforementioned stress sustained release layer of being made up of a plurality of materials with different properties layers that adds in the two, as shown in Figure 7, is the section of structure according to the semiconductor device of first embodiment of the invention.On silicon (Si) substrate 71, form in regular turn by noncrystalline nitridation silicon layer 721, metallic aluminium boundary layer 722, noncrystalline nitridation aluminium prefilter layer 723 and polycrystallinity and contain the stress sustained release layer 72 that the III group iii nitride layer 724 of aluminium element is constituted, on stress sustained release layer 72, form monocrystalline III group iii nitride layer 73 then.This monocrystalline III group iii nitride layer 73 constitutes the part of desired component structure (not shown), disposes other monocrystalline III group iii nitride layer and this component construction corresponding electrode (not shown) on this monocrystalline III group iii nitride layer 73 in order to form the said elements structure.
At first being formed on the silicon substrate 71 is amorphism silicon nitride layer 721, and this layer can form via nitriding process (Nitridation) on Si substrate 71, promptly by N in reacting furnace
2Or NH
3Amount and temperature control its thickness and uniformity, also can on silicon substrate 71, form in addition by adding silicon precursors and nitrogen precursors, the preferred thickness of this noncrystalline nitridation silicon layer 721 is between 3_～500_, optimum thickness then is between 10_～30_.Secondly, metallic aluminium boundary layer 722 is formed on the noncrystalline nitridation silicon layer 721, the interface before the purpose of this metallic aluminium boundary layer 722 is to guide the III group nitride material to form, and its preferred thickness is between 5_～20_.When metallic aluminium boundary layer 722 forms, also between itself and noncrystalline nitridation silicon layer 721, form aluminium-nitrogen bond, so that the storehouse of noncrystalline nitridation aluminium subsequently.Next be that amorphism aluminium nitride prefilter layer 723 is grown up on metallic aluminium boundary layer 722, can reset with metallic aluminium in this layer formation, and it is slow to make stress between aluminium nitride and the silicon substrate release, the preferred thickness of this layer is between 5_～500_.Be that the III group iii nitride layer 724 that polycrystallinity contains aluminium element is formed on the noncrystalline nitridation aluminium prefilter layer 723 at last, the purpose of this layer is the conduct resilient coating of monocrystalline III group iii nitride layer 73 subsequently, grow up in order to monocrystalline III group iii nitride layer 73, and promote its crystallinity.
The present invention forms the element that comprises the III group nitride material on silicon substrate, can be light-emitting diode, laser diode, photodetector (Photodiode), microelectronic element structure and microcomputer electric component structure etc., it can be made up of the material of AlInGaN class.The light emitting diode construction 80 that forms on silicon substrate 81 and stress sustained release layer 82 for example shown in Figure 8 comprises the homostyructure (homostructure) of III group-III nitride (as the InGaN material), heterostructure (heterostructurer), double-heterostructure (double-heterostructurer), the active layer of single quantum (single-quantum-well) or multiple quantum trap structure (multiple-quantum-well) (active layer) 84, III group-III nitride (AlInGaN material) conductive layer 85 that connects different conduction-types up and down, 83, expose light-emitting diode (light emitting diode with the etching manufacture method again, LED) the n type conductive layer 83 of lower floor in the structure 80, then respectively at n type and p type conductive layer 83,85 plate the electrode 87 of Ti/Al or Ni/Au, 88 and one transparency electrode 86 between p type conductive layer 85 and p type electrode 87 uses forming the LED structure.In addition, if we select low-resistance silicon substrate manufacture III group-III nitride semiconductor light-emitting diode at the beginning for use, then electrode can be produced on reverse position, as shown in Figure 9.
Even the present invention describes by enumerating several preferred embodiments, but the present invention is not limited to the embodiment that enumerated.Though the specific embodiment of before enumerating and narrating, apparently, other does not break away under the disclosed spirit, and the equivalence of being finished changes or modifies, and all should be included in the claim of the present invention.In addition, all other do not break away under the disclosed spirit, and other that finished is similar and approximate to be changed or modification, also includes in claim of the present invention.Should explain scope of the present invention with the widest definition simultaneously, use and comprise all modifications and similar structures.
Claims (10)
1. III group-III nitride semiconductor element comprises:
One monocrystalline silicon substrate;
One stress sustained release layer is positioned at this silicon substrate top; And
One monocrystalline III group-III nitride semiconductor component structure layer,
Wherein, described stress sustained release layer comprises:
One noncrystalline nitridation silicon layer is formed on this silicon substrate;
One metallic aluminium boundary layer is formed on this noncrystalline nitridation silicon layer;
One noncrystalline nitridation aluminium prefilter layer is formed on this metallic aluminium boundary layer; And
One polycrystallinity contains the III group iii nitride layer of aluminium element, is formed at this noncrystalline nitridation aluminium prefilter layer top; And
Described monocrystalline III group-III nitride semiconductor component structure layer is formed at the III group iii nitride layer top that this polycrystallinity contains aluminium element.
2. III group-III nitride semiconductor element as claimed in claim 1, wherein this monocrystalline silicon substrate is the low-resistance silicon substrate.
3. III group-III nitride semiconductor element as claimed in claim 1, wherein the thickness of this noncrystalline nitridation silicon layer is between 3_～500_.
4. III group-III nitride semiconductor element as claimed in claim 1, wherein the thickness of this metallic aluminium boundary layer is then between 5_～20_.
5. III group-III nitride semiconductor element as claimed in claim 1 wherein forms aluminium-nitrogen bond between this metallic aluminium boundary layer and this noncrystalline nitridation silicon layer.
6. III group-III nitride semiconductor element as claimed in claim 1, wherein this polycrystallinity contains the resilient coating of the III group iii nitride layer of aluminium element as this monocrystalline III group iii nitride layer.
7. III group-III nitride semiconductor element as claimed in claim 1, wherein this monocrystalline III group-III nitride semiconductor component structure layer also comprises:
One active layer;
One the one III group-III nitride conductive layer is between this active layer and this stress sustained release layer; And
One the 2nd III group-III nitride conductive layer is positioned on this active layer, and its conduction type and an III group-III nitride conductive layer are different.
8. III group-III nitride semiconductor manufacturing method comprises:
Form a monocrystalline silicon substrate;
Form a noncrystalline nitridation silicon layer on this silicon substrate;
Form a metallic aluminium boundary layer on this noncrystalline nitridation silicon layer;
Form a noncrystalline nitridation aluminium prefilter layer on this metallic aluminium boundary layer;
Form a polycrystallinity and contain the III group iii nitride layer of aluminium element in this noncrystalline nitridation aluminium prefilter layer top; And
Form a monocrystalline III group-III nitride semiconductor component structure layer contains aluminium element in this polycrystallinity III group iii nitride layer top.
9. III group-III nitride semiconductor manufacturing method as claimed in claim 8, wherein this noncrystalline nitridation silicon layer through a nitriding process to form.
10. III group-III nitride semiconductor manufacturing method as claimed in claim 8, the step that wherein forms this monocrystalline III group-III nitride semiconductor component structure layer also comprises:
Form an active layer;
The III group-III nitride conductive layer of formation one between this active layer and this stress sustained release layer; And
Form the 2nd an III group-III nitride conductive layer that is positioned on this active layer, its conduction type and an III group-III nitride conductive layer are different.
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| US8946775B2 (en) | 2012-08-22 | 2015-02-03 | Industrial Technology Research Institute | Nitride semiconductor structure |
| CN102956771A (en) * | 2012-10-26 | 2013-03-06 | 江苏威纳德照明科技有限公司 | Luminescent device comprising SiC combined substrate |
| CN104124315B (en) * | 2013-04-28 | 2018-11-30 | 晶元光电股份有限公司 | Photoelectric cell |
| CN105742424B (en) * | 2016-03-15 | 2018-08-10 | 河源市众拓光电科技有限公司 | A kind of GaN film and preparation method thereof of the epitaxial growth on metal Al substrates |
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| US20040119063A1 (en) * | 2002-12-04 | 2004-06-24 | Emcore Corporation | Gallium nitride-based devices and manufacturing process |
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| CN1148734A (en) * | 1995-09-25 | 1997-04-30 | 三菱电机株式会社 | Semiconductor light emission device and production method thereof |
| US20030042505A1 (en) * | 1999-03-05 | 2003-03-06 | Toyoda Gosei Co., Ltd. | Group III nitride compound semiconductor device |
| WO2003103062A1 (en) * | 2002-06-04 | 2003-12-11 | Nitride Semiconductors Co.,Ltd. | Gallium nitride compound semiconductor device and manufacturing method |
| US20040119063A1 (en) * | 2002-12-04 | 2004-06-24 | Emcore Corporation | Gallium nitride-based devices and manufacturing process |
| JP2004214500A (en) * | 2003-01-07 | 2004-07-29 | Nichia Chem Ind Ltd | Nitride semiconductor growth substrate and nitride semiconductor device using same |
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