JPH0529653A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0529653A
JPH0529653A JP3179198A JP17919891A JPH0529653A JP H0529653 A JPH0529653 A JP H0529653A JP 3179198 A JP3179198 A JP 3179198A JP 17919891 A JP17919891 A JP 17919891A JP H0529653 A JPH0529653 A JP H0529653A
Authority
JP
Japan
Prior art keywords
substrate
layer
lattice
organometallic
led
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3179198A
Other languages
Japanese (ja)
Inventor
Gokou Hatano
吾紅 波多野
Toshihide Izumitani
敏英 泉谷
Yasuo Oba
康夫 大場
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP3179198A priority Critical patent/JPH0529653A/en
Publication of JPH0529653A publication Critical patent/JPH0529653A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Led Device Packages (AREA)
  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To decrease the dislocation or distortion due to lattice mismatch by growing a GaXAl1-X-YINYN layer of a sphalerite structure on an MgF2 substrate. CONSTITUTION:An n-Ga0.7Al0.3N layer 72 is grown on an MgF2 substrate 71, and a P-Ga0.7Al0.3N layer is grown on the layer 72. This crystal growth is performed by heating the substrate. After the substrate temperature is decreased, gas is switched from H2 to NH3, and crystal growth is continued using an organometallic Ca compound, such as Ca(CH3)3. Simultaneously, aluminum and indium are introduced using an organometallic Al compound, such as Al(CH3)3, and an organometallic In compound, such as In(CH3)3. The LED thus fabricated involves a lattice mismatch and a deviation of surface orientation within + or -5%. Therefore, dislocation or distortion due to lattice mismatch is considerably decreased.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、短波長域の発光素子
(以下LEDと略称)や、半導体レーザ等の半導体素子
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a light emitting device (hereinafter abbreviated as LED) in a short wavelength region and a semiconductor laser.

【0002】[0002]

【従来の技術】窒素を含むIII−V族化合物半導体の一
つであるGaNはバンドギャップが3.4eVと大き
く、また直接遷移型であり、短波長発光素子用材料とし
て期待されているが、短波長発光素子を構成するのに格
子整合する良質な基板が無いことが最大の問題であっ
た。そこで、格子不整合の影響を低減するために様々な
方法が試みられてきた。結晶成長法として気相エピタキ
シャル成長法(VPE法)が用いられる場合には、比較
的成長速度が速いので、100μm程度の厚膜成長をさ
せることで基板との界面の歪みを緩和することが試みら
れたが、ひび割れを生ずるために、良質な結晶を成長さ
せることはできなかった。また、有機金属気相成長法
(MOCVD法)の場合には成長速度が遅く、厚膜成長
により欠陥を緩和することは不可能であった。便宜上、
格子不整合が15%程度と大きいサファイア基板上に成
長することが多いが、良質な結晶が得られず、バックグ
ラウンドのキャリア濃度が1019cm-3以上と非常に高
い値を示してしまう。そこで、サファイア基板上に成長
する際には、一旦アモルファス状のAlNを成長してか
らGaNを成長させたり、あらかじめ基板表面をNH3
により窒化してから成長を行うといった方法が採られ
た。AlNバッファ層を成長させることにより、バッフ
ァ層を用いない場合に比べ、アンドープの際のキャリア
濃度を1017cm-3程度まで低下させることができてい
る。しかし、実用的な素子の実現のためには末だ不十分
な値であり、電子線照射を行なうことによりp型層を得
たという報告はあるが極めて高抵抗であり、また、基板
に絶縁体であるサファイアを用いているため電極作成プ
ロセス、適用範囲などの点で限界がある。
2. Description of the Related Art GaN, which is one of III-V group compound semiconductors containing nitrogen, has a large band gap of 3.4 eV and is a direct transition type, and is expected as a material for a short wavelength light emitting device. The biggest problem is that there is no good substrate that is lattice-matched to form a short wavelength light emitting device. Therefore, various methods have been tried to reduce the influence of lattice mismatch. When the vapor phase epitaxial growth method (VPE method) is used as the crystal growth method, since the growth rate is relatively high, it is attempted to relax the strain at the interface with the substrate by growing a thick film of about 100 μm. However, it was not possible to grow a good quality crystal due to cracking. Further, in the case of the metal organic chemical vapor deposition method (MOCVD method), the growth rate was slow, and it was impossible to alleviate defects by thick film growth. For convenience,
Although it often grows on a sapphire substrate having a large lattice mismatch of about 15%, a good quality crystal cannot be obtained, and the background carrier concentration shows a very high value of 10 19 cm -3 or more. Therefore, when growing on a sapphire substrate, amorphous AlN is first grown and then GaN is grown, or the substrate surface is preliminarily NH 3
Therefore, a method of nitriding and then growing is adopted. By growing the AlN buffer layer, the carrier concentration during undoping can be reduced to about 10 17 cm −3 as compared with the case where the buffer layer is not used. However, the value is still insufficient for realization of a practical device, and although it is reported that a p-type layer was obtained by performing electron beam irradiation, it has a very high resistance, and it has an insulating property on the substrate. Since sapphire, which is the body, is used, there are limits in terms of the electrode manufacturing process and the applicable range.

【0003】[0003]

【発明が解決しようとする課題】叙上の如く、GaNを
成長形成させるにあたって、これと格子整合をする基板
がないために格子欠陥が生じること、また、伝導型の制
御が不十分であること等の問題がある。
As described above, when GaN is grown and formed, a lattice defect occurs due to the absence of a substrate that is lattice-matched with GaN, and the control of the conductivity type is insufficient. There is a problem such as.

【0004】本発明は低欠陥で伝導型の制御が可能なG
aNを成長することにより、高輝度短波長発光素子を得
ることを目的とする。
The present invention is a G having a low defect and controllable conductivity type.
The purpose is to obtain a high brightness short wavelength light emitting device by growing aN.

【0005】[0005]

【課題を解決するための手段】完全に格子整合させるた
めには格子定数を合わせるだけではなく格子型が等しい
ことが重要であると考えられていた。しかし、本発明者
らの研究によれば、格子整合させるためには格子型が同
一である必要はなく、格子間の距離が同一であることが
重要であることが判明した。また、成長層は基板による
影響を受け、本来六方晶の結晶であっても、立方晶を採
ることによって基板と格子整合する場合には立方晶を採
ることが判明した。
[Means for Solving the Problems] In order to achieve perfect lattice matching, it was considered important not only to match the lattice constants but also to have the same lattice type. However, according to the research conducted by the present inventors, it has been found that the lattice types do not have to be the same in order to perform the lattice matching, and it is important that the distances between the lattices are the same. Further, it was found that the growth layer is affected by the substrate, and even if the crystal is originally a hexagonal crystal, the cubic crystal is adopted when the cubic crystal is lattice-matched with the substrate.

【0006】まず、六方晶であるGaNを立方晶上、あ
るいは立方晶を適当な方向にカットした一例のMnO基
板の上に成長することにより格子整合させることが可能
になる例について以下に説明する。MnOは、立方晶系
NaCl構造で格子定数が4.445である。(11
1)上での2次元格子の格子間距離は3.143であ
り、これはGaNの格子定数である3.16と非常に近
い。そこで、MnO基板の(111)面上にGaNを成
長させることにより、基板と成長層との間の格子不整合
の影響を緩和することが可能となる。さらに、AlNは
格子定数が3.104であるので、GaNにAlを添加
することによって格子定数を小さくし、MnO基板の
(111)面に格子整合させることも可能になる。格子
整合が可能になれば、格子不整合により発生する転位
や、歪みが飛躍的に減少し低欠陥のGaN結晶の成長が
可能となる。低欠陥結晶の成長が可能になると欠陥まわ
りに集中し有効に働かなかったドーパントの活性化率を
高め、ドーピングを施すことにより低抵抗のp型結晶を
得ることが可能となる。また、AlNはGaNより格子
定数は小さくバンドギャップは広く、InNはGaNよ
り格子定数は大きくバンドギャップは狭いので、GaN
中にAlとInを適量添加することにより、格子定数を
保ったままバンドキャップを変化させることが可能にな
り、所望の発光波長の素子を得ることが可能になる。さ
らに、従来使われていたサファイア基板が絶縁体であっ
たために問題であった電極作製プロセスでも半導体であ
るMnOは有効である。
First, an example in which lattice matching can be achieved by growing hexagonal GaN on a cubic crystal or on an example MnO substrate obtained by cutting the cubic crystal in an appropriate direction will be described below. . MnO has a cubic NaCl structure and a lattice constant of 4.445. (11
1) The interstitial distance of the above two-dimensional lattice is 3.143, which is very close to the lattice constant of GaN, 3.16. Therefore, by growing GaN on the (111) plane of the MnO substrate, it becomes possible to mitigate the effect of lattice mismatch between the substrate and the growth layer. Furthermore, since AlN has a lattice constant of 3.104, it is possible to reduce the lattice constant by adding Al to GaN and to make the lattice match with the (111) plane of the MnO substrate. If the lattice matching becomes possible, dislocations and strains caused by the lattice mismatch are drastically reduced, and it becomes possible to grow a low-defect GaN crystal. When low-defect crystals can be grown, it becomes possible to obtain a low-resistance p-type crystal by increasing the activation rate of the dopant that concentrates around the defects and does not work effectively, and by performing doping. Further, AlN has a smaller lattice constant and a wider bandgap than GaN, and InN has a larger lattice constant and a narrower bandgap than GaN.
By adding an appropriate amount of Al and In, the band cap can be changed while maintaining the lattice constant, and an element having a desired emission wavelength can be obtained. Further, MnO, which is a semiconductor, is effective in the electrode manufacturing process, which has been a problem because the sapphire substrate used conventionally is an insulator.

【0007】そこで、本来は六方晶であるGaNを、立
方晶を採ることによって基板と格子整合するような正方
晶であるMgF2の上、またはこれを適当な方向にカッ
トした面に成長させることにより安定に成長させること
が可能になる。
Therefore, GaN, which is originally a hexagonal crystal, is grown on tetragonal MgF 2 which is lattice-matched with the substrate by adopting a cubic crystal, or on a surface obtained by cutting this in an appropriate direction. This enables stable growth.

【0008】格子整合が可能になれば、格子不整合によ
り発生する転位や、歪みが飛躍的に減少し低欠陥のGa
N結晶の成長が可能となる。低欠陥結晶に成長が可能に
なると欠陥まわりに集中し有効に働かなかったドーパン
トの活性化率を高め、ドーピングをすることにより低抵
抗のp型結晶を得ることが可能となる。また、AlNは
GaNより格子定数は小さくバンドギャップは広く、I
nNはGaNより格子定数は大きくバンドギャップは狭
いので、GaN中にAlとInを適量添加することによ
り、格子定数を保ったままバンドギャップを変化させる
ことが可能になり、所望の発光波長の素子を得ることが
可能になる。また、MgF2は高品質のバルクが安定し
て得られるため比較的安価であり、組成のばらつきもな
い。さらに、成長前の基板表面をいかにして清浄化する
かが通常問題となるが、この点に関しても、Mg−F間
の結合が強いためMg、Fが表面からそれぞれ単独に蒸
発して組成の変化を生ずることはなく、熱処理すること
により清浄な表面を得ることができる。
If the lattice matching becomes possible, dislocations and strains caused by the lattice mismatch are drastically reduced, and Ga having a low defect is produced.
It becomes possible to grow N crystal. When growth is possible in a low-defect crystal, it becomes possible to obtain a p-type crystal having a low resistance by increasing the activation rate of the dopant that concentrates around the defect and does not work effectively, and by doping. In addition, AlN has a smaller lattice constant and a wider bandgap than GaN.
Since nN has a larger lattice constant and a narrower bandgap than GaN, by adding an appropriate amount of Al and In to GaN, it becomes possible to change the bandgap while maintaining the lattice constant, and an element having a desired emission wavelength can be obtained. It will be possible to obtain. Further, since MgF 2 can stably obtain a high-quality bulk, it is relatively inexpensive and has no compositional variation. Further, how to clean the surface of the substrate before growth is usually a problem. In this respect as well, since the bond between Mg and F is strong, Mg and F evaporate independently from the surface, respectively. A clean surface can be obtained by heat treatment without any change.

【0009】[0009]

【作用】例えば閃亜鉛鉱型のGaxAl1-x-yInyN層
をMgF2または立方晶系NaCl構造結晶の基板上に
成長することにより、格子不整合により発生する転位や
歪みが飛躍的に減少し、低欠陥のGaxAl1-x-yIny
N結晶に成長が可能となり、高輝度短波長発光素子の実
現が可能となる。
By, for example, growing a zinc blende type Ga x Al 1-xy In y N layer on a substrate of MgF 2 or a cubic NaCl structure crystal, dislocations and strains caused by lattice mismatch are dramatically increased. And low defect Ga x Al 1-xy In y
It becomes possible to grow into N crystal, and it becomes possible to realize a high brightness and short wavelength light emitting device.

【0010】[0010]

【実施例】以下、本発明の実施例を図面を参照して説明
する。
Embodiments of the present invention will be described below with reference to the drawings.

【0011】(実施例1)まず、半導体素子の気相成長
層を形成する基板にMnOを用いる実施例につき説明す
る。
Example 1 First, an example in which MnO is used as a substrate for forming a vapor phase growth layer of a semiconductor device will be described.

【0012】図1は、本発明の一実施例であるLEDの
概略の構成を示す断面図である。MnO基板11上にn
−Ga07Al03N層12(アンドープあるいはSiドー
プ、1×1016〜1×1019cm-3たとえば1×1017
cm-3)が3μm厚に形成され、その上にp−Ga07
03N層13(Mgドープ、1×1016〜1×1019
-3たとえば1×1017cm-3)が2μm厚に形成され
ている。なお、図中の14、15はいずれも金属電極で
ある。
FIG. 1 is a sectional view showing a schematic structure of an LED which is an embodiment of the present invention. N on the MnO substrate 11
—Ga 07 Al 03 N layer 12 (undoped or Si-doped, 1 × 10 16 to 1 × 10 19 cm −3, for example, 1 × 10 17
cm -3 ) is formed in a thickness of 3 μm, and p-Ga 07 A is formed thereon.
l 03 N layer 13 (Mg-doped, 1 × 10 16 to 1 × 10 19 c
m −3, for example, 1 × 10 17 cm −3 ) is formed in a thickness of 2 μm. In addition, both 14 and 15 in the figure are metal electrodes.

【0013】次に、結晶成長方法について説明する。Next, the crystal growth method will be described.

【0014】図2は、本発明の実施例にLEDの製造に
使用した成長装置についてその概略の構成を示す断面図
である。図21は石英製の反応管(反応炉)であり、こ
の反応管21内にはガス導入口22から原料混合ガスが
導入される。そして、反応管21内のガスはガス排気口
23から排気されるものとなっている。反応管21内に
は、カーボン製のサセプタ24が配置されており、試料
基板11はこのサセプタ24上に載置される。またサセ
プタ24は高周波コイル25により誘導加熱されるもの
となっている。なお、基板11の温度は図示の熱電対2
6によって測定され、別の装置(図示省略)によりコン
トロールされる。
FIG. 2 is a sectional view showing a schematic structure of a growth apparatus used for manufacturing an LED in the embodiment of the present invention. FIG. 21 shows a reaction tube (reaction furnace) made of quartz, and a raw material mixed gas is introduced into the reaction tube 21 through a gas introduction port 22. The gas in the reaction tube 21 is exhausted from the gas exhaust port 23. A susceptor 24 made of carbon is arranged in the reaction tube 21, and the sample substrate 11 is placed on the susceptor 24. The susceptor 24 is induction heated by the high frequency coil 25. The temperature of the substrate 11 is the same as that of the illustrated thermocouple 2.
6 and is controlled by another device (not shown).

【0015】まず、MnO基板11を前記サセプタ24
上に載置する。ガス導入管22から高純度水素を毎分
2.5l導入し、反応管21内の大気を置換する。次い
で、ガス排気口23を真空ポンプ(ロータリーポンプ)
に接続し、反応管21内を減圧し、内部の圧力を20〜
300torrの範囲に設定する。その後ガス導入口2
2からH2ガスを導入し、高周波コイル25によりサセ
プタ及び基板11を加熱し基板温度500〜1000℃
で30分間保持して基板の清浄化を行う。
First, the MnO substrate 11 is attached to the susceptor 24.
Place on top. 2.5 l of high-purity hydrogen is introduced from the gas introduction pipe 22 per minute to replace the atmosphere in the reaction pipe 21. Next, the gas exhaust port 23 is connected to a vacuum pump (rotary pump).
The inside of the reaction tube 21 is depressurized and the internal pressure is reduced to 20 to
Set in the range of 300 torr. Then gas inlet 2
H 2 gas is introduced from 2 and the susceptor and the substrate 11 are heated by the high frequency coil 25, and the substrate temperature is 500 to 1000 ° C.
Hold for 30 minutes to clean the substrate.

【0016】次いで、基板温度を450〜900℃に低
下させた後、H2ガスをNH3ガス、N24ガスあるいは
Nを含む有機化合物たとえば(CH3222に切り替
えると共に、有機金属Ga化合物たとえばGa(C
33あるいはGa(C253を導入して成長を行
う。同時に有機金属Al化合物たとえばAl(CH33
あるいはAl(C253、有機金属In化合物たとえ
ばIn(CH33あるいはIn(C253を導入して
Al、Inの添加を行う。ドーピングを行う場合にはド
ーピング用原料も同時に導入する。ドーピング用原料と
してはn型用としてSi水素化物たとえばSiH4ある
いは有機金属Si化合物たとえばSi(CH34、Se
水素化物たとえばH2Seあるいは有機金属Se化合物
Se(CH32、p型用として有機金属Mg化合物たと
えばCp2Mgあるいは有機金属Zn化合物たとえばZ
n(CH32等を使用する。
Next, after lowering the substrate temperature to 450 to 900 ° C., the H 2 gas is switched to NH 3 gas, N 2 H 4 gas or an organic compound containing N, for example, (CH 3 ) 2 N 2 H 2. , An organometallic Ga compound such as Ga (C
Growth is carried out by introducing H 3 ) 3 or Ga (C 2 H 5 ) 3 . At the same time, organometallic Al compounds such as Al (CH 3 ) 3
Alternatively, Al (C 2 H 5 ) 3 and an organometallic In compound such as In (CH 3 ) 3 or In (C 2 H 5 ) 3 are introduced to add Al and In. When doping is performed, a doping raw material is also introduced at the same time. As a doping raw material, a Si hydride such as SiH 4 or an organometallic Si compound such as Si (CH 3 ) 4 or Se for n-type is used.
Hydrides such as H 2 Se or organometallic Se compounds Se (CH 3 ) 2 , for p-type organometallic Mg compounds such as Cp 2 Mg or organometallic Zn compounds such as Z
n (CH 3 ) 2 or the like is used.

【0017】具体的には、第1図に示されるLED製造
には、原料としてNH3を1×10- 3mol/min、
Ga(C253を1×10-5mol/min、Al
(CH33を1×10-6mol/min導入して成長を
行った。基板温度は1150℃、圧力220torr、
原料ガスの総流量は1l/minとした。ドーパントに
は、n型にSi、p型にMgを用いた。Siはシラン
(SiH4)を、Mgはシクロペンタジエニルマグネシ
ウム(Cp2Mg)をそれぞれ原料ガスに混入すること
によりドープした。
[0017] Specifically, in the LED manufacturing shown in FIG. 1, NH 3 to 1 × 10 as a starting material - 3 mol / min,
Ga (C 2 H 5 ) 3 at 1 × 10 −5 mol / min, Al
(CH 3 ) 3 was introduced at 1 × 10 −6 mol / min for growth. Substrate temperature is 1150 ° C, pressure is 220 torr,
The total flow rate of the raw material gas was set to 1 l / min. As the dopant, Si was used for the n-type and Mg was used for the p-type. Si was doped with silane (SiH 4 ) and Mg was doped by mixing cyclopentadienyl magnesium (Cp 2 Mg) into the source gas.

【0018】(実施例2)図3はこの実施例によるLE
Dチップ31をレンズを兼ねた樹脂ケース32に埋めこ
んだ状態を示す。33は内部リード、34は外部リード
である。
(Embodiment 2) FIG. 3 shows an LE according to this embodiment.
A state in which the D chip 31 is embedded in a resin case 32 that also serves as a lens is shown. Reference numeral 33 is an internal lead, and 34 is an external lead.

【0019】この実施例によるLEDは、樹脂ケースに
埋め込んで約5mcdの青色発光が確認された。この効
果は基板との格子整合のずれが±0.5%の範囲で顕著
な変化は認められなかった。また、(111)基板の面
方位のずれが±0.5%の範囲で顕著な変化は認められ
なかった。
The LED according to this example was embedded in a resin case and a blue light emission of about 5 mcd was confirmed. No significant change was observed in this effect within the range of ± 0.5% of the lattice mismatch with the substrate. In addition, no significant change was observed within the range of ± 0.5% deviation of the plane orientation of the (111) substrate.

【0020】なお、本実施例においては、n型基板を用
いた例について示したが、p型基板を用いても同様に実
施できる。また、GaAlNにInを添加して格子定数
を保ったままバンドギャップを変化させることも可能で
ある。
In this embodiment, the example using the n-type substrate is shown, but the same operation can be performed using the p-type substrate. It is also possible to add In to GaAlN to change the band gap while maintaining the lattice constant.

【0021】(実施例3)図4は本発明の他の実施例で
あるMIS型のLEDの概略の構成を示す図である。M
nO基板11上にn−Ga07Al03N層42(アンドー
プあるいはSiドープ、1×1016〜1×1019cm-3
たとえば1×1017cm-3)が3μm形成され、その一
部に高抵抗部43が形成されている。図中44、45は
金属電極である。
(Embodiment 3) FIG. 4 is a diagram showing a schematic structure of an MIS type LED which is another embodiment of the present invention. M
The n-Ga 07 Al 03 N layer 42 (undoped or Si-doped, 1 × 10 16 to 1 × 10 19 cm −3) is formed on the nO substrate 11.
For example, 1 × 10 17 cm −3 ) is formed in a thickness of 3 μm, and the high resistance portion 43 is formed in a part thereof. In the drawing, 44 and 45 are metal electrodes.

【0022】(実施例4)図5は本発明の他の実施例で
ある半導体レーザ装置の概略構成図である。MnO基板
11上にn−GaAlNバッファ層52、n−GaAl
Nクラッド層53、アンドープGaAlN活性層54、
p−クラッド層55が形成され、その上にn−GaAl
N電流阻止層56、p−GaAlNコンタクト層57が
形成されている。図中の58、59はいずれも金属電極
である。
(Embodiment 4) FIG. 5 is a schematic diagram of a semiconductor laser device according to another embodiment of the present invention. The n-GaAlN buffer layer 52, the n-GaAl on the MnO substrate 11
N cladding layer 53, undoped GaAlN active layer 54,
A p-clad layer 55 is formed, on which n-GaAl is formed.
An N current blocking layer 56 and a p-GaAlN contact layer 57 are formed. 58 and 59 in the figure are both metal electrodes.

【0023】(実施例5)図6は本発明の他の実施例で
あるバイポーラトランジスタの概略の構成を示す図であ
る。MnO基板11上にアンドープGaAlNバッファ
層62、n−GaAlNコレクタ層63、p−GaAl
Nベース層64、n−GaAlNエミッタ層65、n−
GaAlNエミッタコンタクト層66が形成されてい
る。図中の67、68、69はいずれも電極である。
(Embodiment 5) FIG. 6 is a diagram showing a schematic structure of a bipolar transistor which is another embodiment of the present invention. An undoped GaAlN buffer layer 62, an n-GaAlN collector layer 63, a p-GaAl on the MnO substrate 11.
N base layer 64, n-GaAlN emitter layer 65, n-
A GaAlN emitter contact layer 66 is formed. 67, 68, and 69 in the figure are all electrodes.

【0024】以下、本発明に係る半導体素子の気相成長
層を形成する基板にMgF2を用いる実施例につき説明
する。
An example of using MgF 2 as a substrate for forming a vapor phase growth layer of a semiconductor device according to the present invention will be described below.

【0025】(実施例6)図7は、本発明の一実施例で
あるLEDの概略構成図である。MgF2基板71上に
n−Ga07Al03N層72(アンドープあるいはSiド
ープ、1×1016〜1×1019cm-3たとえば1×10
17cm-3)が3μm形成され、その上にp−Ga07Al
03N73(Mgドープ、1×1016〜1×1019cm-3
たとえば1×1017cm-3)が2μm形成されている。
なお、図中74、75はいずれも金属電極である。
(Embodiment 6) FIG. 7 is a schematic configuration diagram of an LED which is an embodiment of the present invention. On the MgF 2 substrate 71, an n-Ga 07 Al 03 N layer 72 (undoped or Si-doped, 1 × 10 16 to 1 × 10 19 cm −3, for example, 1 × 10 6).
17 cm -3 ) is formed to 3 μm, and p-Ga 07 Al is formed on it.
03 N73 (Mg-doped, 1 × 10 16 to 1 × 10 19 cm −3
For example, 1 × 10 17 cm −3 ) is formed with a thickness of 2 μm.
In the figure, 74 and 75 are both metal electrodes.

【0026】次に、上記における結晶成長方法について
説明する。
Next, the crystal growth method described above will be described.

【0027】図8は、本発明の実施例方法に使用した成
長装置を示す概略構成図である。図中21は石英製の反
応管(反応炉)であり、この反応管21内にはガス導入
口22から原料混合ガスが導入される。そして、反応管
21内のガスはガス排気口23から排気されるものとな
っている。反応管21内には、カーボン製のサセプタ2
4が配置されており、試料基板71はこのサセプタ24
上に載置される。またサセプタ24は高周波コイル25
により誘導加熱されるものとなっている。なお、基板7
1の温度は図示の熱電対26によって測定され、別の装
置(図示省略)によりコントロールされる。
FIG. 8 is a schematic diagram showing a growth apparatus used in the method of the present invention. In the figure, 21 is a quartz reaction tube (reaction furnace), and a raw material mixed gas is introduced into the reaction tube 21 through a gas inlet 22. The gas in the reaction tube 21 is exhausted from the gas exhaust port 23. A carbon susceptor 2 is provided in the reaction tube 21.
4 is arranged, and the sample substrate 71 is the susceptor 24.
Placed on top. The susceptor 24 is a high frequency coil 25.
It is supposed to be heated by induction. The substrate 7
The temperature of 1 is measured by the thermocouple 26 shown and controlled by another device (not shown).

【0028】まず、MgF2基板71を前記サセプタ2
4上に載置する。ガス導入管22から高純度水素を毎分
2.5l導入し、反応管21内の大気を置換する。次い
で、ガラス排気口23を機械(ロータリー)ポンプに接
続し、反応管21内を減圧し、内部の圧力を20〜30
0torrの範囲に設定する。その後ガス導入口22か
らH2ガスを導入し、高周波コイル25によりサセプタ
24及び基板71を加熱し基板温度500〜1000℃
で30分間保持して基板の清浄化を行う。
First, the MgF 2 substrate 71 is attached to the susceptor 2
Place on top of 4. 2.5 l of high-purity hydrogen is introduced from the gas introduction pipe 22 per minute to replace the atmosphere in the reaction pipe 21. Next, the glass exhaust port 23 is connected to a mechanical (rotary) pump, the pressure inside the reaction tube 21 is reduced, and the internal pressure is set to 20 to 30.
Set in the range of 0 torr. After that, H 2 gas is introduced from the gas introduction port 22, the susceptor 24 and the substrate 71 are heated by the high frequency coil 25, and the substrate temperature is 500 to 1000 ° C.
Hold for 30 minutes to clean the substrate.

【0029】次いで、基板温度を450〜900℃に低
下させた後、H2ガスをNH3ガス、N24ガスあるいは
Nを含む有機化合物たとえば(CH3222に切り替
えると共に、有機金属Ga化合物たとえばGa(C
33あるいはGa(C253を導入して成長を行
う。同時に有機金属Al化合物たとえばAl(CH33
あるいはAl(C253、有機金属In化合物たとえ
ばIn(CH33あるいはIn(C253を導入して
Al、Inの添加を行う。ドーピングを行う場合にはド
ーピング用原料も同時に導入する。ドーピング用原料と
してはn型用としてSi水素化物たとえばSiH4ある
いは有機金属Si化合物たとえばSi(CH34、Se
水素化物たとえばH2Seあるいは有機金属Se(C
32、p型用として有機金属Mg化合物たとえばCp
2Mgあるいは有機金属Zn化合物たとえばZn(C
32等を使用する。
Next, after lowering the substrate temperature to 450 to 900 ° C., the H 2 gas is switched to NH 3 gas, N 2 H 4 gas or an organic compound containing N, for example, (CH 3 ) 2 N 2 H 2. , An organometallic Ga compound such as Ga (C
Growth is carried out by introducing H 3 ) 3 or Ga (C 2 H 5 ) 3 . At the same time, organometallic Al compounds such as Al (CH 3 ) 3
Alternatively, Al (C 2 H 5 ) 3 and an organometallic In compound such as In (CH 3 ) 3 or In (C 2 H 5 ) 3 are introduced to add Al and In. When doping is performed, a doping raw material is also introduced at the same time. As a doping raw material, a Si hydride such as SiH 4 or an organometallic Si compound such as Si (CH 3 ) 4 or Se for n-type is used.
Hydrides such as H 2 Se or organometallic Se (C
H 3 ) 2 , for p-type organometallic Mg compounds such as Cp
2 Mg or organometallic Zn compound such as Zn (C
H 3 ) 2 etc. are used.

【0030】具体的には、第1図のLED製造には、原
料としてNH3を1×10-3mol/min、Ga(C2
53を1×10-5mol/min、Al(CH33
1×10-6mol/min導入して成長を行った。基板
温度は1150℃、圧力220torr、原料ガスの総
流量は、1l/minとした。ドーパントには、n型に
Si、p型にMgを用いた。Siはシラン(SiH4
を、Mgはシクロペンタジエニルマグネシウム(Cp2
Mg)をそれぞれ原料ガスに混入することによりドープ
した。
Specifically, in manufacturing the LED of FIG. 1, NH 3 is used as a raw material at 1 × 10 −3 mol / min and Ga (C 2
H 5 ) 3 was introduced at 1 × 10 −5 mol / min, and Al (CH 3 ) 3 was introduced at 1 × 10 −6 mol / min to perform growth. The substrate temperature was 1150 ° C., the pressure was 220 torr, and the total flow rate of the source gas was 1 l / min. As the dopant, Si was used for the n-type and Mg was used for the p-type. Si is silane (SiH 4 )
, Mg is cyclopentadienyl magnesium (Cp 2
Mg) was mixed in the source gas to dope.

【0031】(実施例7)図9はこの実施例によるLE
Dチップ81をレンズを兼ねた樹脂ケース82に埋めこ
んだ状態を示す。83は内部リード、84は外部リード
である。
(Embodiment 7) FIG. 9 shows LE according to this embodiment.
A state in which the D chip 81 is embedded in a resin case 82 that also serves as a lens is shown. Reference numeral 83 is an internal lead, and 84 is an external lead.

【0032】この実施例によるLEDは、樹脂ケースに
埋め込んで約5mcdの青色発光が確認された。この効
果は基板との格子整合のずれが±0.5%の範囲で顕著
な変化は認められなかった。また、基板の面方位のずれ
が±5%の範囲で顕著な変化は認められなかった。
The LED according to this example was embedded in a resin case and a blue light emission of about 5 mcd was confirmed. No significant change was observed in this effect within the range of ± 0.5% of the lattice mismatch with the substrate. Further, no significant change was observed within the range of the plane orientation deviation of the substrate of ± 5%.

【0033】なお、GaAlNにInを添加して格子定
数を保ったままバンドギャップを変化させることも可能
である。
It is also possible to add In to GaAlN to change the band gap while maintaining the lattice constant.

【0034】(実施例8)図10は本発明の他の実施例
であるMIS型のLEDの概略構成図である。MgF2
基板71上にn−Ga07Al03N層92(アンドープあ
るいはSiドープ、1×1016〜1×1019cm-3たと
えば1×1017cm-3)が3μm形成され、その一部に
高抵抗部93が形成されている。なお、図中における9
4、95はいずれも金属電極である。
(Embodiment 8) FIG. 10 is a schematic configuration diagram of an MIS type LED which is another embodiment of the present invention. MgF 2
An n-Ga 07 Al 03 N layer 92 (undoped or Si-doped, 1 × 10 16 to 1 × 10 19 cm −3, for example, 1 × 10 17 cm −3 ) having a thickness of 3 μm is formed on the substrate 71, and a high film is formed on a part thereof. The resistance portion 93 is formed. 9 in the figure
Both 4 and 95 are metal electrodes.

【0035】(実施例9)図11は本発明の他の実施例
である半導体レーザ装置の概略の構成を示す断面であ
る。MgF2基板71上にn−GaAlNバッファ層1
02、n−GaAlNクラッド層103、アンドープG
aAlN活性層104、p−クラッド層105が形成さ
れ、その上にn−GaAlN電流阻止層106、p−G
aAlNコンタクト層107が形成されている。なお、
図中の108、109はいずれも金属電極である。
(Embodiment 9) FIG. 11 is a sectional view showing a schematic structure of a semiconductor laser device according to another embodiment of the present invention. N-GaAlN buffer layer 1 on MgF 2 substrate 71
02, n-GaAlN cladding layer 103, undoped G
An aAlN active layer 104 and a p-clad layer 105 are formed, and an n-GaAlN current blocking layer 106 and a p-G layer are formed thereon.
The aAlN contact layer 107 is formed. In addition,
Both 108 and 109 in the figure are metal electrodes.

【0036】(実施例10)図12は本発明の他の実施
例であるバイポーラトランジスタの概略の構成を示す断
面図である。MgF2基板71上にアンドープGaAl
Nバッファ層112、n−GaAlNコレクタ層11
3、p−GaAlNベース層114、n−GaAlNエ
ミッタ層115、n−GaAlNエミッタコンタクト層
116が形成されている。なお、図中の117、118
はいずれも電極である。
(Embodiment 10) FIG. 12 is a sectional view showing a schematic structure of a bipolar transistor which is another embodiment of the present invention. Undoped GaAl on the MgF 2 substrate 71
N buffer layer 112, n-GaAlN collector layer 11
3, a p-GaAlN base layer 114, an n-GaAlN emitter layer 115, and an n-GaAlN emitter contact layer 116 are formed. Note that 117 and 118 in the figure
Are electrodes.

【0037】(実施例11)図13は本発明の他の実施
例であるLEDの概略の構成を示す断面図である。図示
されてないMgF2基板上にn−Ga07Al03N層12
1(アンドープあるいはSiドープ、1×1016〜1×
1019cm-3たとえば1×1017cm-3)を3μm形成
し、その上にp−Ga07Al03N層122(Mgドー
プ、1×1016〜1×1019cm-3たとえば1×1017
cm-3)を2μm形成した後に、基板であるMgF2
エッチングすることにより取り除いたものである。Mg
2は水によりエッチングすることが可能であり、基板
を取り除くことにより、より高効率の素子を得ることが
可能となる。
(Embodiment 11) FIG. 13 is a sectional view showing a schematic structure of an LED which is another embodiment of the present invention. An n-Ga 07 Al 03 N layer 12 is formed on a MgF 2 substrate (not shown).
1 (undoped or Si-doped, 1 × 10 16 to 1 ×
10 19 cm −3, for example, 1 × 10 17 cm −3 ) is formed to a thickness of 3 μm, and the p-Ga 07 Al 03 N layer 122 (Mg-doped, 1 × 10 16 to 1 × 10 19 cm −3, for example, 1 ×) is formed thereon. 10 17
cm -3 ) was formed to a thickness of 2 μm, and then MgF 2 as a substrate was removed by etching. Mg
F 2 can be etched with water, and by removing the substrate, a more efficient device can be obtained.

【0038】また、耐環境素子用材料として期待されて
いるBPも閃亜鉛鉱型であり格子定数がMgF2に正方
形面の一辺の長さと近いことにより、MgF2をBP用
の基板として用いることも有効である。このときには、
少量のAsを混入させて格子整合をはかるとより効果的
である。
Further, by BP which is expected as a material for an environment-resistant elements were sphalerite lattice constant is close to the length of one side of the square surface MgF 2, the use of MgF 2 as a substrate for BP Is also effective. At this time,
It is more effective to mix a small amount of As to achieve lattice matching.

【0039】その他、本発明はその趣旨を逸脱しない範
囲で種々変形して実施することができる。
In addition, the present invention can be variously modified and implemented without departing from the spirit thereof.

【0040】[0040]

【発明の効果】従来、完全に格子整合させるためには格
子定数を合わせるだけでなく格子型が等しいことが重要
であると考えられていたのに対し、格子整合させるため
には格子型が同一である必要はなく、格子間の距離が同
一であることが重要である。また、成長層は基板による
影響を受け、本来六方晶の結晶であっても、立方晶を採
ることによって基板と格子整合する場合には立方晶を採
る場合があることを解明した。叙上により、格子不整合
により発生する転位や歪みが飛躍的に減少し、低欠陥の
GaxAl1-x-yInyN結晶の成長を可能とし、高輝度
短波長発光素子の実現を可能とするなどの顕著な効果が
ある。
In the past, it was thought that it was important not only to match the lattice constants but also to have the same lattice type for perfect lattice matching. It is important that the distances between the lattices are the same. In addition, it was clarified that the growth layer is affected by the substrate, and even if the crystal is originally a hexagonal crystal, the cubic crystal may be adopted when it is lattice-matched with the substrate. Due to the above, dislocations and strains caused by lattice mismatch are drastically reduced, and low defect Ga x Al 1-xy In y N crystals can be grown to realize a high-luminance short-wavelength light emitting device. There is a remarkable effect such as.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る実施例のLEDの概略の構成を示
す断面図。
FIG. 1 is a sectional view showing a schematic configuration of an LED according to an embodiment of the present invention.

【図2】本発明に係る実施例の成長装置の概略の構成を
示す断面図。
FIG. 2 is a sectional view showing a schematic configuration of a growth apparatus according to an embodiment of the present invention.

【図3】本発明に係る実施例のLEDチップを樹脂ケー
スに埋めたLEDの断面図。
FIG. 3 is a sectional view of an LED in which an LED chip according to an embodiment of the present invention is embedded in a resin case.

【図4】本発明に係る実施例のLEDの概略の構成図を
示す断面図。
FIG. 4 is a sectional view showing a schematic configuration diagram of an LED of an embodiment according to the present invention.

【図5】本発明に係る実施例の半導体レーザの概略の構
成図を示す断面図。
FIG. 5 is a sectional view showing a schematic configuration diagram of a semiconductor laser of an example according to the present invention.

【図6】本発明に係る実施例のバイポーラトランジスタ
の概略の構成図を示す断面図。
FIG. 6 is a sectional view showing a schematic configuration diagram of a bipolar transistor of an example according to the present invention.

【図7】本発明に係る実施例のLEDの概略の構成図を
示す断面図。
FIG. 7 is a sectional view showing a schematic configuration diagram of an LED of an embodiment according to the present invention.

【図8】本発明に係る実施例の成長装置の概略の構成を
示す断面図。
FIG. 8 is a sectional view showing a schematic configuration of a growth apparatus according to an example of the present invention.

【図9】本発明に係る実施例のLEDチップを樹脂ケー
スに埋めたLEDの断面図。
FIG. 9 is a cross-sectional view of an LED in which an LED chip according to an embodiment of the present invention is embedded in a resin case.

【図10】本発明に係る実施例のLEDの概略の構成を
示す断面図。
FIG. 10 is a sectional view showing a schematic configuration of an LED of an example according to the present invention.

【図11】本発明に係る実施例の半導体レーザの概略の
構成図を示す断面図。
FIG. 11 is a sectional view showing a schematic configuration diagram of a semiconductor laser of an example according to the present invention.

【図12】本発明に係る実施例のバイポーラトランジス
タの概略の構成図を示す断面図。
FIG. 12 is a sectional view showing a schematic configuration diagram of a bipolar transistor of an example according to the present invention.

【図13】本発明に係る実施例のLEDの概略の構成図
を示す断面図。
FIG. 13 is a sectional view showing a schematic configuration diagram of an LED of an example according to the present invention.

【符号の説明】[Explanation of symbols]

11…MnO基板 12、42…n−Ga07Al03N 13…p−Ga07Al03N 21…反応管 24…サセプタ 31、81…LEDチップ 32、82…樹脂ケース 33、83…内部リード 34、84…外部リード 43…高抵抗GaAlN 71…MgF2基板11 ... MnO substrate 12, 42 ... n-Ga 07 Al 03 N 13 ... p-Ga 07 Al 03 N 21 ... Reaction tube 24 ... Susceptor 31, 81 ... LED chip 32, 82 ... Resin case 33, 83 ... Internal lead 34 , 84 ... External lead 43 ... High resistance GaAlN 71 ... MgF 2 substrate

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 III族元素以外の立方晶系の基板と、前
記基板上に形成され結晶の格子間距離のみ前記基板と略
相等ならしめて整合されたIII−V族化合物半導体層を
具備した半導体素子。
1. A semiconductor comprising a cubic substrate other than a group III element, and a group III-V compound semiconductor layer formed on the substrate and matched with the substrate only in a crystal lattice distance. element.
【請求項2】 基板がMgF2、立方晶系NaCl構造
結晶のいずれかであることを特徴とする請求項1に記載
の半導体素子。
2. The semiconductor device according to claim 1, wherein the substrate is either MgF 2 or a cubic NaCl structure crystal.
JP3179198A 1991-07-19 1991-07-19 Semiconductor device Pending JPH0529653A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3179198A JPH0529653A (en) 1991-07-19 1991-07-19 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3179198A JPH0529653A (en) 1991-07-19 1991-07-19 Semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP9046202A Division JPH09219541A (en) 1997-02-28 1997-02-28 Semiconductor light emitting element

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06268259A (en) 1993-03-12 1994-09-22 Nichia Chem Ind Ltd Gallium nitride compound semiconductor light emitting element
JPH0945963A (en) * 1995-07-31 1997-02-14 Eiko Eng:Kk Gan based semiconductor device
US6043514A (en) * 1997-02-27 2000-03-28 Sharp Kabushiki Kaisha Group III-V type nitride semiconductor device
JP2001237455A (en) * 2000-02-23 2001-08-31 Inst Of Physical & Chemical Res InAlGaN EMITTING LIGHT IN SHORT-WAVELENGTH REGION OF ULTRAVIOLET REGION, ITS MANUFACTURING METHOD AS WELL AS ULTRAVIOLET LIGHT-EMITTING ELEMENT USING THE SAME

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06268259A (en) 1993-03-12 1994-09-22 Nichia Chem Ind Ltd Gallium nitride compound semiconductor light emitting element
JPH0945963A (en) * 1995-07-31 1997-02-14 Eiko Eng:Kk Gan based semiconductor device
US6043514A (en) * 1997-02-27 2000-03-28 Sharp Kabushiki Kaisha Group III-V type nitride semiconductor device
JP2001237455A (en) * 2000-02-23 2001-08-31 Inst Of Physical & Chemical Res InAlGaN EMITTING LIGHT IN SHORT-WAVELENGTH REGION OF ULTRAVIOLET REGION, ITS MANUFACTURING METHOD AS WELL AS ULTRAVIOLET LIGHT-EMITTING ELEMENT USING THE SAME
US7675069B2 (en) 2000-02-23 2010-03-09 Riken InAlGaN emitting light in ultraviolet short-wavelength region and process for preparing the same as well as ultraviolet light-emitting device using the same

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