CN100343984C - Constructed configuration of heat sink capable of embedding semiconductor of electronic module - Google Patents
Constructed configuration of heat sink capable of embedding semiconductor of electronic module Download PDFInfo
- Publication number
- CN100343984C CN100343984C CNB2004100063844A CN200410006384A CN100343984C CN 100343984 C CN100343984 C CN 100343984C CN B2004100063844 A CNB2004100063844 A CN B2004100063844A CN 200410006384 A CN200410006384 A CN 200410006384A CN 100343984 C CN100343984 C CN 100343984C
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- Prior art keywords
- heat sink
- substrate
- building brick
- electronic building
- embedded
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The present invention relates to a constructed structure of a heat sink capable of embedding a semiconductor of an electronic module, which comprises a heat sink and at least one electronic assembly, wherein a plurality of concave parts are formed on the bottom surface of the heat sink, and thus, the heat sink can embed the electronic assembly and contains a semiconductor chip by the concave parts, the semiconductor device can adjust the electrical property function of the semiconductor device by the electronic assembly embedded by the heat sink, and the heat elimination effect of the semiconductor device can be provided by the heat sink. The present invention can simultaneously solve the problems of heat elimination, electromagnetic interference and electrical property of the packaging unit and can simultaneously combine an electronic component with the heat sink, and the arrangement flexibility of a pipeline of a semiconductor packaging base plate is increased. The present invention has the advantages of simplified process steps and low cost, and does not need to redesign the base plate for the electrical property functions of different requirements so as to further avoid the increase of the cost of material management and material inventory.
Description
Technical field
The invention relates to a kind of semiconductor packages heat spreader structure,, can effectively promote the electrical and thermal diffusivity function of semiconductor device particularly about a kind of heat spreader structure of integrating electronic building brick and radiator structure simultaneously.
Background technology
Ball grid array (Ball Grid Array, BGA) encapsulation is a kind of advanced person's a semiconductor die package technology, its characteristics are to adopt substrate to settle semiconductor chip, and plant the soldered ball (Solder Ball) of putting a plurality of one-tenth palisade arranged at this substrate back, make on the semiconductor chip carrier of same units area and can hold more I/O links (I/O connection), demand with the semiconductor chip that satisfies Highgrade integration (Integration), and by these soldered balls with the welding of whole encapsulation unit and be electrically connected to outside electronic installation, as printed circuit board (PCB).
In addition, flourish along with electronic industry, electronic product also marches toward multi-functional, high performance R﹠D direction gradually.For satisfying the package requirements of semiconductor device high integration (Integration) and microminiaturized (Miniaturization), provide a plurality of and have, passive block and circuit carry the circuit board that connects and also develop into multi-layer sheet by lamina gradually, under limited space, enlarge available circuit area on the circuit board by interlayer interconnection technique (Interlayer Connection), thereby cooperate highdensity integrated circuit (Integrated Circuit) demand.
Yet, electrical functionality for lifting or stable electronic product, need on semiconductor device, to integrate for example resistor assembly (Resistors), capacitance component (Capacitors) and Inductive component passive blocks (Passive Component) such as (Inductors), utilize resistor assembly to change the size of current of circuit, capacitance component provides the function of stored voltage or filtering, and Inductive component comes filtering to have the electric current of noise.
See also Fig. 7, United States Patent (USP) the 6th, 108, No. 212 cases are directly to form weld pad 21 and electrode tip 22 in substrate 20, and form electrical resistors (Electricallybesistivevolume) 23 to constitute passive block 22 of this weld pad 21 and electrode tips, be electrically conducted with all the other electronic installations 25 by planting the metal coupling 24 that is connected on this weld pad 21 for this substrate 20, provide semiconductor device electrical quality preferably by this weld pad 21, electrode tip 22 with the passive block that electrical resistor 23 constitutes simultaneously.But the integration mode of this passive block, make the overall structure and the required complex procedures degree thereof of substrate strengthen, do not meet cost benefit, simultaneously, at the different designs demand as electric characteristics such as resistance value and capacitances the time, must redesign this substrate, cause the significantly lifting of manufacturing cost, also can produce the puzzlement of handling of goods and materials and the increase of material stock cost.
In addition, because the density of electronic building brick on the semiconductor device and electronic circuit is highly integrated, its work produces a lot of heats, with the effective loss of these heats, can seriously shorten the performance and the life-span of semiconductor device as untimely; Simultaneously, general semiconductor device lacks effective screening effect (Shielding), is subjected to external electromagnetic and interference of noise easily.
Therefore, how in semiconductor device, to integrate the electronic building brick that comprises passive block or active block, under compact and the multi-functional and high electrical trend of electronic product requirement now, electronic building bricks such as the passive block of effective quantity and semiconductor chip are provided in semiconductor device, to promote the electrical functionality of electronic product, simultaneously again effectively the heat of loss semiconductor device with the ELECTROMAGNETIC OBSCURANT effect is provided, be urgency problem to be solved at present.
Summary of the invention
For overcoming the shortcoming of above-mentioned prior art, main purpose of the present invention is to provide a kind of heat radiation that can solve encapsulation unit simultaneously, electromagnetic interference and the electrical semiconductor packages heat spreader structure of the be embedded into electronic building brick of problem.
Another object of the present invention is to provide a kind of can be simultaneously in conjunction with the semiconductor packages heat spreader structure of the be embedded into electronic building brick of electronic building brick and heat sink.
Another purpose of the present invention is to provide a kind of semiconductor packages heat spreader structure that increases the be embedded into electronic building brick of conductor package substrate configuration flexibility.
A further object of the present invention is to provide a kind of step and cost of simplifying working process, need not to redesign this substrate, and then avoid producing the semiconductor packages heat spreader structure of be embedded into electronic building brick of the increase of handling of goods and materials and material stock cost at the electrical functionality of different demands.
For reaching above-mentioned and other purpose, the semiconductor packages heat spreader structure that is embedded into electronic building brick of the present invention mainly comprises: heat sink, be formed with a plurality of recesses on this heat sink bottom surface, and be embedded into electronic building brick and take in semiconductor chip for this heat sink; At least one electronic building brick, it is embedded in the recess of this heat sink, and connect the base plate for packaging of putting to being electrically connected with semiconductor chip, be construed as semiconductor device, be embedded into the electrical functionality that electronic building brick is adjusted this semiconductor device by this heat sink, and take in chip by the recess of this heat sink, thus the ELECTROMAGNETIC OBSCURANT function of this semiconductor device is provided, and utilize this heat sink to improve the radiating effect of semiconductor device.
The semiconductor packages heat spreader structure that is embedded into electronic building brick of the present invention specifically comprises: conductor package substrate have first surface and second surface, and this first surface has a plurality of electric connection pads; At least one semiconductor chip and at least one have the electronic building brick of a plurality of electrodes, and it connects puts and be electrically connected to this substrate first surface; Heat sink, it has upper surface and lower surface, this lower surface connects and places this substrate first surface, and this heat sink surface is formed with a plurality of recesses for being embedded into this electronic building brick, the electric connection pad that electrode by electronic building brick is electrically connected at this substrate is incorporated into the first surface of this substrate with the lower surface with this heat sink, again this heat sink have always put on surface and lower surface perforate to take in this semiconductor chip; Potting resin is filled in the gap of this heat sink and this substrate; And a plurality of conductive components, connect and place this substrate second surface, be electrically conducted to external device (ED) for this semiconductor device.
In sum, because the semiconductor packages heat spreader structure that is embedded into electronic building brick of the present invention is integrated with heat sink and at least one electronic building brick, this electronic building brick can be passive block or active block, passive block is for example capacitance component, resistor assembly, Inductive component or chip-shaped passive block etc., and this active block is a semiconductor chip; Simultaneously, in this heat sink, offer accommodation space of active block (for example integrated circuit (IC) chip) of semiconductor device, electrical functionality and thermal diffusivity with synchronous this semiconductor device of lifting, be coupled to this semiconductor chip by this heat sink, thereby the heat that effective loss semiconductor chip produces, and this chip screening effect (Shielding) is provided, make this chip avoid extraneous electromagnetic interference (Electro magnet Interference, EMI); In addition, the active block of this semiconductor device or passive block all can be accommodated in the recess of this heat sink, avoiding existing directly settles the operation that this electronic building brick caused loaded down with trivial details in substrate, and when satisfying the electric characteristics of different designs demand, redesign the increase of the manufacturing cost that this substrate causes.
Description of drawings
Fig. 1 is the schematic perspective view that is embedded into the semiconductor packages heat spreader structure embodiment 1 of electronic building brick of the present invention;
Fig. 2 is embodiment 1 schematic perspective view that is embedded with electronic building brick in the recess of the semiconductor packages heat spreader structure that is embedded into electronic building brick of the present invention;
Fig. 3 is a generalized section of using the semiconductor device embodiment 1 of the semiconductor packages heat spreader structure institute construction that is embedded into electronic building brick of the present invention;
Fig. 4 is the schematic perspective view that is embedded into the semiconductor packages heat spreader structure embodiment 2 of electronic building brick of the present invention;
Fig. 5 is embodiment 2 schematic perspective views that are embedded with electronic building brick in the recess of the semiconductor packages heat spreader structure that is embedded into electronic building brick of the present invention;
Fig. 6 is a generalized section of using the semiconductor device embodiment 2 of the semiconductor packages heat spreader structure institute construction that is embedded into electronic building brick of the present invention; And
Fig. 7 has the semiconductor device generalized section of integrating passive block in substrate now.
Embodiment
Below be by particular specific embodiment explanation embodiments of the present invention.
Embodiment 1
Fig. 1 and Fig. 2 are the semiconductor packages heat spreader structure schematic diagrames of the be embedded into electronic building brick of the embodiment of the invention 1.
As shown in Figure 1, the semiconductor packages heat spreader structure that is embedded into electronic building brick of the present invention, mainly include heat sink 14 and at least one electronic building brick, this heat sink 14 can adopt the material with high-termal conductivity and hardness, metal material for example, wherein, with copper become better, it has a upper surface and a lower surface, and be formed with a plurality of correspondences at the lower surface of this heat sink and be preset with the recess 140 that is embedded into electronic building brick, this electronic building brick can be passive block or active block, and passive block can for example be a capacitance component, resistor assembly, Inductive component or chip-shaped passive block etc., this active block is a semiconductor chip.
As shown in Figure 2, in the recess 140 of this heat sink 14, connect and be equipped with at least one passive block 13, this passive block 13 can be resistor assembly, capacitance component and Inductive component.Wherein this passive block 13 can utilize coating technique, screen printing technology for example, the passive block material is formed in the recess 140, or ceramic passive block material is formed in the recess 140 through the high temperature sintering program, a kind of passive block structure also can be provided, be installed in this heat sink recess 140 by adhesive, and form electrode 131 on its surface.Certainly this passive block also can be chip-shaped passive block 15, and forms a plurality of electrodes 151 on its surface, so as to resistor assembly, capacitance component, Inductive component or chip-shaped passive block are incorporated in this heat sink recess.The structural form of these passive blocks 13,15 all is the common technology means, and so non-this case technical characterictic is no longer explanation.It not is to exceed with general passive block 13 or chip-shaped passive block 15 that the recess 140 of described heat sink 14 connects the electronic building brick of putting, and this recess 140 also can ccontainingly belong to the electronic building brick of active block.
Fig. 3 uses the semiconductor device generalized section that is embedded into the semiconductor packages heat spreader structure institute construction of electronic building brick of the present invention.
As shown in the figure, this semiconductor device 10 is that semiconductor chip is finished its encapsulation according to the upside-down mounting mode, mainly comprise: conductor package substrate 11, this conductor package substrate 11 has first surface 111 and second surface 112, connects the electric connection pad 113 of putting and be electrically connected to this substrate first surface 111 at least one semiconductor chip 12; Heat sink 14, its lower surface are formed with the recess 140 of a plurality of corresponding semiconductor chips or passive block, and are embedded with passive block 13,15 in this recess 140.When this heat sink 14 is coupled to this substrate first surface 111 by its lower surface, can make this passive block 13,15 that is embedded in these heat sink 14 lower surface recesses 140 be electrically connected to the electric connection pad 113 of this substrate first surface 111, and this semiconductor chip that is electrically connected to this substrate 11 in advance 12 is accommodated in this heat sink recess 140 by its electrode 131,151.In addition, connect when putting, can put at its phase mutual connection and fill potting resin between face, reducing between heat sink 14 and substrate 11 structures, and can borrow this potting resin increase heat transfer efficiency because of the thermal stress that thermal dilation difference was produced to this substrate first surface 111 at this heat sink 14; For avoiding this potting resin overflow to this substrate, can form continuous protuberance 142 at these heat sink 14 bottom surface peripheries, with the overflow of effective prevention resin; And a plurality of conductive components 16, it connects puts on this substrate second surface 112, and this semiconductor device 10 can be electrically conducted to external device (ED) by these conductive components 16.As previously mentioned, it not is to exceed with general passive block 13 or chip-shaped passive block 15 that the recess 140 of this heat sink 14 connects the electronic building brick of putting, and this recess 140 also can ccontainingly belong to the electronic building brick of active block.
This conductor package substrate 11 can be to finish the bilayer of pre-treatment or the substrate of multilayer circuit layer, just by middle layer plate is provided, and at this middle layer plate surface formation first conductive metal layer, and this first conductive metal layer of patterning and form first circuit layer, then, increase a layer operation, on this substrate first circuit layer, to form second conductive metal layer via insulating barrier, afterwards, this second conductive metal layer of patterning is to form the second circuit layer, this mode that circulates so according to demand continues to increase a layer operation, to form the substrate of multilayer circuit layer.Wherein, this insulating barrier can be insulation organic material or ceramic material formations such as epoxy resin (Expoxyresin), polyimides (Polyimide), cyanate ester (Cyanate Ester), glass fibre, Bismaleimide Triazine (BT, Bismaleimide Triazine) or blending epoxy and glass fibre; This circuit layer generally is based on the higher copper of conductivity, transmits the conductor material of signal as this substrate, and form a plurality of conductive through holes (Via) in the insulating barrier of this substrate, so that electrically connect adjacent circuit layer.In addition, this substrate 11 can form by pressing method (Laminated) and Layer increasing method modes such as (Build-up), and this also belongs to prior art, and so non-this case technical characterictic is no longer narration.
This semiconductor chip 12 has circuit face 121 and inverter circuit face 122, on the circuit face 121 of this semiconductor chip 12, be formed with a plurality of metal couplings 123, this semiconductor chip 12 connect in the upside-down mounting mode put, and be electrically connected to the electric connection pad 113 of this substrate first surface 111.In addition, this semiconductor chip also can be on its inverter circuit face 122 connects by adhesive to be put at this substrate first surface 111, and be electrically connected to this substrate (figure mark) by routing mode (Wire bonding), the present invention just only can be implemented on the flip-over type encapsulation, also may be implemented on routing type encapsulation, this should be to be familiar with the equivalence enforcement that the personnel of semiconductor die package can know by inference.
The lower surface of this heat sink 14 is formed with the recess 140 of a plurality of corresponding semiconductor chips and passive block, this is embedded with passive block 13, the lower surface of 15 heat sink 14 is coupled to this substrate first surface 111, and make this passive block 13,15 when being electrically connected to this substrate 11, this semiconductor chip that is electrically connected to this substrate 11 in advance 12 is accommodated in this recess 140, heat by these heat sink 14 effective loss semiconductor chip 12 work generations, and provide this semiconductor chip 12 screening effects (Shielding), avoid this semiconductor chip 12 be subjected to extraneous electromagnetic interference (Electromagnet Interference, EMI).
This conductive component 16 can be a plurality of soldered balls or conductive pole (figure is mark not), plant the second surface 112 that is connected on this substrate 11 by planting ball operation (Ball Implantation), utilize these soldered balls with this semiconductor chip and external device (ED), electrically connect as printed circuit board (PCB).
Embodiment 2
Fig. 4 and Fig. 5 are embodiment 2 schematic diagrames that are embedded into the semiconductor packages heat spreader structure of electronic building brick of the present invention.
As shown in the figure, the heat sink of the embodiment of the invention 2 14 is roughly the same with the technology that embodiment 1 is disclosed, its difference be in, connect in the present embodiment 2 to put and be used to take in the semiconductor chip place at this heat sink 14 and be formed with the perforate 141 that runs through its upper and lower surface.
Fig. 6 is a generalized section of using the semiconductor device embodiment 2 of the semiconductor packages heat spreader structure institute construction that is embedded into electronic building brick of the present invention.
As shown in the figure, in embodiment 2, connect the heat sink 14 put on this substrate first surface 111 and be formed with the perforate 141 that runs through the surface taking in semiconductor chip 12 places, when at least one semiconductor chip 12 connects the electric connection pad of putting at this substrate first surface 111 113, can be accommodated in simultaneously in this heat sink perforate 141, and resin compound such as epoxy resin encapsulating materials such as (Epoxyresin) are inserted to the perforate 141 of this heat sink 14 by mold pressing (Molding) operation, to form potting resin 17, make this potting resin 17 envelope this semiconductor chip 12, avoid being subjected to extraneous aqueous vapor or pollutant to encroach on, and reduce between the structure of heat sink and substrate, and can borrow this potting resin increase heat transfer efficiency because of the thermal stress that thermal dilation difference produced.In addition, in this substrate 11, also can form a plurality of plating vias (PTH) 114 that run through, be stacked over circuit layer between insulating barrier for electric connection.Simultaneously, in preferable enforcement, can form a continuous protuberance 142 at these heat sink 14 bottom surface peripheries, with the overflow of effective obstruct potting resin 17.
The semiconductor packages heat spreader structure that is embedded into passive block of the present invention can be integrated at least one integrated circuit (IC) chip simultaneously, and can in semiconductor device, be embedded with source component or passive block (capacitance component for example, resistor assembly and Inductive component or chip-shaped passive block) heat sink, so that promote the electrical functionality and the thermal diffusivity of this semiconductor device synchronously, simultaneously, be coupled to this semiconductor chip by this heat sink, the effective heat that produces in the loss semiconductor chip course of work, and can provide this chip screening effect (Shielding), in addition, the active block of this semiconductor device or passive block all can be taken in and be embedded in the perforate or recess of this heat sink.Simultaneously, the present invention also can avoid directly settling in substrate in the existing operation operation that passive block caused loaded down with trivial details, and be when satisfying the electrical functionality of different designs demand, to need the increase of the redesign manufacturing cost that this substrate caused, the present invention has increased the flexibility of base plate line layout.
Claims (7)
1. the semiconductor packages heat spreader structure that can be embedded into electronic building brick is characterized in that, comprising:
Conductor package substrate has first surface and second surface, and this first surface has a plurality of electric connection pads;
At least one semiconductor chip and at least one have the electronic building brick of a plurality of electrodes, and it connects puts and be electrically connected to this substrate first surface;
Heat sink, it has upper surface and lower surface, this lower surface connects and places this substrate first surface, and this heat sink surface is formed with a plurality of recesses for being embedded into this electronic building brick, the electric connection pad that electrode by electronic building brick is electrically connected at this substrate is incorporated into the first surface of this substrate with the lower surface with this heat sink, again this heat sink have always put on surface and lower surface perforate to take in this semiconductor chip;
Potting resin is filled in the gap of this heat sink and this substrate; And
A plurality of conductive components connect and place this substrate second surface, are electrically conducted to external device (ED) for this semiconductor device.
2. the semiconductor packages heat spreader structure that is embedded into electronic building brick as claimed in claim 1 is characterized in that, is formed with a plurality of metal couplings on the circuit face of this semiconductor chip, this semiconductor chip is connect in the upside-down mounting mode put and be electrically connected to this substrate.
3. the semiconductor packages heat spreader structure that is embedded into electronic building brick as claimed in claim 1 is characterized in that, this semiconductor chip is to connect by adhesive to put at this substrate first surface on its inverter circuit face, and is electrically connected to this substrate by the routing mode.
4. the semiconductor packages heat spreader structure that is embedded into electronic building brick as claimed in claim 1 is characterized in that, this conductive component is a kind of in soldered ball and the conductive pole.
5. the semiconductor packages heat spreader structure that is embedded into electronic building brick as claimed in claim 1 is characterized in that, this heat sink bottom surface periphery is formed with a continuous protuberance.
6. the semiconductor packages heat spreader structure that is embedded into electronic building brick as claimed in claim 1 is characterized in that this electronic building brick is active block or passive block.
7. the semiconductor packages heat spreader structure that is embedded into electronic building brick as claimed in claim 6 is characterized in that this passive block is at least one of resistor assembly, capacitance component, Inductive component and chip-shaped passive block.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100063844A CN100343984C (en) | 2004-02-27 | 2004-02-27 | Constructed configuration of heat sink capable of embedding semiconductor of electronic module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100063844A CN100343984C (en) | 2004-02-27 | 2004-02-27 | Constructed configuration of heat sink capable of embedding semiconductor of electronic module |
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| Publication Number | Publication Date |
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| CN1661797A CN1661797A (en) | 2005-08-31 |
| CN100343984C true CN100343984C (en) | 2007-10-17 |
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| CNB2004100063844A Expired - Fee Related CN100343984C (en) | 2004-02-27 | 2004-02-27 | Constructed configuration of heat sink capable of embedding semiconductor of electronic module |
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Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8815647B2 (en) * | 2012-09-04 | 2014-08-26 | Infineon Technologies Ag | Chip package and a method for manufacturing a chip package |
| JP5998792B2 (en) * | 2012-09-21 | 2016-09-28 | Tdk株式会社 | Semiconductor IC-embedded substrate and manufacturing method thereof |
| US9530714B2 (en) * | 2012-12-13 | 2016-12-27 | Nvidia Corporation | Low-profile chip package with modified heat spreader |
| CN105700653A (en) * | 2016-04-15 | 2016-06-22 | 东莞市迅阳实业有限公司 | Heat expansion-type heat-sink device |
| US10910325B2 (en) * | 2017-05-29 | 2021-02-02 | Intel Corporation | Integrated circuit packages with conductive element having cavities housing electrically connected embedded components |
| CN110416192A (en) * | 2019-07-12 | 2019-11-05 | 南通沃特光电科技有限公司 | A kind of integrated circuit package structure and its packaging method with capacitance component |
| CN118303136A (en) * | 2022-10-28 | 2024-07-05 | 宏启胜精密电子(秦皇岛)有限公司 | Circuit board assembly, manufacturing method thereof and packaging structure |
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| US5371404A (en) * | 1993-02-04 | 1994-12-06 | Motorola, Inc. | Thermally conductive integrated circuit package with radio frequency shielding |
| US5510956A (en) * | 1993-11-24 | 1996-04-23 | Fujitsu Limited | Electronic part unit or assembly having a plurality of electronic parts enclosed within a metal enclosure member mounted on a wiring layer |
| US5819402A (en) * | 1994-12-05 | 1998-10-13 | International Business Machines Corporation | Method for cooling of chips using blind holes with customized depth |
| US5907474A (en) * | 1997-04-25 | 1999-05-25 | Advanced Micro Devices, Inc. | Low-profile heat transfer apparatus for a surface-mounted semiconductor device employing a ball grid array (BGA) device package |
| CN1417868A (en) * | 2001-10-29 | 2003-05-14 | 银河光电股份有限公司 | Multiple-chip package structure of LED chip |
| CN1476084A (en) * | 2002-08-13 | 2004-02-18 | 矽统科技股份有限公司 | Heat dissipation mould set |
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5371404A (en) * | 1993-02-04 | 1994-12-06 | Motorola, Inc. | Thermally conductive integrated circuit package with radio frequency shielding |
| US5510956A (en) * | 1993-11-24 | 1996-04-23 | Fujitsu Limited | Electronic part unit or assembly having a plurality of electronic parts enclosed within a metal enclosure member mounted on a wiring layer |
| US5819402A (en) * | 1994-12-05 | 1998-10-13 | International Business Machines Corporation | Method for cooling of chips using blind holes with customized depth |
| US5907474A (en) * | 1997-04-25 | 1999-05-25 | Advanced Micro Devices, Inc. | Low-profile heat transfer apparatus for a surface-mounted semiconductor device employing a ball grid array (BGA) device package |
| CN1417868A (en) * | 2001-10-29 | 2003-05-14 | 银河光电股份有限公司 | Multiple-chip package structure of LED chip |
| CN1476084A (en) * | 2002-08-13 | 2004-02-18 | 矽统科技股份有限公司 | Heat dissipation mould set |
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| CN1661797A (en) | 2005-08-31 |
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