CN100343919C - 高速磁存储器的体系结构 - Google Patents
高速磁存储器的体系结构 Download PDFInfo
- Publication number
- CN100343919C CN100343919C CNB2003101185986A CN200310118598A CN100343919C CN 100343919 C CN100343919 C CN 100343919C CN B2003101185986 A CNB2003101185986 A CN B2003101185986A CN 200310118598 A CN200310118598 A CN 200310118598A CN 100343919 C CN100343919 C CN 100343919C
- Authority
- CN
- China
- Prior art keywords
- switches
- programming
- circuit
- current
- sink
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000005291 magnetic effect Effects 0.000 title claims abstract description 55
- 230000015654 memory Effects 0.000 claims abstract description 157
- 230000004044 response Effects 0.000 claims abstract description 25
- 230000005669 field effect Effects 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 9
- 238000000034 method Methods 0.000 description 9
- 238000003491 array Methods 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 101000879840 Homo sapiens Serglycin Proteins 0.000 description 3
- 102100037344 Serglycin Human genes 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 230000002457 bidirectional effect Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 101000999079 Homo sapiens Radiation-inducible immediate-early gene IEX-1 Proteins 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005294 ferromagnetic effect Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1693—Timing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1673—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Hall/Mr Elements (AREA)
- Semiconductor Memories (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/318,709 | 2002-12-13 | ||
| US10/318,709 US6778431B2 (en) | 2002-12-13 | 2002-12-13 | Architecture for high-speed magnetic memories |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1534676A CN1534676A (zh) | 2004-10-06 |
| CN100343919C true CN100343919C (zh) | 2007-10-17 |
Family
ID=32506442
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2003101185986A Expired - Lifetime CN100343919C (zh) | 2002-12-13 | 2003-12-12 | 高速磁存储器的体系结构 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6778431B2 (enExample) |
| EP (1) | EP1570487B1 (enExample) |
| JP (1) | JP2006510145A (enExample) |
| CN (1) | CN100343919C (enExample) |
| AU (1) | AU2003293828A1 (enExample) |
| DE (1) | DE60320301T2 (enExample) |
| TW (1) | TWI243379B (enExample) |
| WO (1) | WO2004055821A2 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6886119B2 (en) * | 2002-09-04 | 2005-04-26 | Agere Systems Inc. | Method and apparatus for improved integrated circuit memory testing |
| CA2749971C (en) * | 2009-02-20 | 2013-04-16 | John Lynch | Memory architecture with a current controller and reduced power requirements |
| US9183912B2 (en) | 2012-05-17 | 2015-11-10 | Everspin Technologies, Inc. | Circuit and method for controlling MRAM cell bias voltages |
| WO2016053296A1 (en) | 2014-09-30 | 2016-04-07 | Hewlett Packard Enterprise Development Lp | Crosspoint array decoder |
| US9721628B1 (en) * | 2016-09-15 | 2017-08-01 | Globalfoundries Inc. | Address based memory data path programming scheme |
| JP2019046514A (ja) | 2017-08-29 | 2019-03-22 | 東芝メモリ株式会社 | 半導体記憶装置 |
| US10199095B1 (en) * | 2017-09-01 | 2019-02-05 | Globalfoundries Inc. | Bit line strapping scheme for high density SRAM |
| US10290327B2 (en) * | 2017-10-13 | 2019-05-14 | Nantero, Inc. | Devices and methods for accessing resistive change elements in resistive change element arrays |
| US10998074B2 (en) * | 2019-07-22 | 2021-05-04 | Micron Technology, Inc. | Wordline capacitance balancing |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1095864A (zh) * | 1993-05-24 | 1994-11-30 | 松下电子工业株式会社 | 电可擦可编程只读存储器,有其之存储器件和集成电路板 |
| JPH09306159A (ja) * | 1996-05-14 | 1997-11-28 | Nippon Telegr & Teleph Corp <Ntt> | 逐次読出しメモリ |
| US6236611B1 (en) * | 1999-12-20 | 2001-05-22 | Motorola, Inc. | Peak program current reduction apparatus and method |
| CN1371101A (zh) * | 2001-02-22 | 2002-09-25 | 三星电子株式会社 | 用于编程非易失性存储器的位线设置和放电电路 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH056159A (ja) * | 1991-06-28 | 1993-01-14 | Toshiba Corp | デイスプレイ装置 |
| US6269040B1 (en) * | 2000-06-26 | 2001-07-31 | International Business Machines Corporation | Interconnection network for connecting memory cells to sense amplifiers |
| US6515896B1 (en) * | 2001-07-24 | 2003-02-04 | Hewlett-Packard Company | Memory device with short read time |
-
2002
- 2002-12-13 US US10/318,709 patent/US6778431B2/en not_active Expired - Lifetime
-
2003
- 2003-11-28 TW TW092133503A patent/TWI243379B/zh not_active IP Right Cessation
- 2003-12-10 JP JP2004559798A patent/JP2006510145A/ja active Pending
- 2003-12-10 EP EP03789209A patent/EP1570487B1/en not_active Expired - Lifetime
- 2003-12-10 DE DE60320301T patent/DE60320301T2/de not_active Expired - Fee Related
- 2003-12-10 WO PCT/EP2003/014011 patent/WO2004055821A2/en not_active Ceased
- 2003-12-10 AU AU2003293828A patent/AU2003293828A1/en not_active Abandoned
- 2003-12-12 CN CNB2003101185986A patent/CN100343919C/zh not_active Expired - Lifetime
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1095864A (zh) * | 1993-05-24 | 1994-11-30 | 松下电子工业株式会社 | 电可擦可编程只读存储器,有其之存储器件和集成电路板 |
| JPH09306159A (ja) * | 1996-05-14 | 1997-11-28 | Nippon Telegr & Teleph Corp <Ntt> | 逐次読出しメモリ |
| US6236611B1 (en) * | 1999-12-20 | 2001-05-22 | Motorola, Inc. | Peak program current reduction apparatus and method |
| CN1371101A (zh) * | 2001-02-22 | 2002-09-25 | 三星电子株式会社 | 用于编程非易失性存储器的位线设置和放电电路 |
Also Published As
| Publication number | Publication date |
|---|---|
| US6778431B2 (en) | 2004-08-17 |
| US20040114439A1 (en) | 2004-06-17 |
| WO2004055821A2 (en) | 2004-07-01 |
| DE60320301T2 (de) | 2009-06-25 |
| WO2004055821A3 (en) | 2004-11-04 |
| JP2006510145A (ja) | 2006-03-23 |
| AU2003293828A8 (en) | 2004-07-09 |
| TW200426824A (en) | 2004-12-01 |
| TWI243379B (en) | 2005-11-11 |
| CN1534676A (zh) | 2004-10-06 |
| DE60320301D1 (enExample) | 2008-05-21 |
| EP1570487A2 (en) | 2005-09-07 |
| EP1570487B1 (en) | 2008-04-09 |
| AU2003293828A1 (en) | 2004-07-09 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20071017 |