CH704584A2 - Method for manufacturing code carrier with code element series, involves determining division number of code divisions corresponding to desired solution - Google Patents

Abstract

The method involves determining a division number of code divisions corresponding to the desired solution. A digit of points of a sequence is determined with a length for representing the divisions. The sequence of the length is produced by a switch arrangement with memories containing a stored value and with test points from the memories to an allocation table, which is arranged such that a feedback signal following a definite composition is produced at an input of the switch arrangement for change of memory values corresponding to the definite composition. Independent claims are also included for the following: (1) a code carrier for position, linear and angle encoder with an absolutely encoded code with divisions corresponding to a desired resolution; (2) a switching arrangement with a memory value comprising storing value and an association table; and (3) a method for control error of a code carrier manufacturing method.

Description

The invention relates to a method for producing a code carrier with an absolutely coded code track from a code element sequence for reading r consecutive code elements of the code track by a scanning device with a predetermined resolution A of the absolute coded code track.

The invention also relates to a code carrier with an absolutely coded code track with m divisions according to the given resolution <A = 1/m>, prepared with the inventive method, as well as a position, linear or angle encoder with the inventive code carrier.

In addition, the invention relates to a circuit arrangement with r each memory-containing memories, an allocation table and <q ≤ r> taps from the memories to the allocation table, wherein the circuit for generating a sequence <p <r> -b> with a Length <n = m> is used to produce a code carrier with an absolutely coded code with m divisions in the production method according to the invention.

Position, linear and angle encoders for the determination of directions, angles and lengths as layers find in many areas, such as in geodetic and industrial surveying, application. Developments in angle measuring technology lead via mechanical readings to fully automated angle measurement according to the current state of the art.

Known automated position measuring devices generally comprise a code carrier having a code track of code elements and a scanning device as a detection element for the code. In angle measuring devices, the code carrier is usually designed to be rotatable about an axis relative to the scanning device, wherein an angular position of the code carrier with the code track then represents the variable to be measured. The code track can be applied, for example, on a surface or lateral surface of the code carrier.

For automatic detection of the position of the movable relative to the scanning code carrier is scanned by different techniques. Known scanning methods are electronic-magnetic, electronic and optical-electronic methods.

To determine, for example, angular positions of 0 ° to 360 °, the coding is usually arranged in a full circle. The angular resolution of the full circle is determined by the type of coding and by the scanning device used to read the coding. Thus, for example, by applying a code in multiple tracks or by a finer pitch, the angular resolution is increased, the achievable resolution is limited for manufacturing and cost reasons. For reading the code, e.g. Arrangements of one or more detectors known. CCD line arrays or CCD area arrays are suitable as such detectors.

The coding must be suitable for machine readability. The code elements are also to be regarded as digits of the code, comparable to the digits of a number in the decimal system.

The code elements may have various physically distinguishable states, for example, transparent and absorbent, whereby they are suitable for a technically simple automatic reading. In the case of two physically distinguishable states, there is a binary code, in the case of three distinguishable states, a ternary code, etc. In general terms, a code element of a code may have a number p of distinguishably readable states.

[0010] In this case, due to the uniqueness of a result of the reading of r consecutive code elements of the code track by a scanning device, a sequence of r code elements along the entire code track may not be repeated due to the unambiguousness of a result.

From the prior art (eg EP-A-0 352 565) is known that code tracks that meet these requirements, for example, according to the theory of primitive polynomials from a sequence of numbers using feedback shift registers with a memory number r of Store which p different memory values according to the physically distinguishable. States of the code elements may have generated. This will be explained in more detail below with reference to examples. The uniqueness of each succession of r code elements along the code track is, as the number theory proves, guaranteed in this way.

For the production of a code with the required uniqueness of each succession of r code elements along the code track so a suitable sequence must be determined, from which the code can be mapped.

From the prior art for the production of machine-readable codes maximum sequences are known as suitable consequences, which are generated from calculations in the extended Galois field Gf (pr). Where p is a prime number and r is a natural number. Such maximal sequences are well known in the literature.

Maximum sequences have the property that r consecutive positions in the sequence do not repeat. Excluding the zero element, such a maximum sequence has the length p <r> -1, where all combinations of the r positions except for the 0 sequence occur (see, for example, for p = 2: S. Müller: "Digitale Signalverarbeitung for Loudspeakers »Dissertation, p. 140, University of Bonn 1999).

Usually maximum sequences are determined with the aid of the aforementioned "primitive polynomials".

A primitive polynomial is a polynomial that generates all elements of an extension field from a base field. Primitive polynomials are also non-reducible polynomials. This means that they are divisible only by themselves or by one.

For p = 3 and p = 5, for example, the polynomials and sequences shown in FIG. 1 are known with a degree r = 2 of the polynomial.

State of the art is the use of maximum sequences for p = 2 for position determination (WO 1990/005 414, DE 19 532 903 A1, DE 3 739 664 C3, DE 3 942 625 A1).

For the degree r <= 4, for example, the polynomials and sequences shown in Fig. 2 are known.

On the basis of a section of the sequence with length n≥r the position within the sequence can be determined uniquely. Therefore, such sequences are used for position determination.

Maximum sequences in the Galois field Gf (2 <r>) have possible (fixed, discrete) lengths of: 2 <r> -1 = 1, 3, 7, 15, 31, 63, 127, 255, 511, 1023, 2047, 4095, 8181, ...

It is known from mathematics that every polynomial in the Gf (p <r>) generates a sequence. Primitive polynomials produce sequences of maximum length, other polynomials produce shorter sequences. The term, maximum length refers to the calculation in the extended Galois field. It's obvious that the episode could actually be an element longer, namely the length p <r> <> could have. Then the zero element would be part de: consequence. However, this is not possible with calculations in the Galois field.

In some applications, however, other sequence lengths are desirable in order to realize an optimal solution under the given physical boundary conditions. Depending on the application, for example, a sequence length of 360 is optimal for a 1 ° graduation of a circle. According to the state of the art, however, the closest "maximum sequence with r = 9 digits and a length of 51" is selected for this purpose. The determination of the position in the form of a 1 ° -degree resolution is calculated from this, for example by interpolation.

An object of the invention is to provide a method of manufacturing an improved code carrier having a code element sequence as an absolute code with a predetermined resolution A.

It should be optimized as a special task, the division number m of the code for each application for divisions of any number m = 1 / A.

These objects are achieved according to the invention by the features of the first independent claim.

This is a method of manufacturing a code carrier having a code element sequence as an absolute code with a predetermined resolution A. The code is suitable for reading r consecutive code elements as locations of the code by a detection element, wherein the r consecutive code elements do not repeat over the entire code element sequence.

The production process according to the invention comprises: The determination of a division number m = 1 / A of divisions of the code to reach the given resolution. Determining a sequence of length n to represent the divisions m of the code. The sequence has the general form pr - b, where p, r and b are natural numbers, and p corresponds to the number of physically distinguishable states of the code elements. P does not have to be a prime number. At the same time, the exponent of the sequence is determined as its required number of digits r, which corresponds to the r successive digits of the code that can be read for a detection element.

According to the invention, the sequence of length n is generated from a polynomial of degree r by means of a circuit arrangement according to the invention with r memories each containing a memory value and q <r taps from the memories to an assignment table. The allocation table is designed in such a way that, following a defined link, a feedback signal is generated to an input of the circuit arrangement for changing stored values in accordance with the specified link.

The term "memory" is used synonymously with the term "register". In addition, a "memory value" is to be regarded as synonymous with a "register content". The possible values of a single memory correspond to the possible distinguishably readable states of a code element.

The aforementioned memories may be based on any storage medium, e.g. mechanically for a mechanical readout (e.g., punched card, punched tape) or optical readout (e.g., laser disk, CD-ROM, DVD-ROM, etc.), electronically in integrated circuits in the form of volatile memories (eg DRAM or SRAM, circuits in the form of flip-flops) or permanent memories (eg ROM or PROM) or semi-permanent memories (eg EPROM, EEPROM) magnetic on non-rotating media (eg magnetic tape, magnetic card or compact cassette) or rotating storage media (eg floppy disk) optically (e.g., CD, DVD).

An assignment table or lookup table (LUT) is a data structure that contains precalculated data from a link. Using such a table, it is possible to simplify complex calculations to the generally much faster value search within a data field. By using lookup tables, computational effort is replaced by memory overhead.

The values of a function are determined in advance and stored in memory as a table. Thus, the LUT method is similar to the use of a table such as e.g. a interest rate table or a blackboard. In digital circuit technology when implemented on e.g. FPGAs (Field Programmable Gate Arrays) are also very simple function like logical equations (AND, OR, XOR) replaced by a LUT.

The inventive method further comprises: The determination of the absolute code in which r consecutive code elements do not repeat over the entire code element sequence, using the r-th degree polynomial. The sequence length n <pr. Applying the code element sequence as absolute code to the code carrier.

An important characteristic of the method according to the invention is that the length n of the sequence is equal to the number m of the divisions of the code.

The method according to the invention is advantageously characterized in that - in contrast to methods based on the use of classical maximum sequences in the Galois field - code carriers with code tracks with arbitrary and not limited by powers of 2 divisions, corresponding to any desired Resolution, can be generated. As a result, equipped with such code carriers devices such as angle encoders can be simplified and improved in their accuracy. This improvement is based on the provision of sequences for representing the code, which have an optimal, any length adapted to the application-specific optimal resolution. This is made possible by the interaction of an optimized for the inventive method circuit with r each have a memory value corresponding to a state of the bodies or code elements containing memories with an assignment table over q taps, where q is less than or equal to the number r of the memory. An essential aspect is furthermore, in connection with the allocation table, a corresponding choice of initial values of the memory contents.

The interaction of the circuit arrangement, assignment table and selection of suitable initial values of the memory contents will be explained in more detail with reference to the following examples.

The inventive method is particularly suitable for generating a code track on a code carrier for a position, linear or rotary encoder.

Preferred embodiments of the inventive method are specified in the dependent claims.

The invention also relates to a code carrier with an absolutely coded code with m divisions according to a predetermined resolution A = 1 / m and prepared with the inventive method and a position, linear or angle encoder with an inventive code carrier.

In addition, the invention comprises a circuit arrangement with r memories each containing a memory value, an allocation table and q ≤ r taps from the memories to an allocation table. In this case, the circuit arrangement for generating a sequence p <-r> -b with a length n = m from an rth-order polynomial for producing a code carrier having an absolutely-coded code with m pitches is determined in the production method according to the invention. The circuit arrangement according to the invention is characterized in that the allocation table is designed in such a way that, following a defined link, a feedback signal is generated to an input of the circuit arrangement for changing memory values in accordance with the specified link. According to the invention, the assignment table, the taps and initial values of the memory elements are selected such that the length n of the sequence is equal to the number m of the divisions of the code.

Further, it is possible to reverse the education law of the series. Instead of coupling the feedback signal to the input, it is coupled in at the output with the reverse education law. As a result, the state on the left and the state on the right can be determined on the basis of a state. This is similar to incrementing and decrementing a counter.

The invention also includes a method for error control, in particular for quality assurance of a code carrier produced by the method according to the invention, i. E. an error control of the applied code track consisting of the code elements. Such error control, both for quality control and over the time of use, is required; because a worn code can replace over time, for example, by mechanical damage or contaminants such as settled dust. Optionally, even in the presence of defects (such as missing code elements), measurements such as single or length measurements can still be made with the code carrier; however, such flaws must at least be known, since they have at least a diminishing effect on the accuracy, so that it must be possible to determine when a code carrier is no longer usable and, at least without appropriate troubleshooting, may no longer be used.

According to the method of error control according to the invention, a sequence of code elements applied to the code carrier is read with a detection element, and errors in this sequence of code elements applied to the code carrier are determined by comparison with the absolute code determined in the inventive production method. For this purpose, for example, a certain number of successive code elements, such as 10, are read, which correspond to a predetermined code element sequence. Then, the succeeding elements of the code element sequence are determined by the code of formation of the code, and compared with the corresponding code line code elements actually present on the code carrier, and failing according to errors.

The production method according to the invention is described in more detail below purely by way of example with reference to concrete exemplary embodiments shown schematically in the drawings, with further advantages of the invention also being discussed. <Tb> FIG. 1 <sep> shows some primitive polynomials of degree r = 2 and their consequences for p> 2. shows some primitive polynomials and their sequences in the Galois field Gf (2 <r> <Tb> FIG. 2 <sep>). <Tb> FIG. FIG. 3 shows a circuit arrangement according to the prior art for calculating sequences in the Galois field. <Tb> FIG. 4 <sep> shows a circuit arrangement according to the invention for calculating generalized sequences. <Tb> FIG. FIG. 5 shows, by way of example, a circuit arrangement according to the invention with three memories for calculating a sequence of length 6. <Tb> FIG. 6 shows, by way of example, an inventive circuit arrangement with four memories for calculating a sequence of length 9. <Tb> FIG. 7 <sep> shows in tabular form provisions for the inventive production of code carriers with up to 1030 divisions.

The invention is based on an extension, based on the law of formation of a sequence of polynomial in the extended Galois field. FIG. 3 shows a circuit arrangement according to the prior art for calculating the binary sequences in the Galois field (Gf (2r)) in FIG. 2.

In Fig. 3, the associated polynomial is on the left. In this case, these are primitive polynomials that are divisible only by themselves or by 1. Right next to it, the circuit arrangement is shown, with which the associated sequence is calculated. The boxes with the letter, "T" are memory. They delay the input signal by one clock. The circles with plus signs represent exclusive-or-operators (XOR). Above the memories is the respective initial state. For each first memory it is «1», for all others «0»

Each memory taken together give the binary number associated with the position. This is shifted one place to the right in each measure, and the added most significant bit is an exclusive OR of some bits of the previous number. In another embodiment is pushed to the left and the least significant bit is added.

FIG. 4 shows a circuit arrangement according to the invention for calculating generalized sequences.

The large rectangle with the letters 'LUT' symbolizes a look-up table for mapping the inputs to the output. This means that using the LUT of a fixed link, a feedback signal is generated to an input of the memory change memory arrangement according to the specified link.

With this circuit arrangement, sequences of any periodicity can be calculated. Not all digits of the previous number have to be used. In an advantageous embodiment, for example, as few places are used. It is advantageous if the allocation table is designed in such a way that the sequence of the length n is generated with the least possible number of taps. This minimizes the complexity of the 'LUT'. With the aid of the circuit arrangement according to the invention, the same consequences as in the calculations can be calculated with the aid of polynomials in the extended Galois field. In this case, in the case of p = 2, the LUT just corresponds to the exclusive-OR operations as shown in Fig. 3d, for example. For p> 2, the LUT just corresponds to the corresponding residual class calculation according to a modulo function. The modulo function or residual class calculation is known from the specialist literature. In addition, however, other links can be made. For example, in the binary case (p = 2) «And», «Or» or «Not».

In addition, the sequence is no longer limited to the fact that "p" is a prime number. Extended episodes have a maximum length of p <r> <> where "p" is a natural number and "r" is the number of memories.

Apart from the sequence length, the ratio of the elements can be changed at lengths smaller than pr. In other words, this means that the storage values indicate elements of a base of the sequence and a ratio of frequencies of different storage values can be determined by selecting the link by the allocation table LUT and setting initial values of the storage values.

For p = 2 this corresponds to the ratio of the number of zeros and ones. Considering this degree of freedom, a better system optimization solution can be achieved, depending on the physical constraints of the system under which the sequence is used.

By means of a sequence according to this invention, the position can be determined on a straight line or any other shaped line, in particular a circle. This can be used, for example, for length or angle measurement and, of course, their possibly multiple derivatives over time. Alternatively, the position can also be measured in time. This can also be used for a length or angle measurement.

According to the invention, sequences of any desired length, that is, for example, 360, can therefore be generated for the desired resolution described above with a 1 ° division of a circle. The sequence thus has a length which corresponds to the application-specific optimum resolution, whereby the evaluation is simplified and the accuracy is increased.

Also advantageous are the properties of such sequences according to the present invention. Some can be disabled, for binary sequences, for example, by setting their state to "0 ... 0" or "1 ... 1". Others have several cycles to switch between. Still others oscillate from any state of the initial values into the sequence and are therefore tolerant to errors.

Fig. 7 shows in tabular form for p = 2 regulations for the inventive production of code carriers with up to 1030 divisions. In the first column, the desired length n of the sequence, which equals the desired number m of divisions of the code (n = m), is indicated. In the second column, the degree r of the polynomial is given according to the number of memories. In the third column, the linking rule of the assignment table LUT is shown. The fourth column shows which stores are being tapped to the allocation table. In the fifth column, the initial values of the memories to be set are indicated. The value "init" is the total of the memories in decimal form, eg. init = 3 = 2 <1> + 2 <0>.

In the context of FIG. 5 and FIG. 6, it is explained below how the instructions according to the table FIG. 7 as well as the links and set initial values of the memories specified in the assignment table LÜT are to be converted to produce a sequence of desired length.

5 shows by way of example a circuit arrangement according to the invention with three memories for calculating a sequence of length 6, corresponding to the following line of the table from FIG. 5: Length = 6 r = 3 LUT = 01 Taps = 0 init = 0

The circuit arrangement, which can also be referred to as a "generator" of the associated sequence, consists of 3 memories, of which the 0-th is tapped and an assignment table LUT with 21 entries is supplied. Initially, the memories or registers are initialized with the value 0 = 0002. The index 2 identifies the number in the 2-system.

The assignment table assigns the following values to the input: <Tb> In0 <sep> LUT <Tb> 0 <sep> 1 <Tb> 1 <sep> 0

This corresponds to an inverter. This education law corresponds to the well-known "Johnson Counter". Starting at the initial value, the following register contents are obtained: 000 100 110 111 011 001

After further steps, the register contents would repeat. The sequence therefore has the length 6.

The second example according to FIG. 6 illustrates by way of example a circuit arrangement according to the invention with four memories or registers for calculating a sequence of length 9 and explains the following line of the table from FIG. 7: Length = 9 r = 4 LUT = 01101010 Taps = 2,1,0 init = 3

This is the rule for forming a sequence of length 9. The circuit arrangement for this sequence consists of 4 memories or registers, of which the 0th, 1st and 2nd tapped and the assignment table with 2 <3> Entries are supplied. At the beginning, the registers are initialized with the value 3 = 00112.

The assignment table assigns the following values to the input: <Tb> In210 <sep> LUT <Tb> 000 <sep> 0 <Tb> 001 <sep> 1 <Tb> 010 <sep> 0 <Tb> 011 <sep> 1 <Tb> 100 <sep> 0 <Tb> 101 <sep> 1 <Tb> 110 <sep> 1 <Tb> 111 <sep> 0

Starting at the initial value, the following register contents are obtained: 0011 1001 1100 0110 1011 1101 1110 1111 0111

After further steps, the register contents would repeat. So the result is 9.

To produce a sequence of length 36 °, for example, for a 1 ° division of a circle, the following rules are suitable: Length = 360 r = 9 LUT = 0101011010011010 Taps = 4,3,1,0 init = 3 and Length = 360 r = 9 LUT = 1001101001100101 Taps = 4,3,1,0 init = 0

It is understood that the illustrated figures are only examples of possible embodiments of the invention.

Claims (11)

Method for producing a code carrier having a code element sequence as an absolute code with a predetermined resolution A, suitable for reading r consecutive code elements by a detection element, wherein the r consecutive code elements do not repeat over the entire code element sequence, comprising: Determining a division number <m = 1 / A> of divisions of the code, corresponding to the desired resolution A, Determining a digit number r of locations of a string <p <r> -b> of length n representing the pitches m, where p, r and b are natural numbers, Determining the absolute code where <n <p <r >>, Applying the code element sequence as absolute code to the code carrier, characterized, that the sequence of length n is generated by means of a circuit arrangement with r stores each containing a memory value and <q ≤ r> taps from the memories to a mapping table, which mapping table is designed such that following a specified link a feedback signal to a Input of the circuit arrangement for changing memory values is generated according to the specified link, and - That the allocation table, the taps and initial values of the memory elements are chosen such that the length n of the sequence is equal to the number m of the divisions of the code. 2. The method according to claim 1, characterized in that the link is selected from the group formed by the links <Exclusive-Or> XOR, <AND>, <OR>, <NOT>. 3. Method according to one of the preceding claims, characterized in that - that the code contains a null element, that the sequence is determined on the basis of a primitive polynomial, that the possible values of a single memory correspond to the possible distinguishably readable states of a code element or a position of the code, - That in each of the r memory an initial value is set, and / or - That the allocation table is designed such that the sequence of length n is generated with a minimum number of taps. 4. The method according to any one of the preceding claims, characterized in that p is equal to the number of distinguishable readable states of a code element or a position of the code, in particular where p is a prime number, in particular where p = 2. 5. The method according to any one of the preceding claims, characterized in that the memory values indicate elements of a base of the sequence and a ratio of frequencies of different memory values by selecting the link through the allocation table and setting initial values of the memory values can be determined. 6. The method according to any one of the preceding claims, characterized in that the allocation table and the initial values of the memory values are selected such that the sequence is switchable between a plurality of cycles. 7. The method according to any one of the preceding claims, characterized in that the allocation table is designed so that of an arbitrary state of the initial values, the sequence settles into a cycle. 8. code carrier with an absolutely coded code with m divisions corresponding to a desired resolution <A = 1/m> and produced by a method according to one of claims 1 to 7. 9. position, linear or angle encoders with a code carrier according to claim 8. 10. Circuit arrangement with r stores each containing a memory value, an allocation table and <q ≤ r> taps from the memories to an allocation table, the circuit arrangement for generating a sequence <p <r> -b> with a length <n = m> is determined from an r-th degree polynomial for producing a code carrier having an absolute-coded code with m pitches in a manufacturing method according to one of claims 1 to 7, characterized in that the assignment table is designed such that following a predetermined link a feedback signal is generated to an input of the circuit arrangement for changing memory values according to the fixed link, and that the allocation table, the taps and initial values of the memory elements are selected such that the length n of the sequence is equal to the number m of the divisions of the code. 11. A method for error control of a code carrier produced by a method according to any one of claims 1 to 7, characterized in that a code applied to the code sequence of code elements read with the detection element and errors in this applied to the code carrier sequence of code elements by comparison with the determined in a manufacturing method according to one of claims 1 to 7 determined absolute code.