CH690978A5 - Circuit de multiplexage. - Google Patents
Circuit de multiplexage. Download PDFInfo
- Publication number
- CH690978A5 CH690978A5 CH6896A CH6896A CH690978A5 CH 690978 A5 CH690978 A5 CH 690978A5 CH 6896 A CH6896 A CH 6896A CH 6896 A CH6896 A CH 6896A CH 690978 A5 CH690978 A5 CH 690978A5
- Authority
- CH
- Switzerland
- Prior art keywords
- data
- multiplexer
- stage
- control signals
- switches
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/004—Counters counting in a non-natural counting order, e.g. random counters
- H03K23/005—Counters counting in a non-natural counting order, e.g. random counters using minimum change code, e.g. Gray Code
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/04—Distributors combined with modulators or demodulators
- H04J3/047—Distributors with transistors or integrated circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Theoretical Computer Science (AREA)
- Time-Division Multiplex Systems (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR9500365A FR2729528A1 (fr) | 1995-01-13 | 1995-01-13 | Circuit de multiplexage |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH690978A5 true CH690978A5 (fr) | 2001-03-15 |
Family
ID=9475117
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH6896A CH690978A5 (fr) | 1995-01-13 | 1996-01-10 | Circuit de multiplexage. |
Country Status (2)
| Country | Link |
|---|---|
| CH (1) | CH690978A5 (enrdf_load_stackoverflow) |
| FR (1) | FR2729528A1 (enrdf_load_stackoverflow) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6420988B1 (en) | 1998-12-03 | 2002-07-16 | Semiconductor Energy Laboratory Co., Ltd. | Digital analog converter and electronic device using the same |
| TW468269B (en) | 1999-01-28 | 2001-12-11 | Semiconductor Energy Lab | Serial-to-parallel conversion circuit, and semiconductor display device employing the same |
| US6529040B1 (en) * | 2000-05-05 | 2003-03-04 | Xilinx, Inc. | FPGA lookup table with speed read decoder |
| US6760772B2 (en) | 2000-12-15 | 2004-07-06 | Qualcomm, Inc. | Generating and implementing a communication protocol and interface for high data rate signal transfer |
| US8812706B1 (en) | 2001-09-06 | 2014-08-19 | Qualcomm Incorporated | Method and apparatus for compensating for mismatched delays in signals of a mobile display interface (MDDI) system |
| CN101938493B (zh) | 2003-06-02 | 2013-10-16 | 高通股份有限公司 | 生成并实施一用于更高数据率的讯号协议和接口 |
| KR101178080B1 (ko) | 2003-08-13 | 2012-08-30 | 퀄컴 인코포레이티드 | 더 높은 데이터 레이트를 위한 신호 인터페이스 |
| CN101764804A (zh) | 2003-09-10 | 2010-06-30 | 高通股份有限公司 | 高数据速率接口 |
| JP2007509533A (ja) | 2003-10-15 | 2007-04-12 | クゥアルコム・インコーポレイテッド | 高速データレートインタフェース |
| CN101827074B (zh) | 2003-10-29 | 2013-07-31 | 高通股份有限公司 | 高数据速率接口 |
| KR20060108709A (ko) | 2003-11-12 | 2006-10-18 | 콸콤 인코포레이티드 | 향상된 링크 제어를 제공하는 고속 데이터 레이트인터페이스 |
| KR20060096161A (ko) | 2003-11-25 | 2006-09-07 | 콸콤 인코포레이티드 | 향상된 링크 동기화를 제공하는 고속 데이터 레이트인터페이스 |
| EP2247071B1 (en) | 2003-12-08 | 2013-09-25 | QUALCOMM Incorporated | High data rate interface with improved link synchronization |
| MXPA06010312A (es) | 2004-03-10 | 2007-01-19 | Qualcomm Inc | Aparato y metodo de interfaz de velocidad de datos elevada. |
| BRPI0508923A (pt) | 2004-03-17 | 2007-08-14 | Qualcomm Inc | equipamento e método de interface de alta taxa de dados |
| US8650304B2 (en) | 2004-06-04 | 2014-02-11 | Qualcomm Incorporated | Determining a pre skew and post skew calibration data rate in a mobile display digital interface (MDDI) communication system |
| CA2569106C (en) | 2004-06-04 | 2013-05-21 | Qualcomm Incorporated | High data rate interface apparatus and method |
| US8692838B2 (en) | 2004-11-24 | 2014-04-08 | Qualcomm Incorporated | Methods and systems for updating a buffer |
| US8699330B2 (en) | 2004-11-24 | 2014-04-15 | Qualcomm Incorporated | Systems and methods for digital data transmission rate control |
| US8873584B2 (en) | 2004-11-24 | 2014-10-28 | Qualcomm Incorporated | Digital data interface device |
| US8667363B2 (en) | 2004-11-24 | 2014-03-04 | Qualcomm Incorporated | Systems and methods for implementing cyclic redundancy checks |
| US8723705B2 (en) | 2004-11-24 | 2014-05-13 | Qualcomm Incorporated | Low output skew double data rate serial encoder |
| US8539119B2 (en) | 2004-11-24 | 2013-09-17 | Qualcomm Incorporated | Methods and apparatus for exchanging messages having a digital data interface device message format |
| CA2588702C (en) * | 2004-11-24 | 2012-01-03 | Qualcomm Incorporated | Methods and systems for synchronous execution of commands across a communication link |
| US8730069B2 (en) | 2005-11-23 | 2014-05-20 | Qualcomm Incorporated | Double data rate serial encoder |
| US8692839B2 (en) | 2005-11-23 | 2014-04-08 | Qualcomm Incorporated | Methods and systems for updating a buffer |
| US8044833B2 (en) * | 2009-01-16 | 2011-10-25 | Raytheon Company | High speed serializer |
| US8405426B2 (en) * | 2010-05-28 | 2013-03-26 | Qualcomm Incorporated | Method and apparatus to serialize parallel data input values |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5111455A (en) * | 1990-08-24 | 1992-05-05 | Avantek, Inc. | Interleaved time-division multiplexor with phase-compensated frequency doublers |
-
1995
- 1995-01-13 FR FR9500365A patent/FR2729528A1/fr active Granted
-
1996
- 1996-01-10 CH CH6896A patent/CH690978A5/fr not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| FR2729528A1 (fr) | 1996-07-19 |
| FR2729528B1 (enrdf_load_stackoverflow) | 1997-03-07 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PL | Patent ceased |