CH597691A5 - - Google Patents
Info
- Publication number
- CH597691A5 CH597691A5 CH1320176A CH1320176A CH597691A5 CH 597691 A5 CH597691 A5 CH 597691A5 CH 1320176 A CH1320176 A CH 1320176A CH 1320176 A CH1320176 A CH 1320176A CH 597691 A5 CH597691 A5 CH 597691A5
- Authority
- CH
- Switzerland
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76245—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using full isolation by porous oxide silicon, i.e. FIPOS techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/003—Anneal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/118—Oxide films
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Formation Of Insulating Films (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/636,243 US4016017A (en) | 1975-11-28 | 1975-11-28 | Integrated circuit isolation structure and method for producing the isolation structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH597691A5 true CH597691A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1978-04-14 |
Family
ID=24551058
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH1320176A CH597691A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1975-11-28 | 1976-10-19 |
Country Status (15)
Families Citing this family (31)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6121112A (en) * | 1905-08-29 | 2000-09-19 | Canon Kabushiki Kaisha | Fabrication method for semiconductor substrate |
| GB2038548B (en) * | 1978-10-27 | 1983-03-23 | Nippon Telegraph & Telephone | Isolating semiconductor device by porous silicon oxide |
| FR2472268A1 (fr) * | 1979-12-21 | 1981-06-26 | Thomson Csf | Procede de formation de caisson dans des circuits integres |
| DE3170644D1 (en) * | 1980-11-29 | 1985-06-27 | Toshiba Kk | Method of filling a groove in a semiconductor substrate |
| US4532700A (en) * | 1984-04-27 | 1985-08-06 | International Business Machines Corporation | Method of manufacturing semiconductor structures having an oxidized porous silicon isolation layer |
| US4628591A (en) * | 1984-10-31 | 1986-12-16 | Texas Instruments Incorporated | Method for obtaining full oxide isolation of epitaxial islands in silicon utilizing selective oxidation of porous silicon |
| US4627883A (en) * | 1985-04-01 | 1986-12-09 | Gte Laboratories Incorporated | Method of forming an isolated semiconductor structure |
| US4665010A (en) * | 1985-04-29 | 1987-05-12 | International Business Machines Corporation | Method of fabricating photopolymer isolation trenches in the surface of a semiconductor wafer |
| GB2210728B (en) * | 1987-10-07 | 1991-11-13 | Stc Plc | Isolation trenches for semiconductors |
| US4910165A (en) * | 1988-11-04 | 1990-03-20 | Ncr Corporation | Method for forming epitaxial silicon on insulator structures using oxidized porous silicon |
| US5023200A (en) * | 1988-11-22 | 1991-06-11 | The United States Of America As Represented By The United States Department Of Energy | Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies |
| US5110755A (en) * | 1990-01-04 | 1992-05-05 | Westinghouse Electric Corp. | Process for forming a component insulator on a silicon substrate |
| JPH04120732A (ja) * | 1990-09-12 | 1992-04-21 | Hitachi Ltd | 固体素子及びその製造方法 |
| US5217920A (en) * | 1992-06-18 | 1993-06-08 | Motorola, Inc. | Method of forming substrate contact trenches and isolation trenches using anodization for isolation |
| JP2945221B2 (ja) * | 1992-11-19 | 1999-09-06 | ワイケイケイ株式会社 | 高靭性アルミナ系複合焼結体の製造方法 |
| US5421958A (en) * | 1993-06-07 | 1995-06-06 | The United States Of America As Represented By The Administrator Of The United States National Aeronautics And Space Administration | Selective formation of porous silicon |
| US5707888A (en) * | 1995-05-04 | 1998-01-13 | Lsi Logic Corporation | Oxide formed in semiconductor substrate by implantation of substrate with a noble gas prior to oxidation |
| US5863826A (en) * | 1996-08-02 | 1999-01-26 | Micron Technology, Inc. | CMOS isolation utilizing enhanced oxidation of recessed porous silicon formed by light ion implantation |
| US5877069A (en) * | 1996-09-16 | 1999-03-02 | Micron Technology, Inc. | Method for electrochemical local oxidation of silicon |
| FR2766012B1 (fr) * | 1997-07-08 | 2001-01-19 | France Telecom | Procede de minimisation de l'effet de coin par densification de la couche isolante |
| DE19810825A1 (de) * | 1998-03-12 | 1999-09-16 | Siemens Ag | Integrierte elektronische Schaltungsanordnung und Verfahren zu ihrer Herstellung |
| US6710538B1 (en) | 1998-08-26 | 2004-03-23 | Micron Technology, Inc. | Field emission display having reduced power requirements and method |
| US6387777B1 (en) | 1998-09-02 | 2002-05-14 | Kelly T. Hurley | Variable temperature LOCOS process |
| US5950094A (en) * | 1999-02-18 | 1999-09-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for fabricating fully dielectric isolated silicon (FDIS) |
| US6277662B1 (en) * | 1999-06-03 | 2001-08-21 | Seiichi Nagata | Silicon substrate and forming method thereof |
| US6312581B1 (en) * | 1999-11-30 | 2001-11-06 | Agere Systems Optoelectronics Guardian Corp. | Process for fabricating an optical device |
| US6348706B1 (en) * | 2000-03-20 | 2002-02-19 | Micron Technology, Inc. | Method to form etch and/or CMP stop layers |
| DE10065026A1 (de) * | 2000-12-23 | 2002-07-04 | Bosch Gmbh Robert | Mikromechanisches Bauelement und entsprechendes Herstellungsverfahren |
| TW556311B (en) * | 2001-07-31 | 2003-10-01 | Infineon Technologies Ag | Method for filling trenches in integrated semiconductor circuits |
| US7465642B2 (en) * | 2005-10-28 | 2008-12-16 | International Business Machines Corporation | Methods for forming semiconductor structures with buried isolation collars |
| FR3011124A1 (fr) * | 2013-09-26 | 2015-03-27 | St Microelectronics Tours Sas | Composant scr a caracteristiques stables en temperature |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4919030B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1969-01-29 | 1974-05-14 | ||
| US3640806A (en) * | 1970-01-05 | 1972-02-08 | Nippon Telegraph & Telephone | Semiconductor device and method of producing the same |
| US3919060A (en) * | 1974-06-14 | 1975-11-11 | Ibm | Method of fabricating semiconductor device embodying dielectric isolation |
-
1975
- 1975-11-28 US US05/636,243 patent/US4016017A/en not_active Expired - Lifetime
-
1976
- 1976-09-30 FR FR7629973A patent/FR2333349A1/fr active Granted
- 1976-10-12 BE BE171427A patent/BE847183A/xx not_active IP Right Cessation
- 1976-10-13 GB GB42466/76A patent/GB1497499A/en not_active Expired
- 1976-10-14 ZA ZA00766145A patent/ZA766145B/xx unknown
- 1976-10-19 CH CH1320176A patent/CH597691A5/xx not_active IP Right Cessation
- 1976-10-28 NL NL7611938A patent/NL7611938A/xx not_active Application Discontinuation
- 1976-10-29 IT IT28845/76A patent/IT1072608B/it active
- 1976-11-02 JP JP51131341A patent/JPS5267582A/ja active Granted
- 1976-11-17 DE DE2652294A patent/DE2652294C2/de not_active Expired
- 1976-11-24 ES ES453591A patent/ES453591A1/es not_active Expired
- 1976-11-26 SE SE7613281A patent/SE407719B/xx unknown
- 1976-11-29 CA CA266,780A patent/CA1066815A/en not_active Expired
- 1976-11-29 BR BR7607985A patent/BR7607985A/pt unknown
- 1976-12-06 AU AU20291/76A patent/AU498236B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| AU498236B2 (en) | 1979-02-22 |
| US4016017A (en) | 1977-04-05 |
| DE2652294C2 (de) | 1983-08-18 |
| SE7613281L (sv) | 1977-05-29 |
| IT1072608B (it) | 1985-04-10 |
| GB1497499A (en) | 1978-01-12 |
| SE407719B (sv) | 1979-04-09 |
| JPS5267582A (en) | 1977-06-04 |
| DE2652294A1 (de) | 1977-10-13 |
| FR2333349A1 (fr) | 1977-06-24 |
| BR7607985A (pt) | 1977-11-08 |
| JPS5751939B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1982-11-05 |
| BE847183A (fr) | 1977-01-31 |
| FR2333349B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1980-04-30 |
| CA1066815A (en) | 1979-11-20 |
| ZA766145B (en) | 1978-05-30 |
| ES453591A1 (es) | 1977-12-01 |
| AU2029176A (en) | 1978-06-15 |
| NL7611938A (nl) | 1977-06-01 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PL | Patent ceased | ||
| PL | Patent ceased |