CH560463A5 - - Google Patents

Info

Publication number
CH560463A5
CH560463A5 CH1098873A CH1098873A CH560463A5 CH 560463 A5 CH560463 A5 CH 560463A5 CH 1098873 A CH1098873 A CH 1098873A CH 1098873 A CH1098873 A CH 1098873A CH 560463 A5 CH560463 A5 CH 560463A5
Authority
CH
Switzerland
Application number
CH1098873A
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19722247183 external-priority patent/DE2247183C3/de
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH560463A5 publication Critical patent/CH560463A5/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0727Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
    • H01L27/0738Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors in combination with resistors only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CH1098873A 1972-09-26 1973-07-27 CH560463A5 (ro)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19722247183 DE2247183C3 (de) 1972-09-26 Verfahren zur Herstellung von Schaltungen mit wenigstens einem Feldeffekttransistor mit einer Source-, einer Drain- und einer Gateelektrode und mit mindestens einem ohmschen > Schichtwiderstand auf einem gemeinsamen Substrat

Publications (1)

Publication Number Publication Date
CH560463A5 true CH560463A5 (ro) 1975-03-27

Family

ID=5857423

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1098873A CH560463A5 (ro) 1972-09-26 1973-07-27

Country Status (11)

Country Link
US (1) US3889358A (ro)
JP (1) JPS4973086A (ro)
BE (1) BE805346A (ro)
CA (1) CA1004373A (ro)
CH (1) CH560463A5 (ro)
FR (1) FR2200624B1 (ro)
GB (1) GB1447236A (ro)
IT (1) IT993410B (ro)
LU (1) LU68478A1 (ro)
NL (1) NL7313070A (ro)
SE (1) SE390085B (ro)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5138990A (en) * 1974-09-30 1976-03-31 Suwa Seikosha Kk Handotaisochino seizohoho
JPS51103780A (ja) * 1975-03-10 1976-09-13 Tokyo Shibaura Electric Co Handotaisoshi
JPS5267532A (en) * 1975-12-03 1977-06-04 Nippon Telegr & Teleph Corp <Ntt> Semiconductor memory unit
US4295264A (en) * 1975-12-29 1981-10-20 Texas Instruments Incorporated Method of making integrated circuit MOS capacitor using implanted region to change threshold
US4212083A (en) * 1976-05-28 1980-07-08 Texas Instruments Incorporated MOS Integrated with implanted resistor elements
US4246692A (en) * 1976-05-28 1981-01-27 Texas Instruments Incorporated MOS Integrated circuits with implanted resistor elements
US4114255A (en) * 1976-08-16 1978-09-19 Intel Corporation Floating gate storage device and method of fabrication
US4187602A (en) * 1976-12-27 1980-02-12 Texas Instruments Incorporated Static memory cell using field implanted resistance
US4228451A (en) * 1978-07-21 1980-10-14 Monolithic Memories, Inc. High resistivity semiconductor resistor device
US4212684A (en) * 1978-11-20 1980-07-15 Ncr Corporation CISFET Processing including simultaneous doping of silicon components and FET channels
US4210465A (en) * 1978-11-20 1980-07-01 Ncr Corporation CISFET Processing including simultaneous implantation of spaced polycrystalline silicon regions and non-memory FET channel
US4468857A (en) * 1983-06-27 1984-09-04 Teletype Corporation Method of manufacturing an integrated circuit device
US4485553A (en) * 1983-06-27 1984-12-04 Teletype Corporation Method for manufacturing an integrated circuit device
US4472875A (en) * 1983-06-27 1984-09-25 Teletype Corporation Method for manufacturing an integrated circuit device
JPS6097659A (ja) * 1983-11-01 1985-05-31 Matsushita Electronics Corp 半導体集積回路
JPS61113269A (ja) * 1984-11-08 1986-05-31 Rohm Co Ltd 半導体装置
KR940005293B1 (ko) * 1991-05-23 1994-06-15 삼성전자 주식회사 게이트와 드레인이 중첩된 모오스 트랜지스터의 제조방법 및 그 구조
JP2919379B2 (ja) * 1996-08-29 1999-07-12 九州日本電気株式会社 半導体装置およびその製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL6713666A (ro) * 1967-10-07 1969-04-09
US3655457A (en) * 1968-08-06 1972-04-11 Ibm Method of making or modifying a pn-junction by ion implantation
US3679492A (en) * 1970-03-23 1972-07-25 Ibm Process for making mosfet's
US3789504A (en) * 1971-10-12 1974-02-05 Gte Laboratories Inc Method of manufacturing an n-channel mos field-effect transistor

Also Published As

Publication number Publication date
BE805346A (fr) 1974-01-16
FR2200624B1 (ro) 1977-09-09
SE390085B (sv) 1976-11-29
JPS4973086A (ro) 1974-07-15
LU68478A1 (ro) 1973-12-07
DE2247183B2 (de) 1977-02-10
FR2200624A1 (ro) 1974-04-19
US3889358A (en) 1975-06-17
IT993410B (it) 1975-09-30
CA1004373A (en) 1977-01-25
DE2247183A1 (de) 1974-04-25
GB1447236A (en) 1976-08-25
NL7313070A (ro) 1974-03-28

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Legal Events

Date Code Title Description
PL Patent ceased