CH548109A - HOUSING WITH A SEMICONDUCTOR SYSTEM. - Google Patents

HOUSING WITH A SEMICONDUCTOR SYSTEM.

Info

Publication number
CH548109A
CH548109A CH1708472A CH1708472A CH548109A CH 548109 A CH548109 A CH 548109A CH 1708472 A CH1708472 A CH 1708472A CH 1708472 A CH1708472 A CH 1708472A CH 548109 A CH548109 A CH 548109A
Authority
CH
Switzerland
Prior art keywords
housing
semiconductor system
semiconductor
Prior art date
Application number
CH1708472A
Other languages
German (de)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH548109A publication Critical patent/CH548109A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/055Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Casings For Electric Apparatus (AREA)
CH1708472A 1972-03-22 1972-11-23 HOUSING WITH A SEMICONDUCTOR SYSTEM. CH548109A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19722213915 DE2213915A1 (en) 1972-03-22 1972-03-22 HOUSING FOR SEMI-CONDUCTOR SYSTEMS

Publications (1)

Publication Number Publication Date
CH548109A true CH548109A (en) 1974-04-11

Family

ID=5839779

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1708472A CH548109A (en) 1972-03-22 1972-11-23 HOUSING WITH A SEMICONDUCTOR SYSTEM.

Country Status (9)

Country Link
JP (1) JPS496880A (en)
AT (1) AT327989B (en)
CA (1) CA979122A (en)
CH (1) CH548109A (en)
DE (1) DE2213915A1 (en)
FR (1) FR2176661B1 (en)
GB (1) GB1397330A (en)
IT (1) IT982542B (en)
NL (1) NL7302989A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2439478A1 (en) * 1978-10-19 1980-05-16 Cii Honeywell Bull FLAT HOUSING FOR DEVICES WITH INTEGRATED CIRCUITS
GB2146174B (en) * 1983-09-06 1987-04-23 Gen Electric Hermetic power chip packages

Also Published As

Publication number Publication date
FR2176661A1 (en) 1973-11-02
NL7302989A (en) 1973-09-25
IT982542B (en) 1974-10-21
GB1397330A (en) 1975-06-11
CA979122A (en) 1975-12-02
DE2213915A1 (en) 1973-10-04
ATA1012972A (en) 1975-05-15
JPS496880A (en) 1974-01-22
FR2176661B1 (en) 1977-12-30
AT327989B (en) 1976-02-25

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Legal Events

Date Code Title Description
PL Patent ceased