CA979122A - Housings for semiconductor systems - Google Patents

Housings for semiconductor systems

Info

Publication number
CA979122A
CA979122A CA166,172A CA166172A CA979122A CA 979122 A CA979122 A CA 979122A CA 166172 A CA166172 A CA 166172A CA 979122 A CA979122 A CA 979122A
Authority
CA
Canada
Prior art keywords
housings
semiconductor systems
semiconductor
systems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA166,172A
Other versions
CA166172S (en
Inventor
Burkhart Diel
Heinz Hagen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Application granted granted Critical
Publication of CA979122A publication Critical patent/CA979122A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/055—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Casings For Electric Apparatus (AREA)
CA166,172A 1972-03-22 1973-03-15 Housings for semiconductor systems Expired CA979122A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19722213915 DE2213915A1 (en) 1972-03-22 1972-03-22 HOUSING FOR SEMI-CONDUCTOR SYSTEMS

Publications (1)

Publication Number Publication Date
CA979122A true CA979122A (en) 1975-12-02

Family

ID=5839779

Family Applications (1)

Application Number Title Priority Date Filing Date
CA166,172A Expired CA979122A (en) 1972-03-22 1973-03-15 Housings for semiconductor systems

Country Status (9)

Country Link
JP (1) JPS496880A (en)
AT (1) AT327989B (en)
CA (1) CA979122A (en)
CH (1) CH548109A (en)
DE (1) DE2213915A1 (en)
FR (1) FR2176661B1 (en)
GB (1) GB1397330A (en)
IT (1) IT982542B (en)
NL (1) NL7302989A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2439478A1 (en) * 1978-10-19 1980-05-16 Cii Honeywell Bull FLAT HOUSING FOR DEVICES WITH INTEGRATED CIRCUITS
GB2146174B (en) * 1983-09-06 1987-04-23 Gen Electric Hermetic power chip packages

Also Published As

Publication number Publication date
FR2176661A1 (en) 1973-11-02
NL7302989A (en) 1973-09-25
IT982542B (en) 1974-10-21
GB1397330A (en) 1975-06-11
DE2213915A1 (en) 1973-10-04
ATA1012972A (en) 1975-05-15
JPS496880A (en) 1974-01-22
CH548109A (en) 1974-04-11
FR2176661B1 (en) 1977-12-30
AT327989B (en) 1976-02-25

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