CH540549A - Binäre Speichereinrichtung aus einer Flip-Flop-Schaltung - Google Patents

Binäre Speichereinrichtung aus einer Flip-Flop-Schaltung

Info

Publication number
CH540549A
CH540549A CH1593071A CH1593071A CH540549A CH 540549 A CH540549 A CH 540549A CH 1593071 A CH1593071 A CH 1593071A CH 1593071 A CH1593071 A CH 1593071A CH 540549 A CH540549 A CH 540549A
Authority
CH
Switzerland
Prior art keywords
flip
memory device
flop circuit
binary memory
binary
Prior art date
Application number
CH1593071A
Other languages
English (en)
Inventor
Corbin George
Original Assignee
Ncr Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ncr Co filed Critical Ncr Co
Publication of CH540549A publication Critical patent/CH540549A/de

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • G11C11/4023Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using field effect transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C14/00Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356008Bistable circuits ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356017Bistable circuits using additional transistors in the input circuit
    • H03K3/356052Bistable circuits using additional transistors in the input circuit using pass gates

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
CH1593071A 1970-11-02 1971-11-02 Binäre Speichereinrichtung aus einer Flip-Flop-Schaltung CH540549A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US8619070A 1970-11-02 1970-11-02

Publications (1)

Publication Number Publication Date
CH540549A true CH540549A (de) 1973-08-15

Family

ID=22196897

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1593071A CH540549A (de) 1970-11-02 1971-11-02 Binäre Speichereinrichtung aus einer Flip-Flop-Schaltung

Country Status (15)

Country Link
US (1) US3676717A (de)
JP (1) JPS5325217B1 (de)
AU (1) AU445397B2 (de)
BE (1) BE774737A (de)
BR (1) BR7107227D0 (de)
CA (1) CA946511A (de)
CH (1) CH540549A (de)
DE (1) DE2154024A1 (de)
DK (1) DK132357C (de)
ES (1) ES396463A1 (de)
FR (1) FR2112392B1 (de)
GB (1) GB1313718A (de)
NL (1) NL7115023A (de)
SE (1) SE364796B (de)
ZA (1) ZA716852B (de)

Families Citing this family (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA974657A (en) * 1971-12-28 1975-09-16 Matsushita Electric Industrial Co., Ltd. Switching device equipped with a semiconductor memory element
US3771148A (en) * 1972-03-31 1973-11-06 Ncr Nonvolatile capacitive memory cell
US3761901A (en) * 1972-06-28 1973-09-25 Ncr Nonvolatile memory cell
US3845327A (en) * 1972-08-16 1974-10-29 Westinghouse Electric Corp Counter with memory utilizing mnos memory elements
US4675841A (en) * 1974-12-23 1987-06-23 Pitney Bowes Inc. Micro computerized electronic postage meter system
GB1516134A (en) * 1975-05-20 1978-06-28 Plessey Co Ltd Electrical information store
GB1537114A (en) * 1975-08-29 1978-12-29 Tokyo Shibaura Electric Co Memory apparatus
JPS5228824A (en) * 1975-08-29 1977-03-04 Toshiba Corp Multiple storage unit
GB1545087A (en) * 1975-09-05 1979-05-02 Ncr Co Bistable multivibrator circuit
US4095281A (en) * 1976-03-04 1978-06-13 Rca Corporation Random access-erasable read only memory cell
US4175291A (en) * 1976-08-16 1979-11-20 Ncr Corporation Non-volatile random access memory cell
US4125877A (en) * 1976-11-26 1978-11-14 Motorola, Inc. Dual port random access memory storage cell
GB2000407B (en) * 1977-06-27 1982-01-27 Hughes Aircraft Co Volatile/non-volatile logic latch circuit
JPS5856134B2 (ja) * 1977-11-24 1983-12-13 ホーチキ株式会社 記憶装置
US4193128A (en) * 1978-05-31 1980-03-11 Westinghouse Electric Corp. High-density memory with non-volatile storage array
US4224686A (en) * 1978-10-02 1980-09-23 Ncr Corporation Electrically alterable memory cell
WO1980001965A1 (en) * 1979-03-13 1980-09-18 Ncr Co Static volatile/non-volatile ram system
WO1980001972A1 (en) * 1979-03-13 1980-09-18 Ncr Co Write/restore/erase signal generator for volatile/non-volatile memory system
JPS55138104A (en) * 1979-04-13 1980-10-28 Hitachi Ltd Engine controller
US4285050A (en) * 1979-10-30 1981-08-18 Pitney Bowes Inc. Electronic postage meter operating voltage variation sensing system
US4388704A (en) * 1980-09-30 1983-06-14 International Business Machines Corporation Non-volatile RAM cell with enhanced conduction insulators
US4399522A (en) * 1980-09-30 1983-08-16 International Business Machines Corporation Non-volatile static RAM cell with enhanced conduction insulators
US4363110A (en) * 1980-12-22 1982-12-07 International Business Machines Corp. Non-volatile dynamic RAM cell
US4998888A (en) * 1984-07-23 1991-03-12 Sgs-Thomson Microelectronics, Inc. Integrated circuit package with battery housing
US5055704A (en) * 1984-07-23 1991-10-08 Sgs-Thomson Microelectronics, Inc. Integrated circuit package with battery housing
US5276354A (en) * 1981-05-27 1994-01-04 Sgs-Thomson Microelectronics, Inc. Integrated circuit package with battery housing
FR2517143A1 (fr) * 1981-11-20 1983-05-27 Efcis Bascule bistable a stockage non volatil et a repositionnement dynamique
US4446535A (en) * 1981-12-31 1984-05-01 International Business Machines Corporation Non-inverting non-volatile dynamic RAM cell
US4471471A (en) * 1981-12-31 1984-09-11 International Business Machines Corporation Non-volatile RAM device
US4432072A (en) * 1981-12-31 1984-02-14 International Business Machines Corporation Non-volatile dynamic RAM cell
US4420821A (en) * 1982-02-19 1983-12-13 International Business Machines Corporation Static RAM with non-volatile back-up storage and method of operation thereof
US4716312A (en) * 1985-05-07 1987-12-29 California Institute Of Technology CMOS logic circuit
US4685085A (en) * 1985-06-17 1987-08-04 Rockwell International Corporation Non-volatile ram cell with charge pumps
DE69634294D1 (de) * 1996-04-05 2005-03-10 St Microelectronics Srl Automatische Speichersicherungsschaltung zur Programmierung der Konfigurationszellen einer nichtflüchtigen Halbleiterspeicheranordnung
US6122191A (en) * 1996-05-01 2000-09-19 Cypress Semiconductor Corporation Semiconductor non-volatile device including embedded non-volatile elements
US5892712A (en) * 1996-05-01 1999-04-06 Nvx Corporation Semiconductor non-volatile latch device including embedded non-volatile elements
US6107865A (en) * 1997-10-31 2000-08-22 Stmicroelectronics, Inc. VSS switching scheme for battery backed-up semiconductor devices
US6362675B1 (en) * 1999-07-12 2002-03-26 Ramtron International Corporation Nonvolatile octal latch and D-type register
US8072834B2 (en) * 2005-08-25 2011-12-06 Cypress Semiconductor Corporation Line driver circuit and method with standby mode of operation
US7859925B1 (en) 2006-03-31 2010-12-28 Cypress Semiconductor Corporation Anti-fuse latch self-test circuit and method
US7821859B1 (en) 2006-10-24 2010-10-26 Cypress Semiconductor Corporation Adaptive current sense amplifier with direct array access capability
US20080151654A1 (en) 2006-12-22 2008-06-26 Allan James D Method and apparatus to implement a reset function in a non-volatile static random access memory
US7859906B1 (en) 2007-03-30 2010-12-28 Cypress Semiconductor Corporation Circuit and method to increase read margin in non-volatile memories using a differential sensing circuit
US7881118B2 (en) * 2007-05-25 2011-02-01 Cypress Semiconductor Corporation Sense transistor protection for memory programming
US8059458B2 (en) * 2007-12-31 2011-11-15 Cypress Semiconductor Corporation 3T high density nvDRAM cell
US8064255B2 (en) * 2007-12-31 2011-11-22 Cypress Semiconductor Corporation Architecture of a nvDRAM array and its sense regime
US8036032B2 (en) 2007-12-31 2011-10-11 Cypress Semiconductor Corporation 5T high density NVDRAM cell

Also Published As

Publication number Publication date
JPS5325217B1 (de) 1978-07-25
FR2112392A1 (de) 1972-06-16
DK132357C (da) 1976-05-03
DE2154024C3 (de) 1980-11-13
BE774737A (fr) 1972-02-14
ZA716852B (en) 1972-06-28
US3676717A (en) 1972-07-11
SE364796B (de) 1974-03-04
AU445397B2 (en) 1974-02-21
CA946511A (en) 1974-04-30
DE2154024A1 (de) 1972-05-04
NL7115023A (de) 1972-05-04
ES396463A1 (es) 1975-03-01
BR7107227D0 (pt) 1973-04-10
DK132357B (da) 1975-11-24
GB1313718A (en) 1973-04-18
FR2112392B1 (de) 1976-09-03
DE2154024B2 (de) 1980-03-13
AU3457971A (en) 1973-04-19

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Legal Events

Date Code Title Description
PL Patent ceased