CH534409A - Speicheranordnung mit in einer Matrix angeordneten Speicherzellen - Google Patents

Speicheranordnung mit in einer Matrix angeordneten Speicherzellen

Info

Publication number
CH534409A
CH534409A CH920872A CH920872A CH534409A CH 534409 A CH534409 A CH 534409A CH 920872 A CH920872 A CH 920872A CH 920872 A CH920872 A CH 920872A CH 534409 A CH534409 A CH 534409A
Authority
CH
Switzerland
Prior art keywords
memory
matrix
cells arranged
arrangement
memory cells
Prior art date
Application number
CH920872A
Other languages
English (en)
Inventor
T Ho Irving
Jen Sen Teh
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH534409A publication Critical patent/CH534409A/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/62—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors
    • H03K17/6221—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors combined with selecting means
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/72—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices having more than two PN junctions; having more than three electrodes; having more than one electrode connected to the same conductivity region
    • H03K17/73—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices having more than two PN junctions; having more than three electrodes; having more than one electrode connected to the same conductivity region for dc voltages or currents
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/35—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar semiconductor devices with more than two PN junctions, or more than three electrodes, or more than one electrode connected to the same conductivity region
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0036—Means reducing energy consumption

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
CH920872A 1971-06-30 1972-06-19 Speicheranordnung mit in einer Matrix angeordneten Speicherzellen CH534409A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15831671A 1971-06-30 1971-06-30

Publications (1)

Publication Number Publication Date
CH534409A true CH534409A (de) 1973-02-28

Family

ID=22567558

Family Applications (1)

Application Number Title Priority Date Filing Date
CH920872A CH534409A (de) 1971-06-30 1972-06-19 Speicheranordnung mit in einer Matrix angeordneten Speicherzellen

Country Status (10)

Country Link
US (1) US3740730A (de)
JP (1) JPS5320177B1 (de)
CA (1) CA958485A (de)
CH (1) CH534409A (de)
DE (1) DE2230686C3 (de)
FR (1) FR2143710B1 (de)
GB (1) GB1380830A (de)
IT (1) IT951497B (de)
NL (1) NL7207389A (de)
SE (1) SE384092B (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3795898A (en) * 1972-11-03 1974-03-05 Advanced Memory Syst Random access read/write semiconductor memory
US3855577A (en) * 1973-06-11 1974-12-17 Texas Instruments Inc Power saving circuit for calculator system
US3934233A (en) * 1973-09-24 1976-01-20 Texas Instruments Incorporated Read-only-memory for electronic calculator
NL7314271A (nl) * 1973-10-17 1975-04-21 Philips Nv Vastestof-geheugeninrichting.
US4031413A (en) * 1975-01-10 1977-06-21 Hitachi, Ltd. Memory circuit
JPS533120A (en) * 1976-06-30 1978-01-12 Canon Inc Control circuit
US4288862A (en) * 1977-12-21 1981-09-08 Nippon Telegraph And Telephone Public Corp. Memory circuit
US4422162A (en) * 1980-10-01 1983-12-20 Motorola, Inc. Non-dissipative memory system
US4357687A (en) * 1980-12-11 1982-11-02 Fairchild Camera And Instr. Corp. Adaptive word line pull down
US4413191A (en) * 1981-05-05 1983-11-01 International Business Machines Corporation Array word line driver system
JPS5968889A (ja) * 1982-10-08 1984-04-18 Toshiba Corp 半導体記憶装置
US4613958A (en) * 1984-06-28 1986-09-23 International Business Machines Corporation Gate array chip
US5687121A (en) * 1996-03-29 1997-11-11 Aplus Integrated Circuits, Inc. Flash EEPROM worldline decoder
DE102006008292B4 (de) * 2006-02-22 2011-09-15 Infineon Technologies Ag Überlastschutz für steuerbare Stromverbraucher

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3292036A (en) * 1964-08-06 1966-12-13 Transitron Electronic Corp Controllable digital storage display circuitry
US3510850A (en) * 1968-04-30 1970-05-05 Gen Electric Drive circuitry for negative resistance device matrix
US3609712A (en) * 1969-01-15 1971-09-28 Ibm Insulated gate field effect transistor memory array
US3628050A (en) * 1969-02-17 1971-12-14 Scm Corp Recorder control circuit
US3624620A (en) * 1969-06-23 1971-11-30 Honeywell Inc Memory address selection circuitry

Also Published As

Publication number Publication date
IT951497B (it) 1973-06-30
FR2143710B1 (de) 1974-12-27
FR2143710A1 (de) 1973-02-09
SE384092B (sv) 1976-04-12
JPS5320177B1 (de) 1978-06-24
GB1380830A (en) 1975-01-15
US3740730A (en) 1973-06-19
CA958485A (en) 1974-11-26
DE2230686B2 (de) 1974-12-12
NL7207389A (de) 1973-01-03
DE2230686C3 (de) 1975-07-24
DE2230686A1 (de) 1973-01-11

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Legal Events

Date Code Title Description
PL Patent ceased