CH486095A - Speicheranordnung mit supraleitenden Speicherzellen - Google Patents

Speicheranordnung mit supraleitenden Speicherzellen

Info

Publication number
CH486095A
CH486095A CH1046369A CH1046369A CH486095A CH 486095 A CH486095 A CH 486095A CH 1046369 A CH1046369 A CH 1046369A CH 1046369 A CH1046369 A CH 1046369A CH 486095 A CH486095 A CH 486095A
Authority
CH
Switzerland
Prior art keywords
memory
superconducting
arrangement
memory cells
cells
Prior art date
Application number
CH1046369A
Other languages
English (en)
Inventor
Anacker Wilhelm
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH486095A publication Critical patent/CH486095A/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/10Junction-based devices
    • H10N60/12Josephson-effect devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/44Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using super-conductive elements, e.g. cryotron
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/195Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
    • H03K19/1952Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices with electro-magnetic coupling of the control current
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/825Apparatus per se, device per se, or process of making or operating same
    • Y10S505/831Static information storage system or device
    • Y10S505/832Josephson junction type

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
CH1046369A 1968-07-15 1969-07-09 Speicheranordnung mit supraleitenden Speicherzellen CH486095A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US74494968A 1968-07-15 1968-07-15

Publications (1)

Publication Number Publication Date
CH486095A true CH486095A (de) 1970-02-15

Family

ID=24994591

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1046369A CH486095A (de) 1968-07-15 1969-07-09 Speicheranordnung mit supraleitenden Speicherzellen

Country Status (10)

Country Link
US (1) US3626391A (de)
JP (1) JPS5548399B1 (de)
BE (1) BE736102A (de)
CH (1) CH486095A (de)
DE (1) DE1934278C3 (de)
ES (1) ES369486A1 (de)
FR (1) FR2014602A1 (de)
GB (1) GB1244518A (de)
NL (1) NL170993C (de)
SE (1) SE360201B (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2071706A5 (de) * 1969-11-12 1971-09-17 Ibm
US3758795A (en) * 1972-06-30 1973-09-11 Ibm Superconductive circuitry using josephson tunneling devices
GB1427549A (en) * 1972-06-30 1976-03-10 Ibm Parametron
US3825906A (en) * 1973-06-29 1974-07-23 Ibm Superconductive shift register utilizing josephson tunnelling devices
US3843895A (en) * 1973-06-29 1974-10-22 Ibm Two-way or circuit using josephson tunnelling technology
USRE28853E (en) * 1973-06-29 1976-06-08 International Business Machines Corporation Superconductive shift register utilizing Josephson tunnelling devices
US3904889A (en) * 1973-06-29 1975-09-09 Ibm Superconductive logic circuit utilizing Josephson tunnelling devices
CH559481A5 (de) * 1973-12-13 1975-02-28 Ibm
US3886382A (en) * 1973-12-27 1975-05-27 Ibm Balanced superconductive transmission line using Josephson tunnelling devices
US3987309A (en) * 1974-12-23 1976-10-19 International Business Machines Corporation Superconductive sensing circuit for providing improved signal-to-noise
JPS547830A (en) * 1977-06-20 1979-01-20 Ibm Nnstage decoder
US4198577A (en) * 1977-06-20 1980-04-15 International Business Machines Corporation Loop decoder for Josephson memory arrays
US4151605A (en) * 1977-11-22 1979-04-24 International Business Machines Corporation Superconducting memory array configurations which avoid spurious half-select condition in unselected cells of the array
US4633439A (en) * 1982-07-21 1986-12-30 Hitachi, Ltd. Superconducting read-only memories or programable logic arrays having the same
JPS61180515U (de) * 1985-04-30 1986-11-11
US5011817A (en) * 1988-01-29 1991-04-30 Nec Corporation Magnetic memory using superconductor ring
US5039656A (en) * 1988-02-29 1991-08-13 Yasuharu Hidaka Superconductor magnetic memory using magnetic films
JPH02306672A (ja) * 1989-05-22 1990-12-20 Hitachi Ltd 記憶装置
JPH041990A (ja) * 1990-04-18 1992-01-07 Nec Corp 磁気記憶素子とそのアクセス方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3047744A (en) * 1959-11-10 1962-07-31 Rca Corp Cryoelectric circuits employing superconductive contact between two superconductive elements
US3116427A (en) * 1960-07-05 1963-12-31 Gen Electric Electron tunnel emission device utilizing an insulator between two conductors eitheror both of which may be superconductive
US3209160A (en) * 1960-11-28 1965-09-28 Westinghouse Electric Corp Information-directional logic element
US3281609A (en) * 1964-01-17 1966-10-25 Bell Telephone Labor Inc Cryogenic supercurrent tunneling devices

Also Published As

Publication number Publication date
NL6910825A (de) 1970-01-19
DE1934278C3 (de) 1974-10-03
NL170993B (nl) 1982-08-16
SE360201B (de) 1973-09-17
DE1934278A1 (de) 1970-07-23
JPS5548399B1 (de) 1980-12-05
GB1244518A (en) 1971-09-02
ES369486A1 (es) 1971-06-01
BE736102A (de) 1969-12-16
US3626391A (en) 1971-12-07
DE1934278B2 (de) 1974-03-07
NL170993C (nl) 1983-01-17
FR2014602A1 (de) 1970-04-17

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Legal Events

Date Code Title Description
PL Patent ceased