CH516005A - Procédé de gravure d'un métal passivable - Google Patents

Procédé de gravure d'un métal passivable

Info

Publication number
CH516005A
CH516005A CH138771A CH138771A CH516005A CH 516005 A CH516005 A CH 516005A CH 138771 A CH138771 A CH 138771A CH 138771 A CH138771 A CH 138771A CH 516005 A CH516005 A CH 516005A
Authority
CH
Switzerland
Prior art keywords
etching
passivable metal
passivable
metal
Prior art date
Application number
CH138771A
Other languages
English (en)
French (fr)
Inventor
Amouroux Claude
Peres Gerard
Valette Pierre
Original Assignee
Comp Generale Electricite
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Comp Generale Electricite filed Critical Comp Generale Electricite
Publication of CH516005A publication Critical patent/CH516005A/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00Etching metallic material by chemical means
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00Etching metallic material by chemical means
    • C23F1/02Local etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Organic Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Metallurgy (AREA)
  • Manufacturing & Machinery (AREA)
  • Weting (AREA)
  • ing And Chemical Polishing (AREA)
  • Electrodes Of Semiconductors (AREA)
CH138771A 1970-02-09 1971-01-29 Procédé de gravure d'un métal passivable CH516005A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7004491A FR2077718A1 (de) 1970-02-09 1970-02-09

Publications (1)

Publication Number Publication Date
CH516005A true CH516005A (fr) 1971-11-30

Family

ID=9050292

Family Applications (1)

Application Number Title Priority Date Filing Date
CH138771A CH516005A (fr) 1970-02-09 1971-01-29 Procédé de gravure d'un métal passivable

Country Status (6)

Country Link
US (1) US3716428A (de)
BE (1) BE762218A (de)
CH (1) CH516005A (de)
DE (1) DE2104804A1 (de)
FR (1) FR2077718A1 (de)
NL (1) NL7101664A (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4361599A (en) * 1981-03-23 1982-11-30 National Semiconductor Corporation Method of forming plasma etched semiconductor contacts
FR2812400B1 (fr) * 2000-07-28 2002-09-27 Mesatronic Procede de fabrication d'une carte a pointes de contact multiple pour le test de circuits integres a microbilles, et dispositif de test utilisant la carte

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3287612A (en) * 1963-12-17 1966-11-22 Bell Telephone Labor Inc Semiconductor contacts and protective coatings for planar devices
US3489656A (en) * 1964-11-09 1970-01-13 Western Electric Co Method of producing an integrated circuit containing multilayer tantalum compounds
US3616401A (en) * 1966-06-30 1971-10-26 Texas Instruments Inc Sputtered multilayer ohmic molygold contacts for semiconductor devices
US3540954A (en) * 1966-12-30 1970-11-17 Texas Instruments Inc Method for manufacturing multi-layer film circuits
US3556951A (en) * 1967-08-04 1971-01-19 Sylvania Electric Prod Method of forming leads on semiconductor devices
US3576722A (en) * 1969-03-26 1971-04-27 Bendix Corp Method for metalizing ceramics

Also Published As

Publication number Publication date
US3716428A (en) 1973-02-13
BE762218A (fr) 1971-07-29
DE2104804A1 (de) 1971-08-19
FR2077718A1 (de) 1971-11-05
NL7101664A (de) 1971-08-11

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Legal Events

Date Code Title Description
PL Patent ceased