CH482199A - Verfahren zur Prüfung von Halbleitern in elektrischen Schaltungen
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Verfahren zur Prüfung von Halbleitern in elektrischen Schaltungen
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Publication number
CH482199A
CH482199ACH1670567ACH1670567ACH482199ACH 482199 ACH482199 ACH 482199ACH 1670567 ACH1670567 ACH 1670567ACH 1670567 ACH1670567 ACH 1670567ACH 482199 ACH482199 ACH 482199A
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Application filed by Licentia GmbhfiledCriticalLicentia Gmbh
Publication of CH482199ApublicationCriticalpatent/CH482199A/de
G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
G01R31/26—Testing of individual semiconductor devices
G01R31/2607—Circuits therefor
G01R31/2632—Circuits therefor for testing diodes
G—PHYSICS
G01—MEASURING; TESTING
G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
G01R31/26—Testing of individual semiconductor devices
G01R31/2601—Apparatus or methods therefor
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Physics & Mathematics
(AREA)
General Physics & Mathematics
(AREA)
Testing Of Individual Semiconductor Devices
(AREA)
Tests Of Electronic Circuits
(AREA)
CH1670567A1966-12-071967-11-28Verfahren zur Prüfung von Halbleitern in elektrischen Schaltungen
CH482199A
(de)
Verfahren zum gegenseitigen elektrischen Isolieren verschiedener in einer integrierten oder monolithischen Halbleitervorrichtung zusammengefasster Schaltelemente